Design a multilevel inverter with a minimized switch count utilizing a modified H-bridge configuration | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article Design a multilevel inverter with a minimized switch count utilizing a modified H-bridge configuration D Sarathkumar, Raymon Antony Raj This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-4955687/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract The proposed paper introduces an innovative approach to enhance the efficiency and performance of photovoltaic (PV) systems through the design and investigation of a 15-level multilevel inverter. This inverter topology utilizes a modified H-bridge configuration with 12 switches, aimed at improving voltage control, reducing harmonic distortion, and enabling efficient power conversion. By employing this modified H-bridge architecture, the inverter can achieve 15 distinct voltage levels, which allows for precise control of the output waveform. The design focuses on optimizing the modulation strategy to manage the switching of the 12 switches effectively, minimizing switching losses, and ensuring an efficient energy conversion process. The resulting voltage levels contribute to better output waveform quality and reduced total harmonic distortion. Additionally, the proposed topology is scalable and adaptable, making it suitable for various applications, including grid-connected PV systems, motor drives, and uninterruptible power supplies (UPS). The advantages of the modified H-bridge configuration, such as reduced module count and enhanced controllability, contribute to the practicality and feasibility of the suggested inverter topology. Achieving 15 voltage levels with a limited number of switches underscores its applicability and appeal for renewable energy integration and other relevant power electronics applications. Further experimental validation and real-world implementation are recommended to substantiate the theoretical findings and validate the practical advantages of the proposed inverter topology. photovoltaic (PV) 15-level inverter modified H-bridge 12 switches modulation strategy harmonic distortion Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Figure 20 Figure 21 Figure 22 Figure 23 Figure 24 Figure 25 Figure 26 Figure 27 1. INTRODUCTION An inverter converts DC voltage into AC voltage. A multilevel power inverter serves the same purpose but is designed for higher power and industrial applications. As the number of voltage levels increases, the number of switches also increases. Multilevel inverters achieve higher output voltage levels by stacking multiple power electronic switches in series, which allows them to generate smoother, nearly sinusoidal AC waveforms with reduced harmonic distortion. This research has significant implications for sectors such as renewable energy integration, where high-quality AC output is crucial for grid compatibility and efficient power transfer. Harmonic distortion refers to the presence of unwanted, non-sinusoidal components in the voltage and current waveforms of an electrical system. In recent years, the growing demand for renewable energy sources has driven the exploration of advanced power electronics and inverter technologies to enhance the efficiency, reliability, and performance of photovoltaic (PV) systems. Solar energy, a key renewable energy source, is vital for a sustainable and greener future. Effective harnessing and conversion of solar power into electricity require advanced power inverters. Multilevel inverters have emerged as a transformative solution, offering superior output waveform quality, reduced harmonics, and enhanced power handling capacity compared to conventional two-level inverters. This innovative inverter design aims to optimize energy conversion efficiency and integrate PV systems into the power grid effectively. By presenting a comprehensive analysis and validation of this inverter topology, this project seeks to contribute to the advancement of renewable energy integration and power electronics. The potential impact of this research lies in its ability to significantly improve solar energy utilization, promoting a sustainable and environmentally conscious energy landscape. The primary goal of this work is to achieve precise control of the output waveform by generating 15 distinct voltage levels through an intelligently designed inverter architecture. Multilevel inverters achieve higher output voltage levels by stacking multiple power electronic switches in series, enabling them to generate smoother, nearly sinusoidal AC waveforms with reduced harmonic distortion. The outcome of this research will have significant implications for various sectors, including renewable energy integration, where high-quality AC output is essential for grid compatibility and efficient power transfer. Harmonic distortion refers to the presence of unwanted, non-sinusoidal components in the voltage and current waveforms of an electrical system. A multilevel inverter concept has been developed to effectively reduce harmonic levels using a modified H-bridge configuration, resulting in a decrease in the number of power switches required. In this specific 15-level inverter system, the switch count has been minimized to 12, achieved through a cascaded arrangement, with power input sourced from solar panels. The solar panels serve as the DC input for the inverter, transforming the direct current into alternating current, with the primary objective of keeping harmonic levels below 10% for optimal operation. Simulation tests have been conducted on the 15-level multilevel inverter, incorporating a filter circuit to refine the output waveform and further diminish harmonic distortions, resulting in a substantial decrease in total harmonic distortion (THD). In practical applications, it is acknowledged that solar panels may not deliver identical power outputs due to factors such as dust, shading, and weather conditions. Consequently, individual inverter circuits are tailored to accommodate variations in voltage from each panel source. 1.1 TYPES OF INVERTER Inverters convert direct current (DC) electricity into alternating current (AC) electricity and are widely used in various applications, including residential, commercial, and industrial settings, to power devices that require AC power. Here are some common types of inverters, each designed for specific purposes: 1. Square Wave Inverter : o Generates a simple square wave output. o Inexpensive but not suitable for sensitive electronics due to the abrupt waveform. 2. Modified Sine Wave (Quasi-Sine Wave) Inverter : o Produces a waveform that approximates a sine wave but is not as smooth. o Suitable for most common household appliances and tools. 3. Pure Sine Wave Inverter : o Produces a smooth and continuous waveform that mimics grid-supplied electricity. o Compatible with all types of electronic devices and appliances, making it the most versatile option. 4. Grid-Tie Inverter (Grid-Connected Inverter) : o Used in grid-tied solar power systems. o Converts DC power from solar panels into AC power and synchronizes it with the grid's frequency and voltage. 5. Off-Grid Inverter : o Used in standalone or off-grid renewable energy systems (e.g., solar, wind, hydro) where there is no connection to the utility grid. o Converts DC power from batteries or renewable sources into AC power for household use. 6. Micro Inverter : o Used in small-scale solar installations. o Each solar panel has its own micro inverter, which converts DC to AC right at the panel. o Provides advantages like improved energy harvesting and reduced shading effects. 7. String Inverter : o Used in larger solar installations. o Several solar panels are connected in series (string) and the string inverter converts DC from the entire string into AC. 8. Central Inverter : o Commonly used in utility-scale solar installations. o Handles a large amount of DC power from multiple solar panels or arrays and converts it to AC. 9. Multilevel Inverter : o Utilizes multiple levels of DC voltage to generate a nearly sinusoidal AC waveform. o Offers higher power quality and efficiency compared to traditional inverters. 10. Voltage Source Inverter (VSI) : o Maintains a constant voltage at its output while varying the frequency as needed. o Used in variable frequency drives (VFDs) for controlling the speed of AC motors. 11. Current Source Inverter (CSI) : o Maintains a constant current at its output while varying the voltage as needed. o Used in specific applications like high-power drives and renewable energy systems. 12. Bidirectional Inverter : o Can convert power in both directions, either from DC to AC or AC to DC. o Used in applications like energy storage systems, electric vehicles, and uninterruptible power supplies (UPS). These types of inverters each have unique advantages and applications, and the choice of inverter depends on the specific requirements of the system it will be used in. 2. OBJECTIVES AND EXPECTED OUTCOMES OF THE PROPOSED SYSTEM This paper delves into the detailed study, design, analysis, and execution of a PV-based 15-level multilevel inverter utilizing a modified H-bridge topology with 12 switches. The primary objective of this project is to achieve precise control of the output waveform by generating 15 distinct voltage levels through an intelligently designed inverter architecture. The modified H-bridge configuration, employing a reduced number of switches, balances complexity and performance. The key objectives of the proposed system are as follows: A. Design and Simulation : · Develop a comprehensive understanding of multilevel inverter topologies, focusing on the modified H-bridge configuration with 12 switches. · Use simulation tools to model and simulate the 15-level multilevel inverter to validate its theoretical feasibility. B. Voltage Level Generation : · Investigate methods to achieve 15 distinct voltage levels using the modified H-bridge topology with a minimized number of switches. · Analyze and optimize the switching patterns to effectively achieve the desired voltage levels. C. Efficiency Enhancement : · Study and implement strategies to minimize switching losses and improve overall energy conversion efficiency. · Explore techniques to optimize the inverter's performance while reducing power losses during the energy conversion process. D. Harmonic Distortion Reduction : · Evaluate the inverter's effectiveness in reducing harmonic distortion in the output voltage waveform compared to conventional two-level inverters. · Assess the harmonic content and analyze methods to minimize distortion for improved power quality. E. Control and Modulation Strategy : · Design and implement intelligent control and modulation strategies to efficiently manage the switching of the 12 switches. · Explore techniques to maintain precise control over the output waveform while minimizing switching losses. F. Practical Implementation Considerations : · Investigate the practical aspects of implementing the proposed inverter in a real-world PV system. · Address challenges related to component selection, sizing, and thermal management, ensuring the inverter's feasibility and reliability for practical applications. G. Outcomes of the Project : · Successful simulation and validation of the 15-level multilevel inverter using the modified H-bridge topology, demonstrating its feasibility and theoretical accuracy. · Achievement of the desired 15 distinct voltage levels, confirming the inverter's capability to provide precise waveform control for enhanced power quality in PV systems. · Reduction of harmonic distortion in the output voltage waveform, indicating the inverter's efficiency in enhancing power quality compared to traditional two-level inverters. · Identification and implementation of efficient control and modulation strategies, resulting in minimized switching losses and increased energy conversion efficiency, contributing to sustainable energy utilization. · Insights into practical considerations for implementation, including component selection and thermal management, ensuring the proposed inverter's viability and potential for real-world applications in renewable energy systems. The differences between pure sine wave, square wave, and simulated sine wave are illustrated in figure 1. 3. LITERATURE SURVEY This section provides an overview of related research on the 15-level multilevel inverter. The development of multilevel inverters offers promising opportunities to address challenges posed by increasing inverter topologies. The following journal papers are referenced for this proposed system, providing insights into the use of multilevel inverters with different harmonic levels. Sumit K. Chattopadhyay et al. [ 1 ] explore the performance of a specific multilevel inverter configuration known as "16:4:1." The study highlights the growing preference for asymmetrical topologies over symmetrical ones due to their enhanced performance with a similar number of switching components. The focus is on the "16:4:1" configuration, representing the distribution of voltage levels within the multilevel inverter. Although this configuration is considered optimal, the paper identifies a research gap concerning comprehensive performance analysis. To address this gap, a novel analytical approach is introduced, enabling a thorough understanding of the combinations. M. P. Viswanathan et al. [ 2 ] describe a single-stage, fifteen-level cascaded DC-interface converter used to increase the effectiveness of photovoltaic (PV) systems. The study suggests using a disposition pulse width modulation approach (POPD PWM) and phase opposition to maximize the quality of the AC power output. This offers advantages over traditional inverter topologies by efficiently reducing harmonic content, voltage strain, and the number of switches and DC power sources. The research employs both simulation and prototype models to comprehensively evaluate the system's performance. As a recommendation, the paper suggests adopting this innovative system in power converters used in Uninterruptible Power Supplies (UPS) and power drive applications, citing its cost-effectiveness and superior performance. Krishnachaitanya D et al. [ 3 ] conduct a quantifiable analysis of minimized-switch multilevel inverter configurations, examining aspects related to cost factors, switching losses, and reliability. The study compares eight asymmetric topologies and introduces a novel 15-level configuration, demonstrating its superior performance compared to other alternatives. The paper also evaluates cost functions for power converters, emphasizing the significance of reliability estimation methods and prediction. Techniques aimed at minimizing the component count within multilevel inverters are explored, offering potential cost and efficiency benefits. Vijayalakshmi N et al. [ 4 ] also conduct a quantifiable analysis of minimized-switch multilevel inverter configurations, specifically examining aspects related to switching power losses, price factors, and trustworthiness. The study compares eight asymmetric topologies and introduces a novel 15-level configuration, demonstrating its superior performance. The research delves into evaluating cost functions for power converters, emphasizing the significance of reliability estimation methods and prediction. Techniques aimed at minimizing the component count within multilevel inverters are explored, offering potential cost and efficiency benefits. Gowri Shankar J et al. [ 5 ] assess the performance of a nine-level cascaded multilevel inverter operating with a single DC power source in the context of photovoltaic systems. The research focuses on the inverter's capability to efficiently generate multiple voltage levels from a single DC power source, enhancing the quality of power output from photovoltaic arrays. Simulation and experimentation are used to evaluate the inverter's performance and efficiency, examining aspects like voltage quality, total harmonic distortion, and power losses. The findings provide valuable insights into the viability and effectiveness of this inverter configuration for photovoltaic applications, emphasizing its potential to enhance energy conversion and grid integration in renewable energy systems. Kailash Kumar Mahto et al. [ 6 ] discuss the significance of multilevel inverters (MLIs) in various energy conversion systems, including electric vehicles, fuel cells, wind farms, solar systems, and HVDC systems. MLIs offer benefits such as high power quality, minimal harmonic distortion, less electromagnetic interference, and smaller filter sizes. However, traditional MLIs like Flying Capacitor, Neutral Point Clamped, and Cascaded H-bridge have drawbacks due to their large component count. Research has focused on novel topologies that cut switches and other components in MLIs, resulting in improved topologies that provide increased efficiency and decreased complexity in energy conversion systems. R. Ilango et al. [ 7 ] introduce a novel strategy of a 15-level inverter for grid-connected photovoltaic (PV) systems, employing a hybrid approach called ZOASNN (Zebra Optimization Algorithm and Spiking Neural Network). The primary objectives of the ZOASNN method include meeting power demand, reducing harmonics, and enhancing power regulation and energy conversion in the PV system. The multilevel inverter (MLI) is utilized in both symmetrical and asymmetrical configurations to minimize power components. The ZOASNN controller optimizes converter switching states, effectively fulfilling load demands and mitigating system parameter fluctuations. Performance comparisons with other algorithms demonstrate the superior cost-effectiveness, low total harmonics distortion, and efficiency of the proposed method. Holm-Nielsen J. B. et al. [ 8 ] describe the design and practical application of a single-phase, 15-level inverter tailored for solar photovoltaic (PV) applications, emphasizing reducing component count. The innovative approach aims to achieve a substantial increase in voltage levels with minimal modules, improving the efficiency and cost-effectiveness of solar PV systems. Extensive simulation and experimentation are conducted to assess the inverter's effectiveness in terms of voltage quality, harmonic distortion, and overall power conversion efficiency. The findings contribute significantly to advancing solar PV systems, offering a novel inverter design that optimizes energy conversion, grid integration, and cost-efficiency. Bidyut Mahato et al. [ 9 ] propose a generalized multilevel inverter (MLI) design with symmetrical and asymmetrical DC sources at the input. The MLI minimizes power consumption by producing output voltages of 11, 13, and 15 levels with 10 power switches and seven levels with seven power switches. Expanding and cascading the MLI reduces complexity and size while increasing cost and performance. The study compares newly designed topologies, total standing voltage, and level-to-switch ratio. Gate pulses for IGBT switches are produced using a low-frequency modulation technique and a multicarrier pulse width method. Experimental findings at various loading or voltage situations are reported, examining inverter losses, efficiency, and %THD. Nidhi Mishra et al. [ 10 ] present a novel medium voltage solar photovoltaic (PV) system based on the Scott-ternary solar multilevel converter (ST-MLC). Two voltage source converters (VSCs) feed a three-phase grid from a single solar PV array. The technique creates a nine-level, three-phase power conditioning system by connecting multiwinding transformers in a Scott fashion. To reduce losses, a closed-loop nearest level control approach is included. The system's performance is demonstrated by simulation results under steady-state and dynamic irradiance, considering different solar profiles. A real-time test bench validates the ST-MLC's performance, assessing its advantages over current systems. Sumit A et al. [ 11 ] emphasize the significance of multilevel inverters (MLIs) for high-quality electric power generation using stepped voltage levels. MLIs employ voltage sources, semiconductor switches, and capacitors to achieve this, available in symmetrical and asymmetrical types. Operating switches at fundamental frequencies enhances waveform quality, reducing the need for output-side filtering. The cascaded H-bridge (CHB) topology, powered by DC voltage sources or PV systems, offers advantages in power generation and voltage levels. Efforts focus on reducing components to boost efficiency, especially in solar PV-based inverters. Techniques like level boosting circuits (LBCs) aim to reduce the required number of switches and manage voltage output stress effectively. Sumit Trimukhe et al. [ 12 ] present an innovative approach for improving power quality and mitigating harmonics in grid-connected multilevel inverters. This approach involves a combination of repeating units, a level boosting network, and an H-bridge to produce multiple output voltage levels. By incorporating repeating units, the technique minimizes the number of switches, streamlining the overall system and enhancing efficiency. The level boosting network plays a crucial role in elevating performance by increasing the available output voltage levels. Simulation results underscore the effectiveness of this approach in reducing losses and minimizing harmonics, making it a promising solution for enhancing power quality. Venkata Sireesha Nagineni et al. [ 13 ] discuss the implementation of an asymmetric multilevel inverter for solar photovoltaic applications using the N-R approach. The inverter minimizes components and reduces lower-order dominant harmonics using selective harmonic elimination-based pulse width modulation (SHEPWM). The paper compares the Total Harmonic Distortion (THD) to previous studies, finding decreased THD levels. The SHEPWM control method's efficiency in reducing harmonics and improving multilevel converter performance is examined. Relevant research, including studies on cascading 15-level asymmetric inverters and modular multilevel inverters powered by solar photovoltaics, is cited. Kalaiarasi et al. [ 14 ] explore switch faults in multilevel inverters, focusing on open circuit faults (OCF). OCF can lead to component failure and system downtime, particularly in applications like solar power systems, battery management systems, adjustable speed drives, and grid-connected setups. Fault-tolerant inverters play a crucial role in maintaining system reliability and safety, employing control techniques to maintain load power balance and swiftly restore normal operation. Integrating fault tolerance into multilevel inverter design is essential for enhancing reliability and performance. Mahendra Lalwani et al. [ 15 ] compare a proposed Reduced Switch Multilevel Inverter (RS MLI) with newly created MLI topologies. Switching angles for MLI switches are generated using optimization techniques. The output voltage of MLIs is synthesized using the SHE approach, which calculates the best switching angles to eliminate certain harmonics. Optimization techniques like the Newton-Raphson method and bio-inspired algorithms like GA-based harmonic elimination are applied to increase system robustness. The study investigates THD for PV-based cascaded multilevel inverters and compares the RS MLI configuration's performance, emphasizing its potential to enhance power quality and system efficiency. 4. DESIGN AND SWITCHINNG OF MULTILEVEL INVERTER The block diagram of the proposed system includes several components such as a PV array, inverters, an LCL filter circuit, and a CRO for observation, all of which were utilized to achieve the desired results. 4.1 BLOCK DIAGRAM OF THE PROPOSED SYSTEM Figure 2 illustrates the block diagram of our proposed system. The inverter system we developed starts with a transformer and rectifier setup designed to handle various input ratings. The rectified DC output is then regulated through 6V, 12V, and 24V voltage regulators, which maintain stable voltage levels for the subsequent stages. Driver ICs and PIC microcontrollers are integral to the process, with the driver ICs providing pulses to MOSFET switches in the inverter circuit based on instructions from the PIC microcontroller. This setup allows for precise control over the switching of the MOSFETs. The inverter circuit itself is composed of 12 MOSFET switches arranged to produce a 15-level output. By toggling these switches in response to pulse signals, the circuit effectively converts DC power into AC, providing precise voltage control and waveform modulation. Through the coordinated operation of these components, our system ensures reliable and versatile power conversion while meeting different voltage requirements. In our proposed inverter system, we start with a PV-array made up of solar panels with varying ratings. These panels are connected to a modified H-bridge circuit, which consists of three separate inverter circuits. Each inverter circuit receives input from three solar panels and converts the DC power generated by the solar panels into AC power. The three inverters are configured to form an H-bridge circuit, utilizing a total of twelve IGBT switches, with four switches per inverter circuit. This arrangement is crucial for achieving our goal of reducing harmonic distortion to 15 levels. By utilizing these twelve IGBT switches, we can effectively manage switching losses and ensure precise control over the system. The AC output from the inverter circuit is then fed into an LCL filter circuit—comprised of inductor-capacitor-inductor components—which plays a vital role in reducing the total harmonic distortion (THD) in the AC output signal. Reducing THD is essential for ensuring that the AC output is clean and meets the required quality standards. Finally, the filtered AC power with reduced harmonic distortion is passed on to an R-load for testing purposes. This R-load helps evaluate the performance and quality of the AC power generated by our system. Through this comprehensive setup, we aim to achieve efficient and clean AC power generation from various solar panel inputs while minimizing harmonic distortion to improve power quality. 4.2 CIRCUIT AND COMPONENTS The proposed project circuit comprises three different solar panels and twelve IGBT switches, along with an LCL filter circuit. Each switch is equipped with its own pulse generator, all contained within a closed substation circuit connected to an R-load. 4.2.1 COMPONENTS USED IN CIRCUIT The proposed solar panel system features three panels that convert solar radiation into DC power using photovoltaic cells (PV). These panels operate at a temperature of 25°C and an irradiance level of 1000 watts per square meter. IGBT, or Insulated-Gate Bipolar Transistor, is a crucial power semiconductor device commonly used in high-power electronic circuits. It combines aspects of Bipolar Junction Transistors (BJTs) and Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), offering a blend of their benefits. IGBTs excel in low-frequency applications, typically below 20 kHz, and are unidirectional, meaning they conduct current in only one direction. Despite their slower switching speed compared to MOSFETs, IGBTs are highly efficient in switching high currents with relatively low voltage, making them essential in power electronics. The LCL filter—consisting of an inductor-capacitor-inductor—is specifically designed to minimize harmonic distortion in currents produced by power converters. It effectively reduces Total Harmonic Distortion (THD) by employing inductors and capacitors with low values. In this setup, the inductance is 4.6 mH, and the capacitance is 34 microfarads. 4.2.2 CIRCUIT OF MULTILEVEL INVERTER Figure 3 illustrates the advanced power electronics circuit designed to efficiently manage three distinct photovoltaic (PV) arrays with voltages of 5V, 10V, and 20V. These arrays are linked to each inverter circuit within a modified H-bridge configuration, which includes a total of 12 IGBT switches. The modified H-bridge operates across 28 different modes, each tailored to specific voltage conversion needs. During these modes, various switches in the H-bridge are activated or deactivated to achieve the desired voltage levels. For instance, to generate a 5V step, switches S1 and S4 are turned on while the remaining switches are short-circuited. The transitions between modes and the switching actions are managed automatically by pulse generators linked to each switch. These pulse generators produce pulses with precise delay timings to control the switching sequence and achieve the targeted output voltage levels. Each operational mode involves activating a specific combination of switches to reach the desired voltage step. For example, to generate a 15V step, the first and second inverters use switches S1, S4, S5, and S8 in the ON position. To achieve a total of 15 voltage steps, a strategic approach is employed to control the switches, considering both positive and negative cycles. This results in a well-regulated AC waveform with minimized harmonic distortion. Additionally, the system includes a filter circuit to further reduce the total harmonic distortion (THD) in the AC output, ensuring a clean and pure sine wave suitable for grid integration and power supply applications. This setup significantly improves the quality and reliability of power in renewable energy systems. 4.3 CIRCUIT DIAGRAM OF MODIFIED H-BRIDGE Figure 4 depicts a Modified H-Bridge, an advanced variation of the traditional H-Bridge topology commonly used in power electronics and control systems. While a standard H-Bridge comprises four switching elements arranged in an "H" shape, allowing for bidirectional control of a load such as a motor, the Modified H-Bridge introduces enhancements to achieve specific goals. These modifications may involve changes in switch types (e.g., using IGBTs or MOSFETs), adjustments in switching strategies, or the addition of supplementary circuitry. The purpose of these enhancements is to improve efficiency, reduce losses, enhance control, or lower the overall component count, thereby optimizing performance. 4.4 SWITCHING SEQUENCE The switching modes of operation are divided into positive and negative cycles, each featuring 14 voltage levels achieved through 12 switching actions, resulting in a total of 15 distinct levels. Table 1 positive sequence operation of switches switch/ voltage 0 V1 V2 V1 + V2 V3 V3 + V1 V2 + V3 V1 + V2 + V3 V2 + V3 V3 + V1 V3 V1 + V2 V2 V1 S1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 S2 1 0 1 0 1 0 1 0 1 0 1 0 1 0 S3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 S4 0 1 0 1 0 1 0 1 0 1 0 1 0 1 S5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 S6 1 1 0 0 1 1 0 0 0 1 1 0 0 1 S7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 S8 0 0 1 1 0 0 1 1 1 0 0 1 1 0 S9 1 1 1 1 1 1 1 1 1 1 1 1 1 1 S10 1 1 1 1 0 0 0 0 0 0 0 1 1 1 S11 0 0 0 0 0 0 0 0 0 0 0 0 0 0 S12 0 0 0 0 1 1 1 1 1 1 1 0 0 0 Table 1 illustrates the operation of the switches during positive sequences, with 12 switches activated across 14 different voltage levels. Table 2- Negative sequence operation of switches switch/voltage 0 -V1 -V2 -V1-V2 -V3 -V3-V1 -V2-V3 -(V1 + V2 + V3) -(V2 + V3) -(V3 + V1) -(V3) -(V1 + V2) -(V2) -(V1) S1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 S2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 S3 0 1 0 1 0 1 0 1 0 1 0 1 0 1 S4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 S5 1 1 0 0 1 1 0 0 0 1 1 0 0 1 S6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 S7 0 0 1 1 0 0 1 1 1 0 0 1 1 0 S8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 S9 1 1 1 1 0 0 0 0 0 0 0 1 1 1 S10 1 1 1 1 1 1 1 1 1 1 1 1 1 1 S11 0 0 0 0 1 1 1 1 1 1 1 0 0 0 S12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Table 2 shows the operation of the switches during the negative sequence, detailing which switches are turned on or off for different voltage levels. 4.5 ADVANTAGES OF MODIFIED H-BRIDGE Flexibility and Adaptability : The modified H-bridge offers significant flexibility in integrating diverse power sources and components, enabling the creation of adaptable power systems tailored to specific voltage and power needs. This feature is essential for incorporating various renewable energy sources and adjusting to different load requirements. Optimized Power Flow : Through strategic configuration of switching patterns and the addition of components like inductors and capacitors, the modified H-bridge optimizes power distribution within the circuit. This enhances overall system efficiency by minimizing losses and ensuring effective power utilization. Improved Efficiency : The design of the modified H-bridge ensures that a substantial portion of input power is converted and utilized effectively, reducing energy wastage and enhancing system efficiency. Enhanced Voltage Control : The modified H-bridge excels in precise control and adjustment of output voltage levels, which is crucial for applications requiring accurate voltage regulation, such as motor drives for optimal performance and speed control. Reduced Harmonics : The design allows for the incorporation of filters to reduce total harmonic distortion (THD) in the output waveform. Lower THD ensures cleaner power output, which is important for applications sensitive to harmonic distortions, such as sensitive electronic equipment. Bidirectional Power Flow : Like traditional H-bridges, the modified version supports bidirectional power flow, enabling efficient power direction in both directions. This is advantageous for applications where power needs to be fed back to the source or where bidirectional energy flow is needed. Integration of Multiple Sources : The modified H-bridge can seamlessly integrate multiple power sources, which is particularly useful in renewable energy systems. It effectively manages and balances contributions from various sources, such as solar panels, wind turbines, and fuel cells, ensuring a reliable and consistent power supply. 5. SIMULATION OF PROPOSED SYSTEM BY USING MATLAB The simulation of a PV-based 15-level inverter system using a modified H-bridge involves various components, including Maximum Power Point Tracking (MPPT), solar panels, inverter circuits, filter circuits, pulse generators, and an R-load. The proposed design integrates PV panels with a multilevel inverter to reduce switching power losses by employing a modified H-bridge. The simulation includes all necessary components to achieve the desired output efficiently. 5.1 SIMULATION OF THE INVERTER Figure 5 illustrates the simulation of a multilevel inverter system, which incorporates several components. The system operates using three inverter circuits, each powered by different solar panels. Each inverter circuit consists of four IGBT switches, totaling 12 switches arranged in parallel and series according to the H-bridge configuration. Pulse generators control each switch, providing the necessary pulses and timing delays for operation. A filter circuit is applied to reduce distortion in the output after the inverter. Additionally, a buck converter divides the total 30V from the panels into three distinct levels. Solar Panel The simulation features a PV-array with an irradiance of 1000 W/m² and a temperature of 25°C, designed to provide a consistent DC voltage to the inverter circuit over time. This system is integrated with MPPT (Maximum Power Point Tracking) to ensure optimal power extraction from the solar panels under varying conditions. MPPT Maximum Power Point Tracking is an advanced algorithm integrated into charge controllers to maximize the power output from photovoltaic (PV) modules. It identifies the voltage at which the PV panels produce their highest power, known as the peak power output voltage. IGBT The Insulated-Gate Bipolar Transistor (IGBT) is a crucial power semiconductor device used in high-power electronic circuits. It merges the advantages of MOSFETs and BJTs and is most effective at low frequencies, typically below 20 kHz. IGBTs conduct current in a single direction and are capable of efficiently switching high currents with relatively low voltage. However, they have slower switching speeds compared to MOSFETs, and the solar panel inverter operates with switches rated at approximately 600-650V. Buck Converter A buck converter is a type of DC-DC converter that steps down a higher input voltage to a lower output voltage. It works by rapidly switching a semiconductor component, storing energy in an inductor, and then releasing it to the load during the off-phase. Known for its efficiency, compact design, and minimal heat generation, buck converters are commonly used in battery-powered devices, LED lighting, voltage regulation, and power supplies to manage and regulate power effectively. 5.2 SWITCHING AND OPERATION The operation of the multilevel inverter involves a highly coordinated sequence of switching actions. It uses approximately 12 switching pulses, with precise timing delays for turning switches on and off, to achieve accurate voltage regulation and control. Each adjustment in the output voltage, whether increasing or decreasing, typically requires the activation or deactivation of about six switches. These switches are arranged to meet specific voltage levels. For each step-up or step-down in voltage, particular switches are turned on or off according to a predetermined pulse sequence and timing delays. This meticulous control allows the inverter circuit to adjust the output voltage efficiently, ensuring precise power conversion and distribution within the multilevel inverter system. 5.2.1 PULSE GENERATION Figure 6 illustrates the switching pulses for each switch, showing their operation intervals and specific timing with a 2-millisecond delay. 5.3 SWITCHING CHARACTERISTICS OF IGBT: Switching Characteristics of IGBT To activate an IGBT, a positive voltage is applied across the gate-emitter terminals. Once the gate voltage exceeds the threshold, the collector current I C begins to flow, and the collector-emitter voltage V CE starts to drop. The time it takes for the gate-emitter voltage V CE to reach the threshold and for I C to start increasing is known as the turn-on delay, denoted as td(on). The rise time (tr) represents the period during which the collector current I C reaches its full value and V CE decreases to its minimum. The total turn-on time of the IGBT encompasses these characteristics. IGBT Characteristics : In Fig. 7 , the V-I transfer characteristics of an IGBT device illustrate how the current through the power semiconductor device varies with changes in the voltage across it. Typically, the device operates in the linear region where current and voltage are directly proportional. The turn-on time t on is given by t on = t d(on) + t r To turn off the IGBT, the gate voltage is reduced. When the gate-emitter voltage drops to VGE1 (the voltage at which the IGBT exits saturation), the collector-emitter voltage V CE begins to rise. The duration required to lower the voltage to VGE1 is known as the turn-off delay, or t d(off) As V CEV reaches the supply voltage, the collector current I C rapidly decreases until it reaches the threshold value V GE(th) . This rapid reduction in collector current is mainly due to the internal MOSFET. Even after the gate voltage returns to zero, I C continues briefly because of stored carriers, known as the internal BJT current. Thus, the IGBT's turn-off delay is longer than that of the MOSFET and is described by: t OFF = t d(off) + t rv + t fi1 + t fi2 Where: - t rv represents the voltage rise time. - t fi1 stands for MOSFET current fall time. - t fi2 denotes BJT current fall time. 5.4 VARIOUS MODES OF OPERATION A 15-level inverter equipped with 12 switches and 28 operational modes is a sophisticated power electronics system. Detailing all possible switch state combinations in a single paragraph is quite intricate. However, here is a high-level summary: A 15-level inverter, also known as a multilevel inverter, can produce 15 distinct output voltage levels. These inverters are often used in applications requiring high-quality voltage waveforms, such as motor drives and renewable energy systems. With 12 switches, each having two possible states (ON or OFF), there are 2 12 (4096) potential switch state combinations. To generate the 15 output voltage levels, the states of the switches must be precisely controlled. This control is typically achieved using modulation techniques like pulse-width modulation (PWM). MODE 1 OPERATES IN 0V Table-3 Mode of operation in zero voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 1 1 0 0 1 1 0 0 1 1 0 0 Table 3 illustrates the zero voltage mode of operation, where the voltage waveform is insignificant and the current remains zero. In this mode, six switches—specifically S1, S2, S5, S6, S9, and S10—are in the ON position, while the remaining six switches out of the twelve are turned OFF. MODE 2 OPERATES IN 5V Table-4 Mode of operation in 5 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 1 0 0 1 1 1 0 0 1 1 0 0 Table 4 and Figure 8 depict the operation of the switches at 5V, showing the current flow through the switches from S1 to S4 and through the load. In this mode, the switches S1, S4, S5, S6, S9, and S10 are in the ON position. MODE 3 OPERATES IN 10V Table-5 Mode of operation in 10 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 1 1 0 0 1 0 0 1 1 1 0 0 Figure 9 illustrates the operation of the inverter circuit at 10V, while Table 5 shows the corresponding switching sequence. In this mode, the switches S1, S2, S5, S8, S9, and S10 are in the ON position. MODE 4 OPERATES IN 15V Table-6 Mode of operation in 15 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 1 0 0 1 1 0 0 1 1 1 0 0 Figure 10 represents the operation of the inverter circuit at 15V, and Table 6 details the switching sequence. In this configuration, the switches S1, S4, S5, S8, S9, and S10 are in the ON position. MODE 5 OPERATES IN 20V Table-7 Mode of operation in 20 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 1 1 0 0 1 1 0 0 1 0 0 1 Figure 11 depicts the operation of the inverter circuit at 20V, while Table 7 details the switching sequence. In this mode, the switches S1, S2, S5, S6, S9, and S12 are in the ON position. MODE 6 OPERATES IN 25V Table-8 Mode of operation in 25 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 1 0 0 1 1 1 0 0 1 0 0 1 Figure 12 shows the operation of the inverter circuit at 25V, and Table 8 outlines the corresponding switching sequence. In this setup, the switches S1, S4, S5, S6, S9, and S12 are in the ON position. MODE 7 OPERATES IN 30V Table-9 Mode of operation in 30 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 1 1 0 0 1 0 0 1 1 0 0 1 Figure 13 illustrates the operation of the inverter circuit at 30V, while Table 9 provides the switching sequence. In this mode, the switches S1, S2, S5, S8, S9, and S12 are in the ON position. MODE 8 OPERATES IN 35V Table-10 Mode of operation in 35 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 1 0 0 1 1 0 0 1 1 0 0 1 Figure 14 depicts the operation of the inverter circuit at 35V, with Table 10 detailing the switching sequence. In this configuration, the switches S1, S4, S5, S8, S9, and S12 are in the ON position. MODE 9 OPERATES IN -5V Table-11 Mode of operation in -5 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 0 1 1 0 1 1 0 0 1 1 0 0 Figure 15 shows the operation of the inverter circuit at -5V, and Table 11 outlines the switching sequence for the negative cycle. In this mode, the switches S2, S3, S5, S6, S9, and S10 are in the ON position. MODE 10 OPERATES IN -10V Table-12 Mode of operation in -10 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 1 1 0 0 0 1 1 0 1 1 0 0 Figure 16 illustrates the operation of the inverter circuit at -10V, while Table 12 details the switching sequence for the negative cycle. In this mode, the switches S1, S2, S6, S7, S9, and S10 are in the ON position. MODE 11 OPERATES IN -15V Table-13 Mode of operation in -15 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 0 1 1 0 0 1 1 0 1 1 0 0 Figure 17 shows the operation of the inverter circuit at -15V, with Table 13 providing the switching sequence for the negative cycle. In this mode, the switches S2, S3, S6, S7, S9, and S10 are in the ON position. MODE 12 OPERATES IN -20V Table-14 Mode of operation in -20 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 1 1 0 0 1 1 0 0 0 1 1 0 Figure 18 illustrates the operation of the inverter circuit at -20V, and Table 14 details the switching sequence for the negative cycle. In this configuration, the switches S1, S2, S5, S6, S10, and S11 are in the ON position. MODE 13 OPERATES IN -25V Table-15 Mode of operation in -25 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 0 1 1 0 1 1 0 0 0 1 1 0 Figure 19 depicts the operation of the inverter circuit at -25V, and Table 15 details the switching sequence for the negative cycle. In this mode, the switches S2, S3, S5, S6, S10, and S11 are in the ON position. MODE 14 OPERATES IN -30V Table-16 Mode of operation in -30 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 1 1 0 0 0 1 1 0 0 1 1 0 Figure 20 shows the operation of the inverter circuit at -30V, with Table 16 detailing the switching sequence for the negative cycle. In this setup, the switches S1, S2, S6, S7, S10, and S11 are in the ON position. MODE 15 OPERATES IN -35V Table-17 Mode of operation in -35 voltage S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 0 1 1 0 0 1 1 0 0 1 1 0 Figure 21 illustrates the operation of the inverter circuit at -35V, while Table 17 provides the switching sequence for the negative cycle. In this mode, the switches S2, S3, S6, S7, S10, and S11 are in the ON position. 5.5 PV-ARRAY AND FILTER CIRCUIT The use of the PV array and filter is crucial for ensuring the proper operation of the system, as well as for achieving harmonic reduction with fewer switches. The PV array provides the necessary power, while the filter helps to mitigate harmonics and improve the quality of the output waveform, making the overall system more efficient and effective. 5.5.1 PV-ARRAY ARRANGEMENTS A photovoltaic (PV) array formation involves the arrangement or interconnection of PV modules within a solar panel system. The literature suggests various array interconnection arrangements to optimize system performance and minimize mismatch losses. Some key topologies include: · Bridge-Linked (BL) · Honey-Comb (HC) · Series-Parallel (SP) · Total-Cross-Tied (TCT) These configurations are designed to enhance the overall output efficiency, system reliability, and maintenance of the solar PV system. 5.5.2 L-C-L FILTER A filter circuit, commonly known as an LC filter circuit, is used to separate DC components from the rectified output by eliminating AC components. It consists of an inductor (L) and a capacitor (C), ensuring that only the desired DC power is delivered to the load while minimizing unwanted AC ripple. LCL filters are specifically designed to reduce harmonic distortion in the current drawn by power converters with rectifier input stages, such as motor frequency converters and UPS systems. These filters include a combination of reactors and capacitors arranged in a parallel-series configuration, which effectively lowers Total Harmonic Distortion (THD) from the rectifiers and enhances overall power quality. The LCL filter comprises three elements: a grid-side inductor, an inverter-side inductor, and a filter capacitor. 5.5 PV-ARRAY AND FILTER CIRCUIT The use of the PV array and filter is crucial for ensuring the proper operation of the system, as well as for achieving harmonic reduction with fewer switches. The PV array provides the necessary power, while the filter helps to mitigate harmonics and improve the quality of the output waveform, making the overall system more efficient and effective. 5.5.1 PV-ARRAY ARRANGEMENTS A photovoltaic (PV) array formation involves the arrangement or interconnection of PV modules within a solar panel system. The literature suggests various array interconnection arrangements to optimize system performance and minimize mismatch losses. Some key topologies include: Bridge-Linked (BL) Honey-Comb (HC) Series-Parallel (SP) Total-Cross-Tied (TCT) These configurations are designed to enhance the overall output efficiency, system reliability, and maintenance of the solar PV system. 5.5.2 L-C-L FILTER A filter circuit, commonly known as an LC filter circuit, is used to separate DC components from the rectified output by eliminating AC components. It consists of an inductor (L) and a capacitor (C), ensuring that only the desired DC power is delivered to the load while minimizing unwanted AC ripple. LCL filters are specifically designed to reduce harmonic distortion in the current drawn by power converters with rectifier input stages, such as motor frequency converters and UPS systems. These filters include a combination of reactors and capacitors arranged in a parallel-series configuration, which effectively lowers Total Harmonic Distortion (THD) from the rectifiers and enhances overall power quality. The LCL filter comprises three elements: a grid-side inductor, an inverter-side inductor, and a filter capacitor. 6. MATLAB SIMULATION OUTPUT WAVEFOREMS AND COMPARISION OF RESULTS FOR THE PROPSED SYSTEM 6.1 15-LEVEL STEPPED WAVEFORM WITHOUT USING FILTER Figure 22 illustrates the output waveform from the 15-level inverter, showcasing reduced harmonic distortion and a pure sine wave voltage. This waveform closely resembles a sinusoidal waveform, indicating high efficiency in power conversion. In renewable energy systems, such as solar or wind power, the 15-level inverter is utilized for harmonic reduction and improved power conversion efficiency. While the 15-level inverter can achieve a Total Harmonic Distortion (THD) below 10%, this performance may vary depending on the control methods and algorithms used. 6.2 SINE WAVEFORM USING FILTER The sine waveform produced by the filter circuit further reduces the harmonic percentage of the output waveform. The extent of harmonic reduction depends on factors such as the filter circuit design, the inverter levels, and the number of switches used in the proposed circuit. Figure 23 illustrates the waveform obtained from using the multilevel inverter circuit along with the L-C-L filter, showing a pure sine wave with only about 7.55% harmonics. This waveform, derived from a 15-level inverter, indicates a high-quality output that can be used directly in industrial applications for DC to AC conversion. Due to external factors such as shadow, dirt, cracks, prolonged usage, and varying weather conditions, solar panels may not consistently produce the same values. To address this variability, the proposed work includes three different solar panels with varying voltage outputs. These are connected to a buck converter to maintain a low voltage for simulation purposes. 6.3 FFT ANALYSIS The FFT (Fast Fourier Transform) analysis has been performed to determine the Total Harmonic Distortion (THD) percentage and the level of harmonics present in the waveform. This analysis provides insights into the harmonic content and the purity of the output waveform, essential for assessing the performance of the inverter system. Table 18 Comparison of step and sine waveforms. Fundamentals of stepped waveform Fundamentals of sine waveform Sampling time 1e-06 sec. Sampling time 1e-06 sec. Samples per cycle 20000. Samples per cycle 20000. DC component 0.0003121. DC component 1.293. Fundamental 30.57. Fundamental 26.64. THD 14.40%. THD 7.55%. Table 18 presents a comparison of values for both the stepped waveform and the sine waveform. This comparison highlights the differences in performance metrics such as harmonic distortion, efficiency, and overall waveform quality between the two types of waveforms. Figure 24 Graphical representation of THD without filter circuit. Figure 24 offers a visual representation of the FFT analysis, illustrating the evaluation of Total Harmonic Distortion (THD). The analysis reveals that the THD is most pronounced in the third-order harmonics, with a value of 14.4%. However, for higher-order harmonics, such as the fifth order and above, the THD decreases progressively. This highlights the importance of identifying specific harmonic contributions to signal distortion and underscores the need to focus on mitigating third-order harmonics to enhance signal quality. In Fig. 25 , it is evident that the application of the filter circuit has resulted in a substantial reduction of third-order harmonics, now reduced to 7.03%, a notable decrease from the value observed previously. Additionally, the reduction in higher-order harmonics, such as the fifth order and beyond, is even more significant. This demonstrates the effectiveness of the filter circuit in mitigating harmonic distortions, particularly for higher-order harmonics, and thereby enhancing overall signal quality. 6.4 HARDWARE IMPLEMENTATION Figure 26 depicts the hardware implementation of the inverter, featuring 12 MOSFETs, a driver IC for each switch, and an R-load. A microcontroller is used to determine the switching sequence and obtain the output waveform. 6.5 OUTPUT WAVEFORM FROM HARDWARE Figure 27 showcases the capabilities of a 15-level multilevel inverter, emphasizing its importance in contemporary power systems. Its ability to generate finely stepped voltage levels and deliver superior voltage quality highlights its role as a significant advancement in energy conversion technology. 7. CONCLUSION AND FUTURE SCOPE 7.1 CONCLUSION In conclusion, the implementation of a 15-level multilevel inverter using a modified H-bridge structure and an LCL filter provides an efficient and robust power conversion solution for photovoltaic (PV) systems. This design enhances voltage levels, improves output waveform quality, and reduces harmonic distortion, making it ideal for seamless integration with PV systems. It enhances power quality, reduces losses, and facilitates the integration of renewable energy sources into the grid. Our paper addressed the challenges associated with achieving high-level voltage output and high-quality waveforms. Through meticulous design and simulation, we demonstrated the feasibility and effectiveness of this system. The modified H-bridge topology and LCL filter yielded a clean and stable sine wave output, boosting efficiency and minimizing harmonic distortion. This paper highlights the potential of multilevel inverters for diverse applications, including renewable energy systems and motor drives, by achieving a 15-level output. In summary, this project represents a significant advancement in multilevel inverters, contributing to cleaner and more efficient energy conversion and fostering innovation in sustainable energy solutions. 7.2 FUTURE SCOPE The PV 15-level multilevel inverter with a modified H-bridge circuit topology and 12 switches represents a groundbreaking advancement in renewable energy technologies, offering a promising vision for the future. This innovative technology presents numerous opportunities and challenges in the realm of sustainable energy systems. Optimizing efficiency is a crucial focus for future research. The 15-level inverter's ability to achieve high voltage resolution and reduced harmonic distortion necessitates the development of advanced control algorithms for enhanced efficiency. A significant aspect of this effort involves creating sophisticated control strategies for bidirectional power flow to ensure seamless integration into modern power grids. The design of the 15-level inverter can alleviate stress on critical power electronic components, leading to improved longevity, reduced maintenance costs, and extended service life. This also contributes to lowering the life cycle costs for PV system owners. Another important consideration is the efficiency of production processes and the reduction of manufacturing costs. Future efforts will aim to enhance design, material selection, and production methods to improve cost-effectiveness and accessibility, making this technology more prevalent in the renewable energy sector. Integrating the 15-level inverter with energy storage systems, such as battery systems, represents a significant area of research. This integration promises to improve grid stability, enable peak shaving, and ensure a reliable energy supply during periods of renewable generation. Additionally, synchronizing this technology with smart grids is an ambitious but vital possibility. By incorporating robust communication interfaces and network management protocols, the 15-level inverter can support advanced network monitoring and control capabilities, which are essential for contemporary network management practices. Declarations Author Contribution Sarathkumar D wrote the main manuscript text and Raymon Antony Raj prepared all figures. Sarathkumar D and Raymon Antony Raj both of them reviewed the manuscript. References Sumit, R A Sanjeevkumar, “A novel generalised topology of a reduced part count multilevel inverter with level boosting network to improve the quality of supply”, Global Transitions Proceedings, Volume 2, Issue 2, 2021, Pages 238-245, ISSN 2666-285X, https://doi.org/10.1016/j.gltp.2021.08.019. Viswanathan and B. Anand.(2022) “Performance Enhancement of PV Based Boost Cascaded Fifteen Level Inverterfor AC Loads” Tech science press, vol.42, no.1.pp. 165-181. Krishnachaitanya and A.Chitra,(2021) "Quantitative Analysis of Asymmetric Multilevel Inverters With Reduced Device Count From Reliability and Cost Function Perspective—A Review," in IEEE Transactions on Power Electronics, vol. 36, no. 10, pp. 11068-11086. Vijayalakshmi N, “Photovoltaic fed multilevel inverter design using PODPWM technique for improved power quality”, International Journal of Advances in Signal and Image Sciences, vol. 5, no. 1, pp. 8–14, Jun. 2019. J. G. Shankar, J. B. Edward and E. Neeraja, "Performance evaluation of a nine level cascaded multilevel inverter with single DC source for photovoltaic system," 2017 Innovations in Power and Advanced Computing Technologies (i-PACT) , Vellore, India, 2017, pp. 1-8, doi: 10.1109/IPACT.2017.8245215. Mahto, K.K., Pal, P.K., Das, P. et al. A New Design of Multilevel Inverter Based on T-type Symmetrical and Asymmetrical DC Sources. Iran J Sci Technol Trans Electr Eng 47 , 639–657 (2023). https://doi.org/10.1007/s40998-022-00568-4 M. Anusuya, R. Geetha & R. Ilango (2023) Design of a 15-Level Non-Modular Multilevel-Inverter in a Grid-Connected Solar PV System: A Hybrid ZOA-SNN Technique, IETE Journal of Research, DOI: 10.1080/03772063.2023.2255550. C. Dhanamjayulu, S. Padmanaban, J. B. Holm-Nielsen and F. Blaabjerg, "Design and Implementation of a Single-Phase 15-Level Inverter With Reduced Components for Solar PV Applications," in IEEE Access , vol. 9, pp. 581-594, 2021, doi: 10.1109/ACCESS.2020.3046477. Mahato, B., Majumdar, S., Jana, K.C. et al. A Generalized Series-Connected Multilevel Inverter (MLI) Based on Reduced Power Electronic Devices for Symmetrical/Asymmetrical Sources. Arab J Sci Eng 48 , 5907–5924 (2023). https://doi.org/10.1007/s13369-022-07066-z S. K. Yadav, N. Mishra and B. Singh, "Multilevel Converter With Nearest Level Control for Integrating Solar Photovoltaic System," in IEEE Transactions on Industry Applications , vol. 58, no. 4, pp. 5117-5126, July-Aug. 2022, doi: 10.1109/TIA.2022.3177399. Qanbari and B. Tousi,(2021)"Single-Source Three-Phase Multilevel Inverter Assembled by Three-Phase Two-Level Inverter and Two Single-Phase Cascaded H-Bridge Inverters," IEEE Transactions on Power Electronics, vol. 36, no. 5, pp. 5204-5212. K. P. Panda, S. S. Lee and G. Panda, "Reduced Switch Cascaded Multilevel Inverter with New Selective Harmonic Elimination Control for Standalone Renewable Energy System," in IEEE Transactions on Industry Applications , vol. 55, no. 6, pp. 7561-7574, Nov.-Dec. 2019, doi: 10.1109/TIA.2019.2904923. Kumar, D.G., Bhoopal, N., Ganesh, A., Sireesha, N.V., Rao, D.S.N.M. (2023). Implementation of an asymmetric multilevel inverter for solar photovoltaic applications using N-R approach. Journal of New Materials for Electrochemical Systems, Vol. 26, No. 1, pp. 7-17. https://doi.org/10.14447/jnmes.v26i1.a02. Kalaiarasi, Omer, P., Kumar, J. and Surjan, B.S., (2020). "Multilevel Converter With Nearest Level Control for Integrating Solar Photovoltaic System", IEEE Access, vol 8, pp.22281-22302. Gopal, Y., Birla, D. & Lalwani, M. Reduced switches multilevel inverter integration with boost converters in photovoltaic system. SN Appl. Sci. 2 , 58 (2020). https://doi.org/10.1007/s42452-019-1848-7. Additional Declarations No competing interests reported. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. 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Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-4955687","acceptedTermsAndConditions":true,"allowDirectSubmit":true,"archivedVersions":[],"articleType":"Research Article","associatedPublications":[],"authors":[{"id":347713767,"identity":"cba4f405-887f-413c-b3ce-2c9d4577ac08","order_by":0,"name":"D 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8","display":"","copyAsset":false,"role":"figure","size":23009,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in 5 voltage\u003c/p\u003e","description":"","filename":"8.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/1d98dcff129defbb43333f70.png"},{"id":65175366,"identity":"520d4abf-8af2-4b01-80a5-114c9704fc90","added_by":"auto","created_at":"2024-09-24 11:51:53","extension":"png","order_by":9,"title":"Figure 9","display":"","copyAsset":false,"role":"figure","size":26788,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in 10 voltage\u003c/p\u003e","description":"","filename":"9.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/2e477d69490c09c170d300b4.png"},{"id":65178578,"identity":"c739eeb4-fd7c-4247-aba7-02153c967fca","added_by":"auto","created_at":"2024-09-24 12:23:52","extension":"png","order_by":10,"title":"Figure 10","display":"","copyAsset":false,"role":"figure","size":26186,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in 15 voltage\u003c/p\u003e","description":"","filename":"10.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/17e8626934b3cd54528eebb2.png"},{"id":65175361,"identity":"2118e65e-c665-4d5a-bbf7-bc6102bc8da3","added_by":"auto","created_at":"2024-09-24 11:51:52","extension":"png","order_by":11,"title":"Figure 11","display":"","copyAsset":false,"role":"figure","size":27350,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in 20 voltage\u003c/p\u003e","description":"","filename":"11.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/5e771da880cfed9bdb20cada.png"},{"id":65177708,"identity":"aeeb3e8a-48e2-4132-aaea-8e2d734c3c15","added_by":"auto","created_at":"2024-09-24 12:15:52","extension":"png","order_by":12,"title":"Figure 12","display":"","copyAsset":false,"role":"figure","size":31904,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in 25 voltage\u003c/p\u003e","description":"","filename":"12.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/6ec4cbdab80ee0d78b8cee41.png"},{"id":65176639,"identity":"f92b9735-73c4-4994-9e33-e26de24baa0e","added_by":"auto","created_at":"2024-09-24 11:59:52","extension":"png","order_by":13,"title":"Figure 13","display":"","copyAsset":false,"role":"figure","size":30095,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in 30 voltage\u003c/p\u003e","description":"","filename":"13.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/f098859f1c64dc0cd4176c67.png"},{"id":65176637,"identity":"428c28c0-3df4-48bb-8259-43950f8c77f9","added_by":"auto","created_at":"2024-09-24 11:59:52","extension":"png","order_by":14,"title":"Figure 14","display":"","copyAsset":false,"role":"figure","size":27242,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in 35 voltage\u003c/p\u003e","description":"","filename":"14.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/ec34abd022ab508de8213a81.png"},{"id":65175357,"identity":"e6d3c18e-5f7e-47af-a66e-ad752b90eda6","added_by":"auto","created_at":"2024-09-24 11:51:52","extension":"png","order_by":15,"title":"Figure 15","display":"","copyAsset":false,"role":"figure","size":25820,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in -5 voltage\u003c/p\u003e","description":"","filename":"15.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/bdf67cd6cc986e1f4ed1f360.png"},{"id":65176888,"identity":"651e6049-b5e6-4cc6-a4c7-c1e20a624a3c","added_by":"auto","created_at":"2024-09-24 12:07:52","extension":"png","order_by":16,"title":"Figure 16","display":"","copyAsset":false,"role":"figure","size":24229,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in -10 voltage\u003c/p\u003e","description":"","filename":"16.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/1c397ae747c35054385b2db1.png"},{"id":65176640,"identity":"60938853-96b9-4b46-a9b2-08f39db376fc","added_by":"auto","created_at":"2024-09-24 11:59:53","extension":"png","order_by":17,"title":"Figure 17","display":"","copyAsset":false,"role":"figure","size":26064,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in -15 voltage\u003c/p\u003e","description":"","filename":"17.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/611d9234c29b37a37a5220dd.png"},{"id":65175368,"identity":"6ebb122c-aeed-4107-a155-a4c05897999b","added_by":"auto","created_at":"2024-09-24 11:51:53","extension":"png","order_by":18,"title":"Figure 18","display":"","copyAsset":false,"role":"figure","size":26533,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in -20 voltage\u003c/p\u003e","description":"","filename":"18.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/6d003b991db61702113ad123.png"},{"id":65175372,"identity":"e33a2fde-38a5-4fd0-83f2-5d900fab058b","added_by":"auto","created_at":"2024-09-24 11:51:53","extension":"png","order_by":19,"title":"Figure 19","display":"","copyAsset":false,"role":"figure","size":23788,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in -25 voltage\u003c/p\u003e","description":"","filename":"19.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/13ccb7286e1ab5f88243c742.png"},{"id":65175370,"identity":"963438b9-fc2e-4f12-a5e6-073d62ae6a6f","added_by":"auto","created_at":"2024-09-24 11:51:53","extension":"png","order_by":20,"title":"Figure 20","display":"","copyAsset":false,"role":"figure","size":17875,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in -30 voltage\u003c/p\u003e","description":"","filename":"20.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/98ec68d8578b0db1766bbbfe.png"},{"id":65175374,"identity":"9f95ff06-fb33-4259-b0d8-a62b24330bf5","added_by":"auto","created_at":"2024-09-24 11:51:54","extension":"png","order_by":21,"title":"Figure 21","display":"","copyAsset":false,"role":"figure","size":17289,"visible":true,"origin":"","legend":"\u003cp\u003eMode of operation in -35 voltage\u003c/p\u003e","description":"","filename":"21.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/88102034a832fa73d48f141e.png"},{"id":65175365,"identity":"059d5a1f-856f-4684-82ad-97beabc0c1a2","added_by":"auto","created_at":"2024-09-24 11:51:53","extension":"png","order_by":22,"title":"Figure 22","display":"","copyAsset":false,"role":"figure","size":76959,"visible":true,"origin":"","legend":"\u003cp\u003e15-level stepped waveform without using filter\u003c/p\u003e","description":"","filename":"22.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/48c9baf85a50e0e39b71983a.png"},{"id":65175360,"identity":"17cd8d08-18b9-4b9c-a0f9-df1714ecd30c","added_by":"auto","created_at":"2024-09-24 11:51:52","extension":"png","order_by":23,"title":"Figure 23","display":"","copyAsset":false,"role":"figure","size":118879,"visible":true,"origin":"","legend":"\u003cp\u003ePure sine waveform using filter\u003c/p\u003e","description":"","filename":"23.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/cc981d54f32657aa5120f21a.png"},{"id":65175362,"identity":"e90aeb2b-f234-47df-ad0c-eb10ef071315","added_by":"auto","created_at":"2024-09-24 11:51:52","extension":"png","order_by":24,"title":"Figure 24","display":"","copyAsset":false,"role":"figure","size":264133,"visible":true,"origin":"","legend":"\u003cp\u003eGraphical representation of THD without filter circuit.\u003c/p\u003e","description":"","filename":"24.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/c0b5f6075edd442f5163f7ef.png"},{"id":65175371,"identity":"1d80ed80-ad7b-4594-9aad-d2a90f6433d2","added_by":"auto","created_at":"2024-09-24 11:51:53","extension":"png","order_by":25,"title":"Figure 25","display":"","copyAsset":false,"role":"figure","size":304968,"visible":true,"origin":"","legend":"\u003cp\u003eGraphical representation of THD after filter circuit.\u003c/p\u003e","description":"","filename":"25.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/f5a94ca23a662366e509643b.png"},{"id":65175367,"identity":"9473a779-e783-4ee7-a8a6-798e6d84f603","added_by":"auto","created_at":"2024-09-24 11:51:53","extension":"png","order_by":26,"title":"Figure 26","display":"","copyAsset":false,"role":"figure","size":1294799,"visible":true,"origin":"","legend":"\u003cp\u003eHardware implementation of inverter\u003c/p\u003e","description":"","filename":"26.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/c6f30ec15f4f99d6af3578fb.png"},{"id":65176641,"identity":"722448e6-2a1b-432c-aa51-e47671024424","added_by":"auto","created_at":"2024-09-24 11:59:54","extension":"png","order_by":27,"title":"Figure 27","display":"","copyAsset":false,"role":"figure","size":701894,"visible":true,"origin":"","legend":"\u003cp\u003eoutput waveform obtained from inverter\u003c/p\u003e","description":"","filename":"27.png","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/62f304567f5e564c42628a62.png"},{"id":65959212,"identity":"89cee62b-639f-47be-9c93-b68edd4c82bd","added_by":"auto","created_at":"2024-10-05 03:16:39","extension":"pdf","order_by":0,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":5534383,"visible":true,"origin":"","legend":"","description":"","filename":"manuscript.pdf","url":"https://assets-eu.researchsquare.com/files/rs-4955687/v1/4117920e-4fb2-4742-958a-904240af7965.pdf"}],"financialInterests":"No competing interests reported.","formattedTitle":"Design a multilevel inverter with a minimized switch count utilizing a modified H-bridge configuration","fulltext":[{"header":"1. INTRODUCTION","content":"\u003cp\u003eAn inverter converts DC voltage into AC voltage. A multilevel power inverter serves the same purpose but is designed for higher power and industrial applications. As the number of voltage levels increases, the number of switches also increases. Multilevel inverters achieve higher output voltage levels by stacking multiple power electronic switches in series, which allows them to generate smoother, nearly sinusoidal AC waveforms with reduced harmonic distortion. This research has significant implications for sectors such as renewable energy integration, where high-quality AC output is crucial for grid compatibility and efficient power transfer. Harmonic distortion refers to the presence of unwanted, non-sinusoidal components in the voltage and current waveforms of an electrical system.\u003c/p\u003e\n\u003cp\u003eIn recent years, the growing demand for renewable energy sources has driven the exploration of advanced power electronics and inverter technologies to enhance the efficiency, reliability, and performance of photovoltaic (PV) systems. Solar energy, a key renewable energy source, is vital for a sustainable and greener future. Effective harnessing and conversion of solar power into electricity require advanced power inverters. Multilevel inverters have emerged as a transformative solution, offering superior output waveform quality, reduced harmonics, and enhanced power handling capacity compared to conventional two-level inverters.\u003c/p\u003e\n\u003cp\u003eThis innovative inverter design aims to optimize energy conversion efficiency and integrate PV systems into the power grid effectively. By presenting a comprehensive analysis and validation of this inverter topology, this project seeks to contribute to the advancement of renewable energy integration and power electronics. The potential impact of this research lies in its ability to significantly improve solar energy utilization, promoting a sustainable and environmentally conscious energy landscape.\u003c/p\u003e\n\u003cp\u003eThe primary goal of this work is to achieve precise control of the output waveform by generating 15 distinct voltage levels through an intelligently designed inverter architecture. Multilevel inverters achieve higher output voltage levels by stacking multiple power electronic switches in series, enabling them to generate smoother, nearly sinusoidal AC waveforms with reduced harmonic distortion. The outcome of this research will have significant implications for various sectors, including renewable energy integration, where high-quality AC output is essential for grid compatibility and efficient power transfer. Harmonic distortion refers to the presence of unwanted, non-sinusoidal components in the voltage and current waveforms of an electrical system.\u003c/p\u003e\n\u003cp\u003eA multilevel inverter concept has been developed to effectively reduce harmonic levels using a modified H-bridge configuration, resulting in a decrease in the number of power switches required. In this specific 15-level inverter system, the switch count has been minimized to 12, achieved through a cascaded arrangement, with power input sourced from solar panels. The solar panels serve as the DC input for the inverter, transforming the direct current into alternating current, with the primary objective of keeping harmonic levels below 10% for optimal operation. Simulation tests have been conducted on the 15-level multilevel inverter, incorporating a filter circuit to refine the output waveform and further diminish harmonic distortions, resulting in a substantial decrease in total harmonic distortion (THD).\u003c/p\u003e\n\u003cp\u003eIn practical applications, it is acknowledged that solar panels may not deliver identical power outputs due to factors such as dust, shading, and weather conditions. Consequently, individual inverter circuits are tailored to accommodate variations in voltage from each panel source.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003e1.1\u0026nbsp;TYPES OF INVERTER\u003c/strong\u003e\u003c/p\u003e\n\u003cp\u003eInverters convert direct current (DC) electricity into alternating current (AC) electricity and are widely used in various applications, including residential, commercial, and industrial settings, to power devices that require AC power. Here are some common types of inverters, each designed for specific purposes:\u003c/p\u003e\n\u003cp\u003e1.\u0026nbsp; \u0026nbsp;\u003cstrong\u003eSquare Wave Inverter\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Generates a simple square wave output.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Inexpensive but not suitable for sensitive electronics due to the abrupt waveform.\u003c/p\u003e\n\u003cp\u003e2.\u0026nbsp; \u0026nbsp;\u003cstrong\u003eModified Sine Wave (Quasi-Sine Wave) Inverter\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Produces a waveform that approximates a sine wave but is not as smooth.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Suitable for most common household appliances and tools.\u003c/p\u003e\n\u003cp\u003e3.\u0026nbsp; \u0026nbsp;\u003cstrong\u003ePure Sine Wave Inverter\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Produces a smooth and continuous waveform that mimics grid-supplied electricity.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Compatible with all types of electronic devices and appliances, making it the most versatile option.\u003c/p\u003e\n\u003cp\u003e4.\u0026nbsp; \u0026nbsp;\u003cstrong\u003eGrid-Tie Inverter (Grid-Connected Inverter)\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Used in grid-tied solar power systems.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Converts DC power from solar panels into AC power and synchronizes it with the grid's frequency and voltage.\u003c/p\u003e\n\u003cp\u003e5.\u0026nbsp; \u0026nbsp;\u003cstrong\u003eOff-Grid Inverter\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Used in standalone or off-grid renewable energy systems (e.g., solar, wind, hydro) where there is no connection to the utility grid.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Converts DC power from batteries or renewable sources into AC power for household use.\u003c/p\u003e\n\u003cp\u003e6.\u0026nbsp; \u0026nbsp;\u003cstrong\u003eMicro Inverter\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Used in small-scale solar installations.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Each solar panel has its own micro inverter, which converts DC to AC right at the panel.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Provides advantages like improved energy harvesting and reduced shading effects.\u003c/p\u003e\n\u003cp\u003e7.\u0026nbsp; \u0026nbsp;\u003cstrong\u003eString Inverter\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Used in larger solar installations.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Several solar panels are connected in series (string) and the string inverter converts DC from the entire string into AC.\u003c/p\u003e\n\u003cp\u003e8.\u0026nbsp; \u0026nbsp;\u003cstrong\u003eCentral Inverter\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Commonly used in utility-scale solar installations.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Handles a large amount of DC power from multiple solar panels or arrays and converts it to AC.\u003c/p\u003e\n\u003cp\u003e9.\u0026nbsp; \u0026nbsp;\u003cstrong\u003eMultilevel Inverter\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Utilizes multiple levels of DC voltage to generate a nearly sinusoidal AC waveform.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Offers higher power quality and efficiency compared to traditional inverters.\u003c/p\u003e\n\u003cp\u003e10.\u0026nbsp;\u003cstrong\u003eVoltage Source Inverter (VSI)\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Maintains a constant voltage at its output while varying the frequency as needed.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Used in variable frequency drives (VFDs) for controlling the speed of AC motors.\u003c/p\u003e\n\u003cp\u003e11.\u0026nbsp;\u003cstrong\u003eCurrent Source Inverter (CSI)\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Maintains a constant current at its output while varying the voltage as needed.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Used in specific applications like high-power drives and renewable energy systems.\u003c/p\u003e\n\u003cp\u003e12.\u0026nbsp;\u003cstrong\u003eBidirectional Inverter\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Can convert power in both directions, either from DC to AC or AC to DC.\u003c/p\u003e\n\u003cp\u003eo\u0026nbsp;\u0026nbsp;Used in applications like energy storage systems, electric vehicles, and uninterruptible power supplies (UPS).\u003c/p\u003e\n\u003cp\u003eThese types of inverters each have unique advantages and applications, and the choice of inverter depends on the specific requirements of the system it will be used in.\u003c/p\u003e"},{"header":"2. OBJECTIVES AND EXPECTED OUTCOMES OF THE PROPOSED SYSTEM","content":"\u003cp\u003eThis paper delves into the detailed study, design, analysis, and execution of a PV-based 15-level multilevel inverter utilizing a modified H-bridge topology with 12 switches. The primary objective of this project is to achieve precise control of the output waveform by generating 15 distinct voltage levels through an intelligently designed inverter architecture. The modified H-bridge configuration, employing a reduced number of switches, balances complexity and performance. The key objectives of the proposed system are as follows:\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eA. Design and Simulation\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Develop a comprehensive understanding of multilevel inverter topologies, focusing on the modified H-bridge configuration with 12 switches.\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Use simulation tools to model and simulate the 15-level multilevel inverter to validate its theoretical feasibility.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eB. Voltage Level Generation\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Investigate methods to achieve 15 distinct voltage levels using the modified H-bridge topology with a minimized number of switches.\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Analyze and optimize the switching patterns to effectively achieve the desired voltage levels.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eC. Efficiency Enhancement\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Study and implement strategies to minimize switching losses and improve overall energy conversion efficiency.\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Explore techniques to optimize the inverter's performance while reducing power losses during the energy conversion process.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eD. Harmonic Distortion Reduction\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Evaluate the inverter's effectiveness in reducing harmonic distortion in the output voltage waveform compared to conventional two-level inverters.\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Assess the harmonic content and analyze methods to minimize distortion for improved power quality.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eE. Control and Modulation Strategy\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Design and implement intelligent control and modulation strategies to efficiently manage the switching of the 12 switches.\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Explore techniques to maintain precise control over the output waveform while minimizing switching losses.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eF. Practical Implementation Considerations\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Investigate the practical aspects of implementing the proposed inverter in a real-world PV system.\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Address challenges related to component selection, sizing, and thermal management, ensuring the inverter's feasibility and reliability for practical applications.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eG. Outcomes of the Project\u003c/strong\u003e:\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Successful simulation and validation of the 15-level multilevel inverter using the modified H-bridge topology, demonstrating its feasibility and theoretical accuracy.\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Achievement of the desired 15 distinct voltage levels, confirming the inverter's capability to provide precise waveform control for enhanced power quality in PV systems.\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Reduction of harmonic distortion in the output voltage waveform, indicating the inverter's efficiency in enhancing power quality compared to traditional two-level inverters.\u003c/p\u003e\n\u003cp\u003e·\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;Identification and implementation of efficient control and modulation strategies, resulting in minimized switching losses and increased energy conversion efficiency, contributing to sustainable energy utilization.\u003c/p\u003e\n\u003cp\u003e· \u0026nbsp; \u0026nbsp; \u0026nbsp;Insights into practical considerations for implementation, including component selection and thermal management, ensuring the proposed inverter's viability and potential for real-world applications in renewable energy systems.\u003c/p\u003e\n\u003cp\u003eThe differences between pure sine wave, square wave, and simulated sine wave are illustrated in figure 1.\u003c/p\u003e"},{"header":"3. LITERATURE SURVEY","content":"\u003cp\u003eThis section provides an overview of related research on the 15-level multilevel inverter. The development of multilevel inverters offers promising opportunities to address challenges posed by increasing inverter topologies. The following journal papers are referenced for this proposed system, providing insights into the use of multilevel inverters with different harmonic levels.\u003c/p\u003e \u003cp\u003eSumit K. Chattopadhyay et al. [\u003cspan citationid=\"CR1\" class=\"CitationRef\"\u003e1\u003c/span\u003e] explore the performance of a specific multilevel inverter configuration known as \"16:4:1.\" The study highlights the growing preference for asymmetrical topologies over symmetrical ones due to their enhanced performance with a similar number of switching components. The focus is on the \"16:4:1\" configuration, representing the distribution of voltage levels within the multilevel inverter. Although this configuration is considered optimal, the paper identifies a research gap concerning comprehensive performance analysis. To address this gap, a novel analytical approach is introduced, enabling a thorough understanding of the combinations.\u003c/p\u003e \u003cp\u003eM. P. Viswanathan et al. [\u003cspan citationid=\"CR2\" class=\"CitationRef\"\u003e2\u003c/span\u003e] describe a single-stage, fifteen-level cascaded DC-interface converter used to increase the effectiveness of photovoltaic (PV) systems. The study suggests using a disposition pulse width modulation approach (POPD PWM) and phase opposition to maximize the quality of the AC power output. This offers advantages over traditional inverter topologies by efficiently reducing harmonic content, voltage strain, and the number of switches and DC power sources. The research employs both simulation and prototype models to comprehensively evaluate the system's performance. As a recommendation, the paper suggests adopting this innovative system in power converters used in Uninterruptible Power Supplies (UPS) and power drive applications, citing its cost-effectiveness and superior performance.\u003c/p\u003e \u003cp\u003eKrishnachaitanya D et al. [\u003cspan citationid=\"CR3\" class=\"CitationRef\"\u003e3\u003c/span\u003e] conduct a quantifiable analysis of minimized-switch multilevel inverter configurations, examining aspects related to cost factors, switching losses, and reliability. The study compares eight asymmetric topologies and introduces a novel 15-level configuration, demonstrating its superior performance compared to other alternatives. The paper also evaluates cost functions for power converters, emphasizing the significance of reliability estimation methods and prediction. Techniques aimed at minimizing the component count within multilevel inverters are explored, offering potential cost and efficiency benefits.\u003c/p\u003e \u003cp\u003eVijayalakshmi N et al. [\u003cspan citationid=\"CR4\" class=\"CitationRef\"\u003e4\u003c/span\u003e] also conduct a quantifiable analysis of minimized-switch multilevel inverter configurations, specifically examining aspects related to switching power losses, price factors, and trustworthiness. The study compares eight asymmetric topologies and introduces a novel 15-level configuration, demonstrating its superior performance. The research delves into evaluating cost functions for power converters, emphasizing the significance of reliability estimation methods and prediction. Techniques aimed at minimizing the component count within multilevel inverters are explored, offering potential cost and efficiency benefits.\u003c/p\u003e \u003cp\u003eGowri Shankar J et al. [\u003cspan citationid=\"CR5\" class=\"CitationRef\"\u003e5\u003c/span\u003e] assess the performance of a nine-level cascaded multilevel inverter operating with a single DC power source in the context of photovoltaic systems. The research focuses on the inverter's capability to efficiently generate multiple voltage levels from a single DC power source, enhancing the quality of power output from photovoltaic arrays. Simulation and experimentation are used to evaluate the inverter's performance and efficiency, examining aspects like voltage quality, total harmonic distortion, and power losses. The findings provide valuable insights into the viability and effectiveness of this inverter configuration for photovoltaic applications, emphasizing its potential to enhance energy conversion and grid integration in renewable energy systems.\u003c/p\u003e \u003cp\u003eKailash Kumar Mahto et al. [\u003cspan citationid=\"CR6\" class=\"CitationRef\"\u003e6\u003c/span\u003e] discuss the significance of multilevel inverters (MLIs) in various energy conversion systems, including electric vehicles, fuel cells, wind farms, solar systems, and HVDC systems. MLIs offer benefits such as high power quality, minimal harmonic distortion, less electromagnetic interference, and smaller filter sizes. However, traditional MLIs like Flying Capacitor, Neutral Point Clamped, and Cascaded H-bridge have drawbacks due to their large component count. Research has focused on novel topologies that cut switches and other components in MLIs, resulting in improved topologies that provide increased efficiency and decreased complexity in energy conversion systems.\u003c/p\u003e \u003cp\u003eR. Ilango et al. [\u003cspan citationid=\"CR7\" class=\"CitationRef\"\u003e7\u003c/span\u003e] introduce a novel strategy of a 15-level inverter for grid-connected photovoltaic (PV) systems, employing a hybrid approach called ZOASNN (Zebra Optimization Algorithm and Spiking Neural Network). The primary objectives of the ZOASNN method include meeting power demand, reducing harmonics, and enhancing power regulation and energy conversion in the PV system. The multilevel inverter (MLI) is utilized in both symmetrical and asymmetrical configurations to minimize power components. The ZOASNN controller optimizes converter switching states, effectively fulfilling load demands and mitigating system parameter fluctuations. Performance comparisons with other algorithms demonstrate the superior cost-effectiveness, low total harmonics distortion, and efficiency of the proposed method.\u003c/p\u003e \u003cp\u003eHolm-Nielsen J. B. et al. [\u003cspan citationid=\"CR8\" class=\"CitationRef\"\u003e8\u003c/span\u003e] describe the design and practical application of a single-phase, 15-level inverter tailored for solar photovoltaic (PV) applications, emphasizing reducing component count. The innovative approach aims to achieve a substantial increase in voltage levels with minimal modules, improving the efficiency and cost-effectiveness of solar PV systems. Extensive simulation and experimentation are conducted to assess the inverter's effectiveness in terms of voltage quality, harmonic distortion, and overall power conversion efficiency. The findings contribute significantly to advancing solar PV systems, offering a novel inverter design that optimizes energy conversion, grid integration, and cost-efficiency.\u003c/p\u003e \u003cp\u003eBidyut Mahato et al. [\u003cspan citationid=\"CR9\" class=\"CitationRef\"\u003e9\u003c/span\u003e] propose a generalized multilevel inverter (MLI) design with symmetrical and asymmetrical DC sources at the input. The MLI minimizes power consumption by producing output voltages of 11, 13, and 15 levels with 10 power switches and seven levels with seven power switches. Expanding and cascading the MLI reduces complexity and size while increasing cost and performance. The study compares newly designed topologies, total standing voltage, and level-to-switch ratio. Gate pulses for IGBT switches are produced using a low-frequency modulation technique and a multicarrier pulse width method. Experimental findings at various loading or voltage situations are reported, examining inverter losses, efficiency, and %THD.\u003c/p\u003e \u003cp\u003eNidhi Mishra et al. [\u003cspan citationid=\"CR10\" class=\"CitationRef\"\u003e10\u003c/span\u003e] present a novel medium voltage solar photovoltaic (PV) system based on the Scott-ternary solar multilevel converter (ST-MLC). Two voltage source converters (VSCs) feed a three-phase grid from a single solar PV array. The technique creates a nine-level, three-phase power conditioning system by connecting multiwinding transformers in a Scott fashion. To reduce losses, a closed-loop nearest level control approach is included. The system's performance is demonstrated by simulation results under steady-state and dynamic irradiance, considering different solar profiles. A real-time test bench validates the ST-MLC's performance, assessing its advantages over current systems.\u003c/p\u003e \u003cp\u003eSumit A et al. [\u003cspan citationid=\"CR11\" class=\"CitationRef\"\u003e11\u003c/span\u003e] emphasize the significance of multilevel inverters (MLIs) for high-quality electric power generation using stepped voltage levels. MLIs employ voltage sources, semiconductor switches, and capacitors to achieve this, available in symmetrical and asymmetrical types. Operating switches at fundamental frequencies enhances waveform quality, reducing the need for output-side filtering. The cascaded H-bridge (CHB) topology, powered by DC voltage sources or PV systems, offers advantages in power generation and voltage levels. Efforts focus on reducing components to boost efficiency, especially in solar PV-based inverters. Techniques like level boosting circuits (LBCs) aim to reduce the required number of switches and manage voltage output stress effectively.\u003c/p\u003e \u003cp\u003eSumit Trimukhe et al. [\u003cspan citationid=\"CR12\" class=\"CitationRef\"\u003e12\u003c/span\u003e] present an innovative approach for improving power quality and mitigating harmonics in grid-connected multilevel inverters. This approach involves a combination of repeating units, a level boosting network, and an H-bridge to produce multiple output voltage levels. By incorporating repeating units, the technique minimizes the number of switches, streamlining the overall system and enhancing efficiency. The level boosting network plays a crucial role in elevating performance by increasing the available output voltage levels. Simulation results underscore the effectiveness of this approach in reducing losses and minimizing harmonics, making it a promising solution for enhancing power quality.\u003c/p\u003e \u003cp\u003eVenkata Sireesha Nagineni et al. [\u003cspan citationid=\"CR13\" class=\"CitationRef\"\u003e13\u003c/span\u003e] discuss the implementation of an asymmetric multilevel inverter for solar photovoltaic applications using the N-R approach. The inverter minimizes components and reduces lower-order dominant harmonics using selective harmonic elimination-based pulse width modulation (SHEPWM). The paper compares the Total Harmonic Distortion (THD) to previous studies, finding decreased THD levels. The SHEPWM control method's efficiency in reducing harmonics and improving multilevel converter performance is examined. Relevant research, including studies on cascading 15-level asymmetric inverters and modular multilevel inverters powered by solar photovoltaics, is cited.\u003c/p\u003e \u003cp\u003eKalaiarasi et al. [\u003cspan citationid=\"CR14\" class=\"CitationRef\"\u003e14\u003c/span\u003e] explore switch faults in multilevel inverters, focusing on open circuit faults (OCF). OCF can lead to component failure and system downtime, particularly in applications like solar power systems, battery management systems, adjustable speed drives, and grid-connected setups. Fault-tolerant inverters play a crucial role in maintaining system reliability and safety, employing control techniques to maintain load power balance and swiftly restore normal operation. Integrating fault tolerance into multilevel inverter design is essential for enhancing reliability and performance.\u003c/p\u003e \u003cp\u003eMahendra Lalwani et al. [\u003cspan citationid=\"CR15\" class=\"CitationRef\"\u003e15\u003c/span\u003e] compare a proposed Reduced Switch Multilevel Inverter (RS MLI) with newly created MLI topologies. Switching angles for MLI switches are generated using optimization techniques. The output voltage of MLIs is synthesized using the SHE approach, which calculates the best switching angles to eliminate certain harmonics. Optimization techniques like the Newton-Raphson method and bio-inspired algorithms like GA-based harmonic elimination are applied to increase system robustness. The study investigates THD for PV-based cascaded multilevel inverters and compares the RS MLI configuration's performance, emphasizing its potential to enhance power quality and system efficiency.\u003c/p\u003e"},{"header":"4. DESIGN AND SWITCHINNG OF MULTILEVEL INVERTER","content":"\u003cp\u003eThe block diagram of the proposed system includes several components such as a PV array, inverters, an LCL filter circuit, and a CRO for observation, all of which were utilized to achieve the desired results.\u003c/p\u003e\n\u003cdiv id=\"Sec6\" class=\"Section2\"\u003e\n \u003ch2\u003e4.1 BLOCK DIAGRAM OF THE PROPOSED SYSTEM\u003c/h2\u003e\n \u003cp\u003eFigure \u003cspan class=\"InternalRef\"\u003e2\u003c/span\u003e illustrates the block diagram of our proposed system. The inverter system we developed starts with a transformer and rectifier setup designed to handle various input ratings. The rectified DC output is then regulated through 6V, 12V, and 24V voltage regulators, which maintain stable voltage levels for the subsequent stages. Driver ICs and PIC microcontrollers are integral to the process, with the driver ICs providing pulses to MOSFET switches in the inverter circuit based on instructions from the PIC microcontroller. This setup allows for precise control over the switching of the MOSFETs. The inverter circuit itself is composed of 12 MOSFET switches arranged to produce a 15-level output. By toggling these switches in response to pulse signals, the circuit effectively converts DC power into AC, providing precise voltage control and waveform modulation. Through the coordinated operation of these components, our system ensures reliable and versatile power conversion while meeting different voltage requirements.\u003c/p\u003e\n \u003cp\u003eIn our proposed inverter system, we start with a PV-array made up of solar panels with varying ratings. These panels are connected to a modified H-bridge circuit, which consists of three separate inverter circuits. Each inverter circuit receives input from three solar panels and converts the DC power generated by the solar panels into AC power. The three inverters are configured to form an H-bridge circuit, utilizing a total of twelve IGBT switches, with four switches per inverter circuit. This arrangement is crucial for achieving our goal of reducing harmonic distortion to 15 levels.\u003c/p\u003e\n \u003cp\u003eBy utilizing these twelve IGBT switches, we can effectively manage switching losses and ensure precise control over the system. The AC output from the inverter circuit is then fed into an LCL filter circuit\u0026mdash;comprised of inductor-capacitor-inductor components\u0026mdash;which plays a vital role in reducing the total harmonic distortion (THD) in the AC output signal. Reducing THD is essential for ensuring that the AC output is clean and meets the required quality standards. Finally, the filtered AC power with reduced harmonic distortion is passed on to an R-load for testing purposes. This R-load helps evaluate the performance and quality of the AC power generated by our system. Through this comprehensive setup, we aim to achieve efficient and clean AC power generation from various solar panel inputs while minimizing harmonic distortion to improve power quality.\u003c/p\u003e\n\u003c/div\u003e\n\u003cdiv id=\"Sec7\" class=\"Section2\"\u003e\n \u003ch2\u003e4.2 CIRCUIT AND COMPONENTS\u003c/h2\u003e\n \u003cp\u003eThe proposed project circuit comprises three different solar panels and twelve IGBT switches, along with an LCL filter circuit. Each switch is equipped with its own pulse generator, all contained within a closed substation circuit connected to an R-load.\u003c/p\u003e\n \u003cdiv id=\"Sec8\" class=\"Section3\"\u003e\n \u003ch2\u003e4.2.1 COMPONENTS USED IN CIRCUIT\u003c/h2\u003e\n \u003cp\u003eThe proposed solar panel system features three panels that convert solar radiation into DC power using photovoltaic cells (PV). These panels operate at a temperature of 25\u0026deg;C and an irradiance level of 1000 watts per square meter.\u003c/p\u003e\n \u003cp\u003eIGBT, or Insulated-Gate Bipolar Transistor, is a crucial power semiconductor device commonly used in high-power electronic circuits. It combines aspects of Bipolar Junction Transistors (BJTs) and Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), offering a blend of their benefits. IGBTs excel in low-frequency applications, typically below 20 kHz, and are unidirectional, meaning they conduct current in only one direction. Despite their slower switching speed compared to MOSFETs, IGBTs are highly efficient in switching high currents with relatively low voltage, making them essential in power electronics.\u003c/p\u003e\n \u003cp\u003eThe LCL filter\u0026mdash;consisting of an inductor-capacitor-inductor\u0026mdash;is specifically designed to minimize harmonic distortion in currents produced by power converters. It effectively reduces Total Harmonic Distortion (THD) by employing inductors and capacitors with low values. In this setup, the inductance is 4.6 mH, and the capacitance is 34 microfarads.\u003c/p\u003e\n \u003c/div\u003e\n \u003cdiv id=\"Sec9\" class=\"Section3\"\u003e\n \u003ch2\u003e4.2.2 CIRCUIT OF MULTILEVEL INVERTER\u003c/h2\u003e\n \u003cp\u003eFigure \u003cspan class=\"InternalRef\"\u003e3\u003c/span\u003e illustrates the advanced power electronics circuit designed to efficiently manage three distinct photovoltaic (PV) arrays with voltages of 5V, 10V, and 20V. These arrays are linked to each inverter circuit within a modified H-bridge configuration, which includes a total of 12 IGBT switches.\u003c/p\u003e\n \u003cp\u003eThe modified H-bridge operates across 28 different modes, each tailored to specific voltage conversion needs. During these modes, various switches in the H-bridge are activated or deactivated to achieve the desired voltage levels. For instance, to generate a 5V step, switches S1 and S4 are turned on while the remaining switches are short-circuited. The transitions between modes and the switching actions are managed automatically by pulse generators linked to each switch. These pulse generators produce pulses with precise delay timings to control the switching sequence and achieve the targeted output voltage levels.\u003c/p\u003e\n \u003cp\u003eEach operational mode involves activating a specific combination of switches to reach the desired voltage step. For example, to generate a 15V step, the first and second inverters use switches S1, S4, S5, and S8 in the ON position. To achieve a total of 15 voltage steps, a strategic approach is employed to control the switches, considering both positive and negative cycles. This results in a well-regulated AC waveform with minimized harmonic distortion. Additionally, the system includes a filter circuit to further reduce the total harmonic distortion (THD) in the AC output, ensuring a clean and pure sine wave suitable for grid integration and power supply applications. This setup significantly improves the quality and reliability of power in renewable energy systems.\u003c/p\u003e\n \u003c/div\u003e\n\u003c/div\u003e\n\u003cdiv id=\"Sec10\" class=\"Section2\"\u003e\n \u003ch2\u003e4.3 CIRCUIT DIAGRAM OF MODIFIED H-BRIDGE\u003c/h2\u003e\n \u003cp\u003eFigure \u003cspan class=\"InternalRef\"\u003e4\u003c/span\u003e depicts a Modified H-Bridge, an advanced variation of the traditional H-Bridge topology commonly used in power electronics and control systems. While a standard H-Bridge comprises four switching elements arranged in an \u0026quot;H\u0026quot; shape, allowing for bidirectional control of a load such as a motor, the Modified H-Bridge introduces enhancements to achieve specific goals. These modifications may involve changes in switch types (e.g., using IGBTs or MOSFETs), adjustments in switching strategies, or the addition of supplementary circuitry. The purpose of these enhancements is to improve efficiency, reduce losses, enhance control, or lower the overall component count, thereby optimizing performance.\u003c/p\u003e\n\u003c/div\u003e\n\u003cdiv id=\"Sec11\" class=\"Section2\"\u003e\n \u003ch2\u003e4.4 SWITCHING SEQUENCE\u003c/h2\u003e\n \u003cp\u003eThe switching modes of operation are divided into positive and negative cycles, each featuring 14 voltage levels achieved through 12 switching actions, resulting in a total of 15 distinct levels.\u003c/p\u003e\n \u003ctable id=\"Tab1\" border=\"1\"\u003e\n \u003ccaption language=\"En\"\u003e\n \u003cdiv class=\"CaptionNumber\"\u003eTable 1\u003c/div\u003e\n \u003cdiv class=\"CaptionContent\"\u003e\n \u003cp\u003epositive sequence operation of switches\u003c/p\u003e\n \u003c/div\u003e\n \u003c/caption\u003e\n \u003cthead\u003e\n \u003ctr\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eswitch/\u003c/p\u003e\n \u003cp\u003evoltage\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV1\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV2\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV1\u0026thinsp;+\u0026thinsp;V2\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV3\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV3\u0026thinsp;+\u0026thinsp;V1\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV2\u0026thinsp;+\u0026thinsp;V3\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV1\u0026thinsp;+\u0026thinsp;V2\u0026thinsp;+\u0026thinsp;V3\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV2\u0026thinsp;+\u0026thinsp;V3\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV3\u0026thinsp;+\u0026thinsp;V1\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV3\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV1\u0026thinsp;+\u0026thinsp;V2\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV2\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eV1\u003c/p\u003e\n \u003c/th\u003e\n \u003c/tr\u003e\n \u003c/thead\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS1\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS2\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS3\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS4\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS5\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS6\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS7\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS8\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS9\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS10\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS11\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS12\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cp\u003e\u003c/p\u003e\n \u003cdiv class=\"gridtable\"\u003e\n \u003cdiv align=\"char\" class=\"colspec\"\u003eTable 1 illustrates the operation of the switches during positive sequences, with 12 switches activated across 14 different voltage levels.\u003c/div\u003e\n \u003ctable id=\"Tab2\" border=\"1\"\u003e\n \u003ccaption language=\"En\"\u003e\n \u003cdiv class=\"CaptionNumber\"\u003e\u003cbr\u003e\u003c/div\u003e\n \u003cdiv class=\"CaptionContent\"\u003e\n \u003cp\u003e\u003cstrong\u003eTable 2-\u003c/strong\u003eNegative sequence operation of switches\u003c/p\u003e\n \u003c/div\u003e\n \u003c/caption\u003e\n \u003cthead\u003e\n \u003ctr\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eswitch/voltage\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-V1\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-V2\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-V1-V2\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-V3\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-V3-V1\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-V2-V3\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-(V1\u0026thinsp;+\u0026thinsp;V2\u0026thinsp;+\u0026thinsp;V3)\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-(V2\u0026thinsp;+\u0026thinsp;V3)\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-(V3\u0026thinsp;+\u0026thinsp;V1)\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-(V3)\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-(V1\u0026thinsp;+\u0026thinsp;V2)\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-(V2)\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003e-(V1)\u003c/p\u003e\n \u003c/th\u003e\n \u003c/tr\u003e\n \u003c/thead\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS1\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS2\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS3\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS4\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS5\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS6\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS7\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS8\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS9\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS10\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS11\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e\u003cstrong\u003eS12\u003c/strong\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"char\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003c/div\u003e\n \u003cp\u003eTable 2 shows the operation of the switches during the negative sequence, detailing which switches are turned on or off for different voltage levels.\u003c/p\u003e\u003cspan\u003e\n \u003cp\u003e\u003cstrong\u003e4.5 ADVANTAGES OF MODIFIED H-BRIDGE\u003c/strong\u003e\u003c/p\u003e\n \u003c/span\u003e\n \u003cul\u003e\n \u003cli\u003e\n \u003cp\u003e\u003cstrong\u003eFlexibility and Adaptability\u003c/strong\u003e: The modified H-bridge offers significant flexibility in integrating diverse power sources and components, enabling the creation of adaptable power systems tailored to specific voltage and power needs. This feature is essential for incorporating various renewable energy sources and adjusting to different load requirements.\u003c/p\u003e\n \u003c/li\u003e\n \u003cli\u003e\n \u003cp\u003e\u003cstrong\u003eOptimized Power Flow\u003c/strong\u003e: Through strategic configuration of switching patterns and the addition of components like inductors and capacitors, the modified H-bridge optimizes power distribution within the circuit. This enhances overall system efficiency by minimizing losses and ensuring effective power utilization.\u003c/p\u003e\n \u003c/li\u003e\n \u003cli\u003e\n \u003cp\u003e\u003cstrong\u003eImproved Efficiency\u003c/strong\u003e: The design of the modified H-bridge ensures that a substantial portion of input power is converted and utilized effectively, reducing energy wastage and enhancing system efficiency.\u003c/p\u003e\n \u003c/li\u003e\n \u003cli\u003e\n \u003cp\u003e\u003cstrong\u003eEnhanced Voltage Control\u003c/strong\u003e: The modified H-bridge excels in precise control and adjustment of output voltage levels, which is crucial for applications requiring accurate voltage regulation, such as motor drives for optimal performance and speed control.\u003c/p\u003e\n \u003c/li\u003e\n \u003cli\u003e\n \u003cp\u003e\u003cstrong\u003eReduced Harmonics\u003c/strong\u003e: The design allows for the incorporation of filters to reduce total harmonic distortion (THD) in the output waveform. Lower THD ensures cleaner power output, which is important for applications sensitive to harmonic distortions, such as sensitive electronic equipment.\u003c/p\u003e\n \u003c/li\u003e\n \u003cli\u003e\n \u003cp\u003e\u003cstrong\u003eBidirectional Power Flow\u003c/strong\u003e: Like traditional H-bridges, the modified version supports bidirectional power flow, enabling efficient power direction in both directions. This is advantageous for applications where power needs to be fed back to the source or where bidirectional energy flow is needed.\u003c/p\u003e\n \u003c/li\u003e\n \u003cli\u003e\n \u003cp\u003e\u003cstrong\u003eIntegration of Multiple Sources\u003c/strong\u003e: The modified H-bridge can seamlessly integrate multiple power sources, which is particularly useful in renewable energy systems. It effectively manages and balances contributions from various sources, such as solar panels, wind turbines, and fuel cells, ensuring a reliable and consistent power supply.\u003c/p\u003e\n \u003c/li\u003e\n \u003c/ul\u003e\n\u003c/div\u003e"},{"header":"5. SIMULATION OF PROPOSED SYSTEM BY USING MATLAB","content":"\u003cp\u003eThe simulation of a PV-based 15-level inverter system using a modified H-bridge involves various components, including Maximum Power Point Tracking (MPPT), solar panels, inverter circuits, filter circuits, pulse generators, and an R-load. The proposed design integrates PV panels with a multilevel inverter to reduce switching power losses by employing a modified H-bridge. The simulation includes all necessary components to achieve the desired output efficiently.\u003c/p\u003e\n\u003cdiv id=\"Sec13\" class=\"Section2\"\u003e\n \u003ch2\u003e5.1 SIMULATION OF THE INVERTER\u003c/h2\u003e\n \u003cp\u003eFigure \u003cspan class=\"InternalRef\"\u003e5\u003c/span\u003e illustrates the simulation of a multilevel inverter system, which incorporates several components. The system operates using three inverter circuits, each powered by different solar panels. Each inverter circuit consists of four IGBT switches, totaling 12 switches arranged in parallel and series according to the H-bridge configuration. Pulse generators control each switch, providing the necessary pulses and timing delays for operation. A filter circuit is applied to reduce distortion in the output after the inverter. Additionally, a buck converter divides the total 30V from the panels into three distinct levels.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eSolar Panel\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003eThe simulation features a PV-array with an irradiance of 1000 W/m\u0026sup2; and a temperature of 25\u0026deg;C, designed to provide a consistent DC voltage to the inverter circuit over time. This system is integrated with MPPT (Maximum Power Point Tracking) to ensure optimal power extraction from the solar panels under varying conditions.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMPPT\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003eMaximum Power Point Tracking is an advanced algorithm integrated into charge controllers to maximize the power output from photovoltaic (PV) modules. It identifies the voltage at which the PV panels produce their highest power, known as the peak power output voltage.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eIGBT\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003eThe Insulated-Gate Bipolar Transistor (IGBT) is a crucial power semiconductor device used in high-power electronic circuits. It merges the advantages of MOSFETs and BJTs and is most effective at low frequencies, typically below 20 kHz. IGBTs conduct current in a single direction and are capable of efficiently switching high currents with relatively low voltage. However, they have slower switching speeds compared to MOSFETs, and the solar panel inverter operates with switches rated at approximately 600-650V.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eBuck Converter\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003eA buck converter is a type of DC-DC converter that steps down a higher input voltage to a lower output voltage. It works by rapidly switching a semiconductor component, storing energy in an inductor, and then releasing it to the load during the off-phase. Known for its efficiency, compact design, and minimal heat generation, buck converters are commonly used in battery-powered devices, LED lighting, voltage regulation, and power supplies to manage and regulate power effectively.\u003c/p\u003e\n\u003c/div\u003e\n\u003cdiv id=\"Sec14\" class=\"Section2\"\u003e\n \u003ch2\u003e5.2 SWITCHING AND OPERATION\u003c/h2\u003e\n \u003cp\u003eThe operation of the multilevel inverter involves a highly coordinated sequence of switching actions. It uses approximately 12 switching pulses, with precise timing delays for turning switches on and off, to achieve accurate voltage regulation and control. Each adjustment in the output voltage, whether increasing or decreasing, typically requires the activation or deactivation of about six switches. These switches are arranged to meet specific voltage levels. For each step-up or step-down in voltage, particular switches are turned on or off according to a predetermined pulse sequence and timing delays. This meticulous control allows the inverter circuit to adjust the output voltage efficiently, ensuring precise power conversion and distribution within the multilevel inverter system.\u003c/p\u003e\n \u003cdiv id=\"Sec15\" class=\"Section3\"\u003e\n \u003ch2\u003e5.2.1 PULSE GENERATION\u003c/h2\u003e\n \u003cp\u003eFigure \u003cspan class=\"InternalRef\"\u003e6\u003c/span\u003e illustrates the switching pulses for each switch, showing their operation intervals and specific timing with a 2-millisecond delay.\u003c/p\u003e\n \u003c/div\u003e\n\u003c/div\u003e\n\u003cdiv id=\"Sec16\" class=\"Section2\"\u003e\n \u003ch2\u003e5.3 SWITCHING CHARACTERISTICS OF IGBT:\u003c/h2\u003e\n \u003cp\u003e\u003cstrong\u003eSwitching Characteristics of IGBT\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003eTo activate an IGBT, a positive voltage is applied across the gate-emitter terminals. Once the gate voltage exceeds the threshold, the collector current I\u003csub\u003eC\u003c/sub\u003e begins to flow, and the collector-emitter voltage V\u003csub\u003eCE\u003c/sub\u003e starts to drop. The time it takes for the gate-emitter voltage V\u003csub\u003eCE\u003c/sub\u003e to reach the threshold and for I\u003csub\u003eC\u003c/sub\u003e to start increasing is known as the turn-on delay, denoted as td(on). The rise time (tr) represents the period during which the collector current I\u003csub\u003eC\u003c/sub\u003e reaches its full value and V\u003csub\u003eCE\u003c/sub\u003e decreases to its minimum. The total turn-on time of the IGBT encompasses these characteristics.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eIGBT Characteristics\u003c/strong\u003e:\u003c/p\u003e\n \u003cp\u003eIn Fig. \u003cspan class=\"InternalRef\"\u003e7\u003c/span\u003e, the V-I transfer characteristics of an IGBT device illustrate how the current through the power semiconductor device varies with changes in the voltage across it. Typically, the device operates in the linear region where current and voltage are directly proportional. The turn-on time t\u003csub\u003eon\u003c/sub\u003e is given by t\u003csub\u003eon\u003c/sub\u003e = t\u003csub\u003ed(on)\u003c/sub\u003e\u0026thinsp;+\u0026thinsp;t\u003csub\u003er\u003c/sub\u003e\u003c/p\u003e\n \u003cp\u003eTo turn off the IGBT, the gate voltage is reduced. When the gate-emitter voltage drops to VGE1 (the voltage at which the IGBT exits saturation), the collector-emitter voltage V\u003csub\u003eCE\u003c/sub\u003e begins to rise. The duration required to lower the voltage to VGE1 is known as the turn-off delay, or t\u003csub\u003ed(off)\u003c/sub\u003e\u003c/p\u003e\n \u003cp\u003eAs V\u003csub\u003eCEV\u003c/sub\u003e reaches the supply voltage, the collector current I\u003csub\u003eC\u003c/sub\u003e rapidly decreases until it reaches the threshold value V\u003csub\u003eGE(th)\u003c/sub\u003e. This rapid reduction in collector current is mainly due to the internal MOSFET. Even after the gate voltage returns to zero, I\u003csub\u003eC\u003c/sub\u003e continues briefly because of stored carriers, known as the internal BJT current. Thus, the IGBT\u0026apos;s turn-off delay is longer than that of the MOSFET and is described by:\u003c/p\u003e\n \u003cp\u003et\u003csub\u003eOFF\u003c/sub\u003e = t\u003csub\u003ed(off)\u003c/sub\u003e\u0026thinsp;+\u0026thinsp;t\u003csub\u003erv\u003c/sub\u003e + t\u003csub\u003efi1\u003c/sub\u003e + t\u003csub\u003efi2\u003c/sub\u003e\u003c/p\u003e\n \u003cp\u003eWhere:\u003c/p\u003e\n \u003cp\u003e- t\u003csub\u003erv\u003c/sub\u003e represents the voltage rise time.\u003c/p\u003e\n \u003cp\u003e- t\u003csub\u003efi1\u003c/sub\u003e stands for MOSFET current fall time.\u003c/p\u003e\n \u003cp\u003e- t\u003csub\u003efi2\u003c/sub\u003e denotes BJT current fall time.\u003c/p\u003e\n\u003c/div\u003e\n\u003cdiv id=\"Sec17\" class=\"Section2\"\u003e\n \u003ch2\u003e5.4 VARIOUS MODES OF OPERATION\u003c/h2\u003e\n \u003cp\u003eA 15-level inverter equipped with 12 switches and 28 operational modes is a sophisticated power electronics system. Detailing all possible switch state combinations in a single paragraph is quite intricate. However, here is a high-level summary: A 15-level inverter, also known as a multilevel inverter, can produce 15 distinct output voltage levels. These inverters are often used in applications requiring high-quality voltage waveforms, such as motor drives and renewable energy systems. With 12 switches, each having two possible states (ON or OFF), there are 2\u003csup\u003e12\u003c/sup\u003e (4096) potential switch state combinations. To generate the 15 output voltage levels, the states of the switches must be precisely controlled. This control is typically achieved using modulation techniques like pulse-width modulation (PWM).\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 1 OPERATES IN 0V\u003c/strong\u003e\u003c/p\u003e\n \u003cdiv class=\"gridtable\"\u003e\n \u003cdiv align=\"left\" class=\"colspec\"\u003e\u003cstrong\u003eTable-3\u0026nbsp;\u003c/strong\u003eMode of operation in zero voltage\u003c/div\u003e\u0026nbsp;\u003ctable id=\"Taba\" border=\"1\"\u003e\n \u003cthead\u003e\n \u003ctr\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/th\u003e\n \u003cth align=\"left\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/th\u003e\n \u003c/tr\u003e\n \u003c/thead\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd align=\"left\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003c/div\u003e\n \u003cp\u003eTable 3 illustrates the zero voltage mode of operation, where the voltage waveform is insignificant and the current remains zero. In this mode, six switches\u0026mdash;specifically S1, S2, S5, S6, S9, and S10\u0026mdash;are in the ON position, while the remaining six switches out of the twelve are turned OFF.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 2 OPERATES IN 5V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eTable-4\u0026nbsp;\u003c/strong\u003eMode of operation in 5 voltage\u003c/p\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cp\u003eTable 4 and Figure 8 depict the operation of the switches at 5V, showing the current flow through the switches from S1 to S4 and through the load. In this mode, the switches S1, S4, S5, S6, S9, and S10 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 3 OPERATES IN 10V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eTable-5\u0026nbsp;\u003c/strong\u003eMode of operation in 10 voltage\u003c/p\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cp\u003e\u003cbr\u003e\u003c/p\u003e\n \u003cdiv class=\"gridtable\"\u003e\n \u003cp\u003eFigure 9 illustrates the operation of the inverter circuit at 10V, while Table 5 shows the corresponding switching sequence. In this mode, the switches S1, S2, S5, S8, S9, and S10 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 4 OPERATES IN 15V\u003c/strong\u003e\u003c/p\u003e\n \u003cdiv align=\"left\" class=\"colspec\"\u003e\u003cstrong\u003eTable-6\u0026nbsp;\u003c/strong\u003eMode of operation in 15 voltage\u003c/div\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cdiv align=\"left\" class=\"colspec\"\u003e\u003cbr\u003e\u003c/div\u003e\n \u003cp\u003eFigure 10 represents the operation of the inverter circuit at 15V, and Table 6 details the switching sequence. In this configuration, the switches S1, S4, S5, S8, S9, and S10 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 5 OPERATES IN 20V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e\u003cstrong\u003eTable-7\u0026nbsp;\u003c/strong\u003eMode of operation in 20 voltage\u003c/strong\u003e\u003c/p\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cp\u003eFigure 11 depicts the operation of the inverter circuit at 20V, while Table 7 details the switching sequence. In this mode, the switches S1, S2, S5, S6, S9, and S12 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 6 OPERATES IN 25V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e\u003cstrong\u003eTable-8\u0026nbsp;\u003c/strong\u003eMode of operation in 25 voltage\u003c/strong\u003e\u003c/p\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cdiv align=\"left\" class=\"colspec\"\u003e\u003cbr\u003e\u003c/div\u003e\n \u003cp\u003eFigure 12 shows the operation of the inverter circuit at 25V, and Table 8 outlines the corresponding switching sequence. In this setup, the switches S1, S4, S5, S6, S9, and S12 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 7 OPERATES IN 30V\u003c/strong\u003e\u003c/p\u003e\n \u003cdiv align=\"left\" class=\"colspec\"\u003e\u003cstrong\u003eTable-9\u0026nbsp;\u003c/strong\u003eMode of operation in 30 voltage\u003c/div\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cdiv align=\"left\" class=\"colspec\"\u003e\u003cbr\u003e\u003c/div\u003e\n \u003cp\u003eFigure 13 illustrates the operation of the inverter circuit at 30V, while Table 9 provides the switching sequence. In this mode, the switches S1, S2, S5, S8, S9, and S12 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 8 OPERATES IN 35V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e\u003cstrong\u003eTable-10\u0026nbsp;\u003c/strong\u003eMode of operation in 35 voltage\u003c/strong\u003e\u003c/p\u003e\n \u003c/div\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cp\u003eFigure 14 depicts the operation of the inverter circuit at 35V, with Table 10 detailing the switching sequence. In this configuration, the switches S1, S4, S5, S8, S9, and S12 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 9 OPERATES IN -5V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e\u003cstrong\u003eTable-11\u0026nbsp;\u003c/strong\u003eMode of operation in -5 voltage\u003c/strong\u003e\u003c/p\u003e\n \u003cdiv align=\"Left\"\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003c/div\u003e\n \u003cp\u003eFigure 15 shows the operation of the inverter circuit at -5V, and Table 11 outlines the switching sequence for the negative cycle. In this mode, the switches S2, S3, S5, S6, S9, and S10 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 10 OPERATES IN -10V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eTable-12\u0026nbsp;\u003c/strong\u003eMode of operation in -10 voltage\u003c/p\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cp\u003e\u003cstrong\u003e\u0026nbsp;\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003eFigure 16 illustrates the operation of the inverter circuit at -10V, while Table 12 details the switching sequence for the negative cycle. In this mode, the switches S1, S2, S6, S7, S9, and S10 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 11 OPERATES IN -15V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e\u003cstrong\u003eTable-13\u0026nbsp;\u003c/strong\u003eMode of operation in -15 voltage\u003c/strong\u003e\u003c/p\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cdiv class=\"gridtable\"\u003e\n \u003cdiv align=\"left\" class=\"colspec\"\u003e\u003cbr\u003e\u003c/div\u003e\n \u003cp\u003eFigure 17 shows the operation of the inverter circuit at -15V, with Table 13 providing the switching sequence for the negative cycle. In this mode, the switches S2, S3, S6, S7, S9, and S10 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 12 OPERATES IN -20V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e\u003cstrong\u003eTable-14\u0026nbsp;\u003c/strong\u003eMode of operation in -20 voltage\u003c/strong\u003e\u003c/p\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cp\u003eFigure 18 illustrates the operation of the inverter circuit at -20V, and Table 14 details the switching sequence for the negative cycle. In this configuration, the switches S1, S2, S5, S6, S10, and S11 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 13 OPERATES IN -25V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e\u003cstrong\u003eTable-15\u0026nbsp;\u003c/strong\u003eMode of operation in -25 voltage\u003c/strong\u003e\u003c/p\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cdiv align=\"left\" class=\"colspec\"\u003e\u003cbr\u003e\u003c/div\u003e\n \u003cdiv align=\"left\" class=\"colspec\"\u003e\u003cbr\u003e\u003c/div\u003e\n \u003cp\u003eFigure 19 depicts the operation of the inverter circuit at -25V, and Table 15 details the switching sequence for the negative cycle. In this mode, the switches S2, S3, S5, S6, S10, and S11 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 14 OPERATES IN -30V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e\u003cstrong\u003eTable-16\u0026nbsp;\u003c/strong\u003eMode of operation in -30 voltage\u003c/strong\u003e\u003c/p\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cdiv align=\"left\" class=\"colspec\"\u003e\u003cbr\u003e\u003c/div\u003e\n \u003cp\u003eFigure 20 shows the operation of the inverter circuit at -30V, with Table 16 detailing the switching sequence for the negative cycle. In this setup, the switches S1, S2, S6, S7, S10, and S11 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003eMODE 15 OPERATES IN -35V\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e\u003cstrong\u003eTable-17\u0026nbsp;\u003c/strong\u003eMode of operation in -35 voltage\u003c/strong\u003e\u003c/p\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS2\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS3\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS4\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS5\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS6\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS7\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS8\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS9\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS10\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003eS12\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e1\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd width=\"8.333333333333334%\" valign=\"top\"\u003e\n \u003cp\u003e0\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n \u003cdiv align=\"left\" class=\"colspec\"\u003e\u003cbr\u003e\u003c/div\u003e\n \u003cp\u003eFigure 21 illustrates the operation of the inverter circuit at -35V, while Table 17 provides the switching sequence for the negative cycle. In this mode, the switches S2, S3, S6, S7, S10, and S11 are in the ON position.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e5.5 PV-ARRAY AND FILTER CIRCUIT\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e\u0026nbsp; \u0026nbsp; \u0026nbsp;\u0026nbsp;\u003c/strong\u003eThe use of the PV array and filter is crucial for ensuring the proper operation of the system, as well as for achieving harmonic reduction with fewer switches. The PV array provides the necessary power, while the filter helps to mitigate harmonics and improve the quality of the output waveform, making the overall system more efficient and effective.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e5.5.1 PV-ARRAY ARRANGEMENTS\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003eA photovoltaic (PV) array formation involves the arrangement or interconnection of PV modules within a solar panel system. The literature suggests various array interconnection arrangements to optimize system performance and minimize mismatch losses. Some key topologies include:\u003c/p\u003e\n \u003cp\u003e\u0026middot; \u0026nbsp; \u0026nbsp; \u0026nbsp;\u003cstrong\u003eBridge-Linked (BL)\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u0026middot; \u0026nbsp; \u0026nbsp; \u0026nbsp;\u003cstrong\u003eHoney-Comb (HC)\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u0026middot; \u0026nbsp; \u0026nbsp; \u0026nbsp;\u003cstrong\u003eSeries-Parallel (SP)\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003e\u0026middot; \u0026nbsp; \u0026nbsp; \u0026nbsp;\u003cstrong\u003eTotal-Cross-Tied (TCT)\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003eThese configurations are designed to enhance the overall output efficiency, system reliability, and maintenance of the solar PV system.\u003c/p\u003e\n \u003cp\u003e\u003cstrong\u003e5.5.2 L-C-L FILTER\u003c/strong\u003e\u003c/p\u003e\n \u003cp\u003eA filter circuit, commonly known as an LC filter circuit, is used to separate DC components from the rectified output by eliminating AC components. It consists of an inductor (L) and a capacitor (C), ensuring that only the desired DC power is delivered to the load while minimizing unwanted AC ripple.\u003c/p\u003e\n \u003cp\u003eLCL filters are specifically designed to reduce harmonic distortion in the current drawn by power converters with rectifier input stages, such as motor frequency converters and UPS systems. These filters include a combination of reactors and capacitors arranged in a parallel-series configuration, which effectively lowers Total Harmonic Distortion (THD) from the rectifiers and enhances overall power quality. The LCL filter comprises three elements: a grid-side inductor, an inverter-side inductor, and a filter capacitor.\u003c/p\u003e\n \u003c/div\u003e\n\u003c/div\u003e\n\u003cdiv id=\"Sec18\" class=\"Section2\"\u003e\n \u003ch2\u003e5.5 PV-ARRAY AND FILTER CIRCUIT\u003c/h2\u003e\n \u003cp\u003eThe use of the PV array and filter is crucial for ensuring the proper operation of the system, as well as for achieving harmonic reduction with fewer switches. The PV array provides the necessary power, while the filter helps to mitigate harmonics and improve the quality of the output waveform, making the overall system more efficient and effective.\u003c/p\u003e\n \u003cdiv id=\"Sec19\" class=\"Section3\"\u003e\n \u003ch2\u003e5.5.1 PV-ARRAY ARRANGEMENTS\u003c/h2\u003e\n \u003cp\u003eA photovoltaic (PV) array formation involves the arrangement or interconnection of PV modules within a solar panel system. The literature suggests various array interconnection arrangements to optimize system performance and minimize mismatch losses. Some key topologies include:\u003c/p\u003e\n \u003cul\u003e\n \u003cli\u003e\n \u003cp\u003e\u003cstrong\u003eBridge-Linked (BL)\u003c/strong\u003e\u003c/p\u003e\n \u003c/li\u003e\n \u003cli\u003e\n \u003cp\u003e\u003cstrong\u003eHoney-Comb (HC)\u003c/strong\u003e\u003c/p\u003e\n \u003c/li\u003e\n \u003cli\u003e\n \u003cp\u003e\u003cstrong\u003eSeries-Parallel (SP)\u003c/strong\u003e\u003c/p\u003e\n \u003c/li\u003e\n \u003cli\u003e\n \u003cp\u003e\u003cstrong\u003eTotal-Cross-Tied (TCT)\u003c/strong\u003e\u003c/p\u003e\n \u003c/li\u003e\n \u003c/ul\u003e\n \u003cp\u003eThese configurations are designed to enhance the overall output efficiency, system reliability, and maintenance of the solar PV system.\u003c/p\u003e\n \u003c/div\u003e\n \u003cdiv id=\"Sec20\" class=\"Section3\"\u003e\n \u003ch2\u003e5.5.2 L-C-L FILTER\u003c/h2\u003e\n \u003cp\u003eA filter circuit, commonly known as an LC filter circuit, is used to separate DC components from the rectified output by eliminating AC components. It consists of an inductor (L) and a capacitor (C), ensuring that only the desired DC power is delivered to the load while minimizing unwanted AC ripple.\u003c/p\u003e\n \u003cp\u003eLCL filters are specifically designed to reduce harmonic distortion in the current drawn by power converters with rectifier input stages, such as motor frequency converters and UPS systems. These filters include a combination of reactors and capacitors arranged in a parallel-series configuration, which effectively lowers Total Harmonic Distortion (THD) from the rectifiers and enhances overall power quality. The LCL filter comprises three elements: a grid-side inductor, an inverter-side inductor, and a filter capacitor.\u003c/p\u003e\n \u003c/div\u003e\n\u003c/div\u003e"},{"header":"6. MATLAB SIMULATION OUTPUT WAVEFOREMS AND COMPARISION OF RESULTS FOR THE PROPSED SYSTEM","content":"\u003cdiv id=\"Sec22\" class=\"Section2\"\u003e \u003ch2\u003e6.1 15-LEVEL STEPPED WAVEFORM WITHOUT USING FILTER\u003c/h2\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eFigure \u003cspan refid=\"Fig22\" class=\"InternalRef\"\u003e22\u003c/span\u003e illustrates the output waveform from the 15-level inverter, showcasing reduced harmonic distortion and a pure sine wave voltage. This waveform closely resembles a sinusoidal waveform, indicating high efficiency in power conversion. In renewable energy systems, such as solar or wind power, the 15-level inverter is utilized for harmonic reduction and improved power conversion efficiency. While the 15-level inverter can achieve a Total Harmonic Distortion (THD) below 10%, this performance may vary depending on the control methods and algorithms used.\u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec23\" class=\"Section2\"\u003e \u003ch2\u003e6.2 SINE WAVEFORM USING FILTER\u003c/h2\u003e \u003cp\u003eThe sine waveform produced by the filter circuit further reduces the harmonic percentage of the output waveform. The extent of harmonic reduction depends on factors such as the filter circuit design, the inverter levels, and the number of switches used in the proposed circuit.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eFigure \u003cspan refid=\"Fig23\" class=\"InternalRef\"\u003e23\u003c/span\u003e illustrates the waveform obtained from using the multilevel inverter circuit along with the L-C-L filter, showing a pure sine wave with only about 7.55% harmonics. This waveform, derived from a 15-level inverter, indicates a high-quality output that can be used directly in industrial applications for DC to AC conversion.\u003c/p\u003e \u003cp\u003eDue to external factors such as shadow, dirt, cracks, prolonged usage, and varying weather conditions, solar panels may not consistently produce the same values. To address this variability, the proposed work includes three different solar panels with varying voltage outputs. These are connected to a buck converter to maintain a low voltage for simulation purposes.\u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec24\" class=\"Section2\"\u003e \u003ch2\u003e6.3 FFT ANALYSIS\u003c/h2\u003e \u003cp\u003eThe FFT (Fast Fourier Transform) analysis has been performed to determine the Total Harmonic Distortion (THD) percentage and the level of harmonics present in the waveform. This analysis provides insights into the harmonic content and the purity of the output waveform, essential for assessing the performance of the inverter system.\u003c/p\u003e \u003cp\u003e \u003cdiv class=\"gridtable\"\u003e\u003ctable float=\"Yes\" id=\"Tab5\" border=\"1\"\u003e \u003ccaption language=\"En\"\u003e \u003cdiv class=\"CaptionNumber\"\u003eTable 18\u003c/div\u003e \u003cdiv class=\"CaptionContent\"\u003e \u003cp\u003eComparison of step and sine waveforms.\u003c/p\u003e \u003c/div\u003e \u003c/caption\u003e \u003ccolgroup cols=\"4\"\u003e \u003cdiv align=\"left\" class=\"colspec\" colname=\"c1\" colnum=\"1\"\u003e\u003c/div\u003e \u003cdiv align=\"left\" class=\"colspec\" colname=\"c2\" colnum=\"2\"\u003e\u003c/div\u003e \u003cdiv align=\"left\" class=\"colspec\" colname=\"c3\" colnum=\"3\"\u003e\u003c/div\u003e \u003cdiv align=\"left\" class=\"colspec\" colname=\"c4\" colnum=\"4\"\u003e\u003c/div\u003e \u003cthead\u003e \u003ctr\u003e \u003cth align=\"left\" colspan=\"2\" nameend=\"c2\" namest=\"c1\"\u003e \u003cp\u003eFundamentals of stepped waveform\u003c/p\u003e \u003c/th\u003e \u003cth align=\"left\" colspan=\"2\" nameend=\"c4\" namest=\"c3\"\u003e \u003cp\u003eFundamentals of sine waveform\u003c/p\u003e \u003c/th\u003e \u003c/tr\u003e \u003c/thead\u003e \u003ctbody\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003eSampling time\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e1e-06 sec.\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003eSampling time\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e1e-06 sec.\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003eSamples per cycle\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e20000.\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003eSamples per cycle\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e20000.\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003eDC component\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e0.0003121.\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003eDC component\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e1.293.\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003eFundamental\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e30.57.\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003eFundamental\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e26.64.\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003eTHD\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e14.40%.\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003eTHD\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e7.55%.\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003c/tbody\u003e \u003c/colgroup\u003e \u003c/table\u003e\u003c/div\u003e \u003c/p\u003e \u003cp\u003eTable\u0026nbsp;\u003cspan refid=\"Tab5\" class=\"InternalRef\"\u003e18\u003c/span\u003e presents a comparison of values for both the stepped waveform and the sine waveform. This comparison highlights the differences in performance metrics such as harmonic distortion, efficiency, and overall waveform quality between the two types of waveforms.\u003c/p\u003e \u003cp\u003e \u003cb\u003eFigure 24\u003c/b\u003e Graphical representation of THD without filter circuit.\u003c/p\u003e \u003cp\u003eFigure 24 offers a visual representation of the FFT analysis, illustrating the evaluation of Total Harmonic Distortion (THD). The analysis reveals that the THD is most pronounced in the third-order harmonics, with a value of 14.4%. However, for higher-order harmonics, such as the fifth order and above, the THD decreases progressively. This highlights the importance of identifying specific harmonic contributions to signal distortion and underscores the need to focus on mitigating third-order harmonics to enhance signal quality.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eIn Fig.\u0026nbsp;\u003cspan refid=\"Fig24\" class=\"InternalRef\"\u003e25\u003c/span\u003e, it is evident that the application of the filter circuit has resulted in a substantial reduction of third-order harmonics, now reduced to 7.03%, a notable decrease from the value observed previously. Additionally, the reduction in higher-order harmonics, such as the fifth order and beyond, is even more significant. This demonstrates the effectiveness of the filter circuit in mitigating harmonic distortions, particularly for higher-order harmonics, and thereby enhancing overall signal quality.\u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec25\" class=\"Section2\"\u003e \u003ch2\u003e6.4 HARDWARE IMPLEMENTATION\u003c/h2\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eFigure \u003cspan refid=\"Fig25\" class=\"InternalRef\"\u003e26\u003c/span\u003e depicts the hardware implementation of the inverter, featuring 12 MOSFETs, a driver IC for each switch, and an R-load. A microcontroller is used to determine the switching sequence and obtain the output waveform.\u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec26\" class=\"Section2\"\u003e \u003ch2\u003e6.5 OUTPUT WAVEFORM FROM HARDWARE\u003c/h2\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eFigure \u003cspan refid=\"Fig26\" class=\"InternalRef\"\u003e27\u003c/span\u003e showcases the capabilities of a 15-level multilevel inverter, emphasizing its importance in contemporary power systems. Its ability to generate finely stepped voltage levels and deliver superior voltage quality highlights its role as a significant advancement in energy conversion technology.\u003c/p\u003e \u003c/div\u003e"},{"header":"7. CONCLUSION AND FUTURE SCOPE","content":"\u003cdiv id=\"Sec28\" class=\"Section2\"\u003e \u003ch2\u003e7.1 CONCLUSION\u003c/h2\u003e \u003cp\u003eIn conclusion, the implementation of a 15-level multilevel inverter using a modified H-bridge structure and an LCL filter provides an efficient and robust power conversion solution for photovoltaic (PV) systems. This design enhances voltage levels, improves output waveform quality, and reduces harmonic distortion, making it ideal for seamless integration with PV systems. It enhances power quality, reduces losses, and facilitates the integration of renewable energy sources into the grid.\u003c/p\u003e \u003cp\u003eOur paper addressed the challenges associated with achieving high-level voltage output and high-quality waveforms. Through meticulous design and simulation, we demonstrated the feasibility and effectiveness of this system. The modified H-bridge topology and LCL filter yielded a clean and stable sine wave output, boosting efficiency and minimizing harmonic distortion. This paper highlights the potential of multilevel inverters for diverse applications, including renewable energy systems and motor drives, by achieving a 15-level output.\u003c/p\u003e \u003cp\u003eIn summary, this project represents a significant advancement in multilevel inverters, contributing to cleaner and more efficient energy conversion and fostering innovation in sustainable energy solutions.\u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec29\" class=\"Section2\"\u003e \u003ch2\u003e7.2 FUTURE SCOPE\u003c/h2\u003e \u003cp\u003eThe PV 15-level multilevel inverter with a modified H-bridge circuit topology and 12 switches represents a groundbreaking advancement in renewable energy technologies, offering a promising vision for the future. This innovative technology presents numerous opportunities and challenges in the realm of sustainable energy systems.\u003c/p\u003e \u003cp\u003eOptimizing efficiency is a crucial focus for future research. The 15-level inverter's ability to achieve high voltage resolution and reduced harmonic distortion necessitates the development of advanced control algorithms for enhanced efficiency. A significant aspect of this effort involves creating sophisticated control strategies for bidirectional power flow to ensure seamless integration into modern power grids.\u003c/p\u003e \u003cp\u003eThe design of the 15-level inverter can alleviate stress on critical power electronic components, leading to improved longevity, reduced maintenance costs, and extended service life. This also contributes to lowering the life cycle costs for PV system owners.\u003c/p\u003e \u003cp\u003eAnother important consideration is the efficiency of production processes and the reduction of manufacturing costs. Future efforts will aim to enhance design, material selection, and production methods to improve cost-effectiveness and accessibility, making this technology more prevalent in the renewable energy sector.\u003c/p\u003e \u003cp\u003eIntegrating the 15-level inverter with energy storage systems, such as battery systems, represents a significant area of research. This integration promises to improve grid stability, enable peak shaving, and ensure a reliable energy supply during periods of renewable generation.\u003c/p\u003e \u003cp\u003eAdditionally, synchronizing this technology with smart grids is an ambitious but vital possibility. By incorporating robust communication interfaces and network management protocols, the 15-level inverter can support advanced network monitoring and control capabilities, which are essential for contemporary network management practices.\u003c/p\u003e \u003c/div\u003e"},{"header":"Declarations","content":"\u003ch2\u003eAuthor Contribution\u003c/h2\u003e\u003cp\u003eSarathkumar D wrote the main manuscript text and Raymon Antony Raj prepared all figures. Sarathkumar D and Raymon Antony Raj both of them reviewed the manuscript.\u003c/p\u003e"},{"header":"References","content":"\u003col\u003e\n\u003cli\u003eSumit, R A Sanjeevkumar, \u0026ldquo;A novel generalised topology of a reduced part count multilevel inverter with level boosting network to improve the quality of supply\u0026rdquo;, Global Transitions Proceedings, Volume 2, Issue 2, 2021, Pages 238-245, ISSN 2666-285X, https://doi.org/10.1016/j.gltp.2021.08.019.\u003c/li\u003e\n\u003cli\u003eViswanathan and B. Anand.(2022) \u0026ldquo;Performance Enhancement of PV Based Boost Cascaded Fifteen Level Inverterfor AC Loads\u0026rdquo; Tech science press, vol.42, no.1.pp. 165-181.\u003c/li\u003e\n\u003cli\u003eKrishnachaitanya and A.Chitra,(2021) \u0026quot;Quantitative Analysis of Asymmetric Multilevel Inverters With Reduced Device Count From Reliability and Cost Function Perspective\u0026mdash;A Review,\u0026quot; in IEEE Transactions on Power Electronics, vol. 36, no. 10, pp. 11068-11086.\u003c/li\u003e\n\u003cli\u003eVijayalakshmi N, \u0026ldquo;Photovoltaic fed multilevel inverter design using PODPWM technique for improved power quality\u0026rdquo;, International Journal of Advances in Signal and Image Sciences, vol. 5, no. 1, pp. 8\u0026ndash;14, Jun. 2019.\u003c/li\u003e\n\u003cli\u003eJ. G. Shankar, J. B. Edward and E. Neeraja, \u0026quot;Performance evaluation of a nine level cascaded multilevel inverter with single DC source for photovoltaic system,\u0026quot; \u003cem\u003e2017 Innovations in Power and Advanced Computing Technologies (i-PACT)\u003c/em\u003e, Vellore, India, 2017, pp. 1-8, doi: 10.1109/IPACT.2017.8245215.\u003c/li\u003e\n\u003cli\u003eMahto, K.K., Pal, P.K., Das, P. \u003cem\u003eet al.\u003c/em\u003e A New Design of Multilevel Inverter Based on T-type Symmetrical and Asymmetrical DC Sources. \u003cem\u003eIran J Sci Technol Trans Electr Eng\u003c/em\u003e \u003cstrong\u003e47\u003c/strong\u003e, 639\u0026ndash;657 (2023). https://doi.org/10.1007/s40998-022-00568-4\u003c/li\u003e\n\u003cli\u003eM. Anusuya, R. Geetha \u0026amp; R. Ilango (2023) Design of a 15-Level Non-Modular Multilevel-Inverter in a Grid-Connected Solar PV System: A Hybrid ZOA-SNN Technique, IETE Journal of Research, DOI: 10.1080/03772063.2023.2255550.\u003c/li\u003e\n\u003cli\u003eC. Dhanamjayulu, S. Padmanaban, J. B. Holm-Nielsen and F. Blaabjerg, \u0026quot;Design and Implementation of a Single-Phase 15-Level Inverter With Reduced Components for Solar PV Applications,\u0026quot; in \u003cem\u003eIEEE Access\u003c/em\u003e, vol. 9, pp. 581-594, 2021, doi: 10.1109/ACCESS.2020.3046477.\u003c/li\u003e\n\u003cli\u003eMahato, B., Majumdar, S., Jana, K.C. \u003cem\u003eet al.\u003c/em\u003e A Generalized Series-Connected Multilevel Inverter (MLI) Based on Reduced Power Electronic Devices for Symmetrical/Asymmetrical Sources. \u003cem\u003eArab J Sci Eng\u003c/em\u003e \u003cstrong\u003e48\u003c/strong\u003e, 5907\u0026ndash;5924 (2023). https://doi.org/10.1007/s13369-022-07066-z\u003c/li\u003e\n\u003cli\u003eS. K. Yadav, N. Mishra and B. Singh, \u0026quot;Multilevel Converter With Nearest Level Control for Integrating Solar Photovoltaic System,\u0026quot; in \u003cem\u003eIEEE Transactions on Industry Applications\u003c/em\u003e, vol. 58, no. 4, pp. 5117-5126, July-Aug. 2022, doi: 10.1109/TIA.2022.3177399.\u003c/li\u003e\n\u003cli\u003eQanbari and B. Tousi,(2021)\u0026quot;Single-Source Three-Phase Multilevel Inverter Assembled by Three-Phase Two-Level Inverter and Two Single-Phase Cascaded H-Bridge Inverters,\u0026quot; IEEE Transactions on Power Electronics, vol. 36, no. 5, pp. 5204-5212.\u003c/li\u003e\n\u003cli\u003eK. P. Panda, S. S. Lee and G. Panda, \u0026quot;Reduced Switch Cascaded Multilevel Inverter with New Selective Harmonic Elimination Control for Standalone Renewable Energy System,\u0026quot; in \u003cem\u003eIEEE Transactions on Industry Applications\u003c/em\u003e, vol. 55, no. 6, pp. 7561-7574, Nov.-Dec. 2019, doi: 10.1109/TIA.2019.2904923.\u003c/li\u003e\n\u003cli\u003eKumar, D.G., Bhoopal, N., Ganesh, A., Sireesha, N.V., Rao, D.S.N.M. (2023). Implementation of an asymmetric multilevel inverter for solar photovoltaic applications using N-R approach. Journal of New Materials for Electrochemical Systems, Vol. 26, No. 1, pp. 7-17. https://doi.org/10.14447/jnmes.v26i1.a02.\u003c/li\u003e\n\u003cli\u003eKalaiarasi, Omer, P., Kumar, J. and Surjan, B.S., (2020). \u0026quot;Multilevel Converter With Nearest Level Control for Integrating Solar Photovoltaic System\u0026quot;, IEEE Access, vol 8, pp.22281-22302.\u003c/li\u003e\n\u003cli\u003eGopal, Y., Birla, D. \u0026amp; Lalwani, M. Reduced switches multilevel inverter integration with boost converters in photovoltaic system. \u003cem\u003eSN Appl. Sci.\u003c/em\u003e \u003cstrong\u003e2\u003c/strong\u003e, 58 (2020). https://doi.org/10.1007/s42452-019-1848-7.\u003c/li\u003e\n\u003c/ol\u003e"}],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":true,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":false,"hideJournal":true,"highlight":"","institution":"","isAcceptedByJournal":false,"isAuthorSuppliedPdf":false,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":false,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"
[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true},"keywords":"photovoltaic (PV), 15-level inverter, modified H-bridge, 12 switches, modulation strategy, harmonic distortion","lastPublishedDoi":"10.21203/rs.3.rs-4955687/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-4955687/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"\u003cp\u003eThe proposed paper introduces an innovative approach to enhance the efficiency and performance of photovoltaic (PV) systems through the design and investigation of a 15-level multilevel inverter. This inverter topology utilizes a modified H-bridge configuration with 12 switches, aimed at improving voltage control, reducing harmonic distortion, and enabling efficient power conversion. By employing this modified H-bridge architecture, the inverter can achieve 15 distinct voltage levels, which allows for precise control of the output waveform.\u003c/p\u003e\n\u003cp\u003eThe design focuses on optimizing the modulation strategy to manage the switching of the 12 switches effectively, minimizing switching losses, and ensuring an efficient energy conversion process. The resulting voltage levels contribute to better output waveform quality and reduced total harmonic distortion. Additionally, the proposed topology is scalable and adaptable, making it suitable for various applications, including grid-connected PV systems, motor drives, and uninterruptible power supplies (UPS).\u003c/p\u003e\n\u003cp\u003eThe advantages of the modified H-bridge configuration, such as reduced module count and enhanced controllability, contribute to the practicality and feasibility of the suggested inverter topology. Achieving 15 voltage levels with a limited number of switches underscores its applicability and appeal for renewable energy integration and other relevant power electronics applications. Further experimental validation and real-world implementation are recommended to substantiate the theoretical findings and validate the practical advantages of the proposed inverter topology.\u003c/p\u003e","manuscriptTitle":"Design a multilevel inverter with a minimized switch count utilizing a modified H-bridge configuration","msid":"","msnumber":"","nonDraftVersions":[{"code":1,"date":"2024-09-24 11:51:47","doi":"10.21203/rs.3.rs-4955687/v1","editorialEvents":[{"type":"communityComments","content":0}],"status":"published","journal":{"display":true,"email":"
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