Quantum Tunnelling based Ultra-compact and Energy Efficient Spiking Neuron enables Hardware Liquid State Machine

Abstract Low-power and low-area neurons are essential for hardware implementation of large-scale SNNs. Various novel physics based leaky-integrate-and-fire (LIF) neuron architectures have been proposed with low power and area, but are not compatible with CMOS technology to enable brain scale implementation of SNN. In this paper, for the first time, we demonstrate hardware implementation of LSM reservoir using band-to-band-tunnelling (BTBT) based neuron. A low-power thresholding circuit and current-to-voltage converter design are proposed. We further propose a predistortion technique to linearize a nonlinear neuron without any area and power overhead. We establish the equivalence of the proposed neuron with the ideal LIF neuron to demonstrate its versatility. To verify the effect of the proposed neuron, a 36-neuron LSM reservoir is fabricated in GF-45nm PDSOI technology. We achieved 5000x lower energy-per-spike at a similar area, 50x less area at a similar energy-per-spike, and 10x lower standby power at a similar area and energy-per-spike. Such overall performance improvement enables brain scale computing.