Ultra-Fast Flash-ADC Design Automation Approach Using Artificial Neural Networks: Achieving Design inUnder One Second

Ultra-Fast Flash-ADC Design Automation Approach Using Artificial Neural Networks: Achieving Design inUnder One Second | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Article Ultra-Fast Flash-ADC Design Automation Approach Using Artificial Neural Networks: Achieving Design inUnder One Second Abdullah Bayram, Hakan Taşkıran, Engin Afacan This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-6242395/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract The growing demand for high-performance analog circuits requires innovative design methodologies that accelerate the designprocess while maintaining accuracy and reliability. Machine Learning (ML) techniques have recently emerged in IntegratedCircuit (IC) design, leveraging their powerful modeling capabilities across different design stages. This paper introducesa simulation-free design automation methodology using Artificial Neural Networks (ANNs) to enhance Flash-ADC designworkflows. The proposed approach adopts a top-bottom hierarchical design strategy: ANNs replace simulators and designers,eliminating the need for time-consuming simulations or excessive design iterations. To demonstrate the method, an 8-bit Flash-Analog-to Digital Converter (ADC) was synthesized. The results show that the proposed framework significantly reducescomputational overhead and accelerates the design process, achieving ultra-fast within less than one second. The approachcan be generalized for ADC design and a hybrid testbench setup for analog optimization, offering a scalable solution for othercomplex systems. Physical sciences/Engineering/Electrical and electronic engineering Physical sciences/Engineering Full Text Additional Declarations No competing interests reported. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-6242395","acceptedTermsAndConditions":true,"allowDirectSubmit":true,"archivedVersions":[],"articleType":"Article","associatedPublications":[],"authors":[{"id":438574326,"identity":"bc276822-1801-4ee7-ac62-13da1e75ffe7","order_by":0,"name":"Abdullah Bayram","email":"","orcid":"","institution":"Gebze Technical University","correspondingAuthor":false,"prefix":"","firstName":"Abdullah","middleName":"","lastName":"Bayram","suffix":""},{"id":438574327,"identity":"e5b315cd-b05c-478c-a27e-3da68198730f","order_by":1,"name":"Hakan Taşkıran","email":"","orcid":"","institution":"Gebze Technical University","correspondingAuthor":false,"prefix":"","firstName":"Hakan","middleName":"","lastName":"Taşkıran","suffix":""},{"id":438574328,"identity":"f39a32e5-2946-4817-982f-4a3730a0d544","order_by":2,"name":"Engin Afacan","email":"data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAZAAAAAyAQMAAABI0h/eAAAABlBMVEX///8AAABVwtN+AAAACXBIWXMAAA7EAAAOxAGVKw4bAAAA/ElEQVRIiWNgGAWjYJCCAwwMciCa8QGEn0CUFmMQzWwAUZ0AFiIEwFrYJIjSwi/dfvFwQY2BPH/72WOVX38cZuBnzzFg/rgHtxbJOWcKDs84ZmA440xe2m2ZhMMMkj1vDBgOPMOtxeBGTsJhHrY/jBsYcsxuSwC1AEWAWvC4zB6s5Z+B/Qb+N2bFIC32hLQYSKQfOMzbZpC4QSLHjPEDyBYJAlokbuQwHObtM0ieceONsTRDWjqPxJlnBQfO4NHCPyP98Weebwa2/f05hh9/2FjL8bcnb3xQgUcLAwOPAZzJzAPkghh4NTAwsD+AMxl/4Fc6CkbBKBgFIxQAAHaMVt2Nt8D3AAAAAElFTkSuQmCC","orcid":"","institution":"Gebze Technical University","correspondingAuthor":true,"prefix":"","firstName":"Engin","middleName":"","lastName":"Afacan","suffix":""}],"badges":[],"createdAt":"2025-03-17 08:08:38","currentVersionCode":1,"declarations":"","doi":"10.21203/rs.3.rs-6242395/v1","doiUrl":"https://doi.org/10.21203/rs.3.rs-6242395/v1","draftVersion":[],"editorialEvents":[],"editorialNote":"","failedWorkflow":false,"files":[{"id":91483542,"identity":"0318e574-5dc8-4b59-bd63-187b0d2df269","added_by":"auto","created_at":"2025-09-17 04:02:08","extension":"pdf","order_by":1,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":4831915,"visible":true,"origin":"","legend":"","description":"","filename":"ULTRAFASTADCforsubmissionstoScientificReports.pdf","url":"https://assets-eu.researchsquare.com/files/rs-6242395/v1_covered_b7f78440-6c1e-48c3-a0a9-6c4ad52cb692.pdf"}],"financialInterests":"No competing interests reported.","formattedTitle":"Ultra-Fast Flash-ADC Design Automation Approach Using Artificial Neural Networks: Achieving Design inUnder One Second","fulltext":[],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":false,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":false,"hideJournal":true,"highlight":"","institution":"","isAcceptedByJournal":false,"isAuthorSuppliedPdf":true,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":true,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true},"keywords":"","lastPublishedDoi":"10.21203/rs.3.rs-6242395/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-6242395/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"The growing demand for high-performance analog circuits requires innovative design methodologies that accelerate the designprocess while maintaining accuracy and reliability. Machine Learning (ML) techniques have recently emerged in IntegratedCircuit (IC) design, leveraging their powerful modeling capabilities across different design stages. This paper introducesa simulation-free design automation methodology using Artificial Neural Networks (ANNs) to enhance Flash-ADC designworkflows. The proposed approach adopts a top-bottom hierarchical design strategy: ANNs replace simulators and designers,eliminating the need for time-consuming simulations or excessive design iterations. To demonstrate the method, an 8-bit Flash-Analog-to Digital Converter (ADC) was synthesized. The results show that the proposed framework significantly reducescomputational overhead and accelerates the design process, achieving ultra-fast within less than one second. The approachcan be generalized for ADC design and a hybrid testbench setup for analog optimization, offering a scalable solution for othercomplex systems.","manuscriptTitle":"Ultra-Fast Flash-ADC Design Automation Approach Using Artificial Neural Networks: Achieving Design inUnder One Second","msid":"","msnumber":"","nonDraftVersions":[{"code":1,"date":"2025-04-22 14:30:31","doi":"10.21203/rs.3.rs-6242395/v1","editorialEvents":[{"type":"communityComments","content":0}],"status":"published","journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true}}],"origin":"","ownerIdentity":"0a773c41-6306-48bc-ae4d-28c68f550b66","owner":[],"postedDate":"April 22nd, 2025","published":true,"recentEditorialEvents":[],"rejectedJournal":[],"revision":"","amendment":"","status":"posted","subjectAreas":[{"id":46704719,"name":"Physical sciences/Engineering/Electrical and electronic engineering"},{"id":46704720,"name":"Physical sciences/Engineering"}],"tags":[],"updatedAt":"2025-09-17T03:53:51+00:00","versionOfRecord":[],"versionCreatedAt":"2025-04-22 14:30:31","video":"","vorDoi":"","vorDoiUrl":"","workflowStages":[]},"version":"v1","identity":"rs-6242395","journalConfig":"researchsquare"},"__N_SSP":true},"page":"/article/[identity]/[[...version]]","query":{"redirect":"/article/rs-6242395","identity":"rs-6242395","version":["v1"]},"buildId":"8U1c8b4HqxoKbykW_rLl7","isFallback":false,"isExperimentalCompile":false,"dynamicIds":[84888],"gssp":true,"scriptLoader":[]}