Design and Simulation of a Low Voltage Bandgap Reference Circuit in 0.18 µm CMOS technology for the Supply Range of 1.6 to 4.15V

Design and Simulation of a Low Voltage Bandgap Reference Circuit in 0.18 µm CMOS technology for the Supply Range of 1.6 to 4.15V | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article Design and Simulation of a Low Voltage Bandgap Reference Circuit in 0.18 µm CMOS technology for the Supply Range of 1.6 to 4.15V Seyedeh Marziyeh Mirerfani Shal, Mohtaram Dehban Rahimabad, Ali Heidari This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-6831576/v1 This work is licensed under a CC BY 4.0 License Status: Under Review Version 1 posted 4 You are reading this latest preprint version Abstract In this article, a low-voltage Bandgap Reference (BGR) circuit in 0.18µm CMOS technology is designed and simulated. The proposed circuit operates within a supply voltage range of 1.6V to 4.15V and maintains reliable functionality over a wide temperature range from − 55℃ to 130℃. The design is tested for three output reference voltages: 0.8V, 1.0V, and 1.3V. The maximum observed temperature coefficient (TC) is 44 ppm/℃, indicating good thermal stability. The circuit leverages the base-emitter voltage of parasitic bipolar junction transistors (BJTs) to establish a stable reference, and it employs PTAT and CTAT components for temperature compensation. A key feature of this design is its self-biasing architecture, which eliminates the need for external bias currents, enhancing integration and reducing power consumption. Simulation results confirm the circuit’s robustness under process, voltage, and temperature (PVT) variations, making it suitable for low-power and portable analog or mixed-signal systems. voltage reference CMOS bipolar transistors PTAT CTAT temperature coefficient Full Text Additional Declarations No competing interests reported. Cite Share Download PDF Status: Under Review Version 1 posted Reviewers invited by journal 08 Jun, 2025 Editor assigned by journal 06 Jun, 2025 Submission checks completed at journal 06 Jun, 2025 First submitted to journal 05 Jun, 2025 You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. 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Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-6831576","acceptedTermsAndConditions":true,"allowDirectSubmit":false,"archivedVersions":[],"articleType":"Research Article","associatedPublications":[],"authors":[{"id":468331302,"identity":"888f574e-2390-4e37-a68a-9c7a3737461d","order_by":0,"name":"Seyedeh Marziyeh Mirerfani Shal","email":"data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAZAAAAAyAQMAAABI0h/eAAAABlBMVEX///8AAABVwtN+AAAACXBIWXMAAA7EAAAOxAGVKw4bAAAA2UlEQVRIiWNgGAWjYLCCBAYJBn7+5gNApoQM8VokZxxLAGnhId4mgwM5BiCasBbd9rOPPzzMschnOHDm86sbNRY8DOyHj27Ap8XsTLqBQeI2CcvG5t5t1jnHgA7jSUu7gVfLgTSGBKAWA2aGs9uMc9iAWiR4zPBrOf+M4QBICxtDzjPjnH/EaLmRxtgA0sLDkMP8OLeNKC3PmBlAWiQkjpkx5/ZJ8LAR9Mv5NOaPP7fVGdifb378OedbnRw/++FjeLUgAzYJMEmschBg/kCK6lEwCkbBKBg5AABwNUZPllCzPgAAAABJRU5ErkJggg==","orcid":"","institution":"University of Guilan","correspondingAuthor":true,"prefix":"","firstName":"Seyedeh","middleName":"Marziyeh Mirerfani","lastName":"Shal","suffix":""},{"id":468331303,"identity":"98b4ca51-75db-43e1-8c7d-343febad4c3a","order_by":1,"name":"Mohtaram Dehban Rahimabad","email":"","orcid":"","institution":"University of Guilan","correspondingAuthor":false,"prefix":"","firstName":"Mohtaram","middleName":"Dehban","lastName":"Rahimabad","suffix":""},{"id":468331304,"identity":"855164b9-3fed-406f-9048-0544c2221d82","order_by":2,"name":"Ali Heidari","email":"","orcid":"","institution":"University of Guilan","correspondingAuthor":false,"prefix":"","firstName":"Ali","middleName":"","lastName":"Heidari","suffix":""}],"badges":[],"createdAt":"2025-06-05 18:53:16","currentVersionCode":1,"declarations":"","doi":"10.21203/rs.3.rs-6831576/v1","doiUrl":"https://doi.org/10.21203/rs.3.rs-6831576/v1","draftVersion":[],"editorialEvents":[],"editorialNote":"","failedWorkflow":false,"files":[{"id":84383189,"identity":"c64b5740-fb0f-4d57-b385-3a4a5a4e8290","added_by":"auto","created_at":"2025-06-11 09:32:15","extension":"pdf","order_by":1,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":584522,"visible":true,"origin":"","legend":"","description":"","filename":"LowVoltageBandgapMirerfani2025.pdf","url":"https://assets-eu.researchsquare.com/files/rs-6831576/v1_covered_9cbb57bb-10ff-4cd0-9c0d-6972ac43d910.pdf"}],"financialInterests":"No competing interests reported.","formattedTitle":"Design and Simulation of a Low Voltage Bandgap Reference Circuit in 0.18 µm CMOS technology for the Supply Range of 1.6 to 4.15V","fulltext":[],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":false,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":false,"hideJournal":false,"highlight":"","institution":"","isAcceptedByJournal":false,"isAuthorSuppliedPdf":true,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":true,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"[email protected]","identity":"analog-integrated-circuits-and-signal-processing","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":false,"externalIdentity":"alog","sideBox":"Learn more about [Analog Integrated Circuits and Signal Processing](http://link.springer.com/journal/10470)","snPcode":"10470","submissionUrl":"https://submission.nature.com/new-submission/10470/3","title":"Analog Integrated Circuits and Signal Processing","twitterHandle":"","acdcEnabled":true,"dfaEnabled":true,"editorialSystem":"em","reportingPortfolio":"Springer Hybrid","inReviewEnabled":true,"inReviewRevisionsEnabled":false},"keywords":"voltage reference, CMOS, bipolar transistors, PTAT, CTAT, temperature coefficient","lastPublishedDoi":"10.21203/rs.3.rs-6831576/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-6831576/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"\u003cp\u003eIn this article, a low-voltage Bandgap Reference (BGR) circuit in 0.18\u0026micro;m CMOS technology is designed and simulated. The proposed circuit operates within a supply voltage range of 1.6V to 4.15V and maintains reliable functionality over a wide temperature range from \u0026minus;\u0026thinsp;55℃ to 130℃. The design is tested for three output reference voltages: 0.8V, 1.0V, and 1.3V. The maximum observed temperature coefficient (TC) is 44 ppm/℃, indicating good thermal stability. The circuit leverages the base-emitter voltage of parasitic bipolar junction transistors (BJTs) to establish a stable reference, and it employs PTAT\u003ca class=\"FNLink\" href=\"#Fn1\" id=\"#FNLinkFn1\"\u003e\u003c/a\u003e and CTAT\u003ca class=\"FNLink\" href=\"#Fn2\" id=\"#FNLinkFn2\"\u003e\u003c/a\u003e components for temperature compensation. A key feature of this design is its self-biasing architecture, which eliminates the need for external bias currents, enhancing integration and reducing power consumption. Simulation results confirm the circuit\u0026rsquo;s robustness under process, voltage, and temperature (PVT) variations, making it suitable for low-power and portable analog or mixed-signal systems.\u003c/p\u003e","manuscriptTitle":"Design and Simulation of a Low Voltage Bandgap Reference Circuit in 0.18 µm CMOS technology for the Supply Range of 1.6 to 4.15V","msid":"","msnumber":"","nonDraftVersions":[{"code":1,"date":"2025-06-11 09:16:05","doi":"10.21203/rs.3.rs-6831576/v1","editorialEvents":[{"type":"communityComments","content":0},{"type":"reviewersInvited","content":"","date":"2025-06-09T03:45:20+00:00","index":"","fulltext":""},{"type":"editorAssigned","content":"","date":"2025-06-06T09:46:56+00:00","index":"","fulltext":""},{"type":"checksComplete","content":"","date":"2025-06-06T09:41:15+00:00","index":"","fulltext":""},{"type":"submitted","content":"Analog Integrated Circuits and Signal Processing","date":"2025-06-05T18:42:36+00:00","index":"","fulltext":""}],"status":"published","journal":{"display":true,"email":"[email protected]","identity":"analog-integrated-circuits-and-signal-processing","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":false,"externalIdentity":"alog","sideBox":"Learn more about [Analog Integrated Circuits and Signal Processing](http://link.springer.com/journal/10470)","snPcode":"10470","submissionUrl":"https://submission.nature.com/new-submission/10470/3","title":"Analog Integrated Circuits and Signal Processing","twitterHandle":"","acdcEnabled":true,"dfaEnabled":true,"editorialSystem":"em","reportingPortfolio":"Springer Hybrid","inReviewEnabled":true,"inReviewRevisionsEnabled":false}}],"origin":"","ownerIdentity":"688ad3e6-ff30-485d-b342-6eee1973ee36","owner":[],"postedDate":"June 11th, 2025","published":true,"recentEditorialEvents":[],"rejectedJournal":[],"revision":"","amendment":"","status":"under-review","subjectAreas":[],"tags":[],"updatedAt":"2025-06-11T09:16:05+00:00","versionOfRecord":[],"versionCreatedAt":"2025-06-11 09:16:05","video":"","vorDoi":"","vorDoiUrl":"","workflowStages":[]},"version":"v1","identity":"rs-6831576","journalConfig":"researchsquare"},"__N_SSP":true},"page":"/article/[identity]/[[...version]]","query":{"redirect":"/article/rs-6831576","identity":"rs-6831576","version":["v1"]},"buildId":"8U1c8b4HqxoKbykW_rLl7","isFallback":false,"isExperimentalCompile":false,"dynamicIds":[84888],"gssp":true,"scriptLoader":[]}