Low-Noise Amplifier and Neurostimulator in submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS)

Deep-Brain Stimulation (DBS) is a a highly effective and safe medical treatment that improves the lives of patients with a wide range of neurological and psychiatric deceases, and has been consolidated as a first-line tool in the treatment of these conditionsin the last two decades. Closed Loop Deep-Brain Stimulation (CLDBS) pushes this tool further by automatically adjusting the stimulation parameters to the brain response in real time. In this context, this paper presents a Low-Noise Amplifier (LNA) and a Neurostimulator circuits fabricated in the low-power/low-voltage 65 nm CMOS process from the TSMC, which were designed targeting implantable applications. To achieve the best trade-off between input-referred noise and power consuption, metaheuristic algorithms were employed to determine and optimizes the dimentions of the LNA devices during the design phase. The measurement results showed that the LNA had a gain of 40.6 dB, a 3 dB bandwidth spanning over three decades from 10 Hz to 8.6 kHz, and a power consumption of 6.19 uW. Simulations results indicated an input-referred noise of 4.86 uVrms for the LNA. The circuit of the Neurostimulator is a programmable Howland Current-Pump, whose measurements showed its ability to generate currents with arbitrary shapes ranging from between 325 uA to +318 uA. The simulations showed a quiescent power consumption of 0.13 W with a zero neurostimulation current. The LNA and the Neurostimulator circuits are supplied with 1.2 V voltage and occupy a microdevice area of 145 um x 311 um and 88 um x 89 um, respectively, making them suitable for implantation in applications involving Closed Loop Deep-Brain Stimulation.