Edge-Side Highly Configurable Accelerator With Efficient Automatic Structure Search Scheme

Edge-Side Highly Configurable Accelerator With Efficient Automatic Structure Search Scheme | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article Edge-Side Highly Configurable Accelerator With Efficient Automatic Structure Search Scheme haobin xiang, wentao wu, miao yu, xinnan shao, chunlei li This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-4519028/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract As the integration of artificial intelligence and industry becomes increasingly interwined, there is a growing focus in both academia and industry on promoting neural networks to achieve real-time high-performance implement on resource-limited devices. Edge computing usually suffers limitations in terms of storage space, size, and power consumption, it’s a great challenge to deploy exisiting convolutional neural networks (CNN) such devices. To tackle this challenge, one of the effective approachs is network pruning, which aims to reduce the size of neural networks by elimination unnecessary parameters and connections. However, most existing network pruning schemes formulate the importance criteria manually, which introduced a lot of additional parameters, leading to insufficiently stable pruning effects, and the setting of design and parameters for pruning methods heavily relies on expert experience. In this paper, we proposed a new channel pruning method based on subtractive average optimizer, which can automatically search for the optimal network model substructure, called SABOPruner. In addition, a highly configurable lightweight and high-performance CNN accelerator is proposed. On this basis, we then designed a pipelined inference architecture based on local-aware region convolution to achieve highly parallel processing of fearures and weights and buffer scheduling. Inorder to verify the effectiveness of the above approach,VGG16 and ResNet56 were deployed on Xilinx XC7Z035 platform, and the experimental results showed that VGG16 can achieve 4.4 frames per second (FPS) and 1.26 times higher memory density compared to state-of-the-art designs, and ResNet56 can achieve 40FPS based on CIFAR-10 dataset.%MCEpastebin% Edge-side hardware acceleration CNN Channel pruning Field programmable gate array (FPGA) Network structure search. Full Text Additional Declarations No competing interests reported. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. 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Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-4519028","acceptedTermsAndConditions":true,"allowDirectSubmit":true,"archivedVersions":[],"articleType":"Research Article","associatedPublications":[],"authors":[{"id":316546848,"identity":"6841b1b4-69f6-47a6-8312-5f4493dd6efd","order_by":0,"name":"haobin xiang","email":"","orcid":"","institution":"","correspondingAuthor":false,"prefix":"","firstName":"haobin","middleName":"","lastName":"xiang","suffix":""},{"id":316546849,"identity":"da44916e-c893-4aa0-9924-862282e30ec4","order_by":1,"name":"wentao wu","email":"","orcid":"","institution":"","correspondingAuthor":false,"prefix":"","firstName":"wentao","middleName":"","lastName":"wu","suffix":""},{"id":316546850,"identity":"30f2d156-ae2f-4f45-91c9-551a21e1bdac","order_by":2,"name":"miao yu","email":"","orcid":"","institution":"","correspondingAuthor":false,"prefix":"","firstName":"miao","middleName":"","lastName":"yu","suffix":""},{"id":316546851,"identity":"94d8367e-882a-454b-8961-3825504f268c","order_by":3,"name":"xinnan shao","email":"","orcid":"","institution":"","correspondingAuthor":false,"prefix":"","firstName":"xinnan","middleName":"","lastName":"shao","suffix":""},{"id":316546852,"identity":"5998a8a8-0c70-4fba-af9d-64d5327047f9","order_by":4,"name":"chunlei li","email":"data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAZAAAAAyAQMAAABI0h/eAAAABlBMVEX///8AAABVwtN+AAAACXBIWXMAAA7EAAAOxAGVKw4bAAAA/ElEQVRIiWNgGAWjYBACPmYGNiBlwcDGzHz8x4cKiKgEPi1sEC0SDGzsbAmSM84wMPAQ1MIA1cLAz2MgzdtGjBZ25mePeXdIyPEx8xgY886rS9zPwHzwNg+DXR5uh7GZG/OekTAGMgoS525jS+xhYEu25mFILsathYcN6B6JxDZm5g0H3m7jAWrhMZPmYTiQ2EBAS30bM4NhA+8cCaAW/m9EaUlgY2YxZuRtMADZwkZAC5uZ5Nw2CcM2ZrY0xhnHEox7DrMZW84xSMaphZ//8DOJt2028vL9h48xfKipk21vb354402FHU4tWAAziDAgXv0oGAWjYBSMAkwAADAeP8AstTQSAAAAAElFTkSuQmCC","orcid":"","institution":"","correspondingAuthor":true,"prefix":"","firstName":"chunlei","middleName":"","lastName":"li","suffix":""}],"badges":[],"createdAt":"2024-06-03 03:38:15","currentVersionCode":1,"declarations":"","doi":"10.21203/rs.3.rs-4519028/v1","doiUrl":"https://doi.org/10.21203/rs.3.rs-4519028/v1","draftVersion":[],"editorialEvents":[],"editorialNote":"","failedWorkflow":false,"files":[{"id":59322791,"identity":"e7647d97-829d-476d-bf35-033558194bb3","added_by":"auto","created_at":"2024-06-29 13:02:13","extension":"pdf","order_by":1,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":683858,"visible":true,"origin":"","legend":"","description":"","filename":"EdgeSideHighlyConfigurableAcceleratorWithEfficientfinal6.3.pdf","url":"https://assets-eu.researchsquare.com/files/rs-4519028/v1_covered_700e45d0-870c-417a-8a05-1c2689cd13de.pdf"}],"financialInterests":"No competing interests reported.","formattedTitle":"Edge-Side Highly Configurable Accelerator With Efficient Automatic Structure Search Scheme ","fulltext":[],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":false,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":false,"hideJournal":true,"highlight":"","institution":"","isAcceptedByJournal":false,"isAuthorSuppliedPdf":true,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":true,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true},"keywords":"Edge-side hardware acceleration, CNN, Channel pruning, Field programmable gate array (FPGA), Network structure search.","lastPublishedDoi":"10.21203/rs.3.rs-4519028/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-4519028/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"\u003cp\u003eAs the integration of artificial intelligence and industry becomes increasingly interwined, there is a growing focus in both academia and industry on promoting neural networks to achieve real-time high-performance implement on resource-limited devices. Edge computing usually suffers limitations in terms of storage space, size, and power consumption, it’s a great challenge to deploy exisiting convolutional neural networks (CNN) such devices. To tackle this challenge, one of the effective approachs is network pruning, which aims to reduce the size of neural networks by elimination unnecessary parameters and connections. However, most existing network pruning schemes formulate the importance criteria manually, which introduced a lot of additional parameters, leading to insufficiently stable pruning effects, and the setting of design and parameters for pruning methods heavily relies on expert experience. In this paper, we proposed a new channel pruning method based on subtractive average optimizer, which can automatically search for the optimal network model substructure, called SABOPruner. In addition, a highly configurable lightweight and high-performance CNN accelerator is proposed. On this basis, we then designed a pipelined inference architecture based on local-aware region convolution to achieve highly parallel processing of fearures and weights and buffer scheduling. Inorder to verify the effectiveness of the above approach,VGG16 and ResNet56 were deployed on Xilinx XC7Z035 platform, and the experimental results showed that VGG16 can achieve 4.4 frames per second (FPS) and 1.26 times higher memory density compared to state-of-the-art designs, and ResNet56 can achieve 40FPS based on CIFAR-10 dataset.%MCEpastebin%\u003c/p\u003e","manuscriptTitle":"Edge-Side Highly Configurable Accelerator With Efficient Automatic Structure Search Scheme","msid":"","msnumber":"","nonDraftVersions":[{"code":1,"date":"2024-06-20 02:40:21","doi":"10.21203/rs.3.rs-4519028/v1","editorialEvents":[{"type":"communityComments","content":0}],"status":"published","journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true}}],"origin":"","ownerIdentity":"7e8b2a83-e267-4cec-8864-02ee837d729d","owner":[],"postedDate":"June 20th, 2024","published":true,"recentEditorialEvents":[],"rejectedJournal":[],"revision":"","amendment":"","status":"posted","subjectAreas":[],"tags":[],"updatedAt":"2024-06-29T12:54:06+00:00","versionOfRecord":[],"versionCreatedAt":"2024-06-20 02:40:21","video":"","vorDoi":"","vorDoiUrl":"","workflowStages":[]},"version":"v1","identity":"rs-4519028","journalConfig":"researchsquare"},"__N_SSP":true},"page":"/article/[identity]/[[...version]]","query":{"redirect":"/article/rs-4519028","identity":"rs-4519028","version":["v1"]},"buildId":"qtupq5eGEP_6zYnWcrvyt","isFallback":false,"isExperimentalCompile":false,"dynamicIds":[84888],"gssp":true,"scriptLoader":[]}