Numerical Simulation Study and Design Optimization of High- Performance SiGe/Si Heterostructure Nanowire Tunnel FETs

Numerical Simulation Study and Design Optimization of High- Performance SiGe/Si Heterostructure Nanowire Tunnel FETs | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article Numerical Simulation Study and Design Optimization of High- Performance SiGe/Si Heterostructure Nanowire Tunnel FETs Mina Labib, Ahmed Shaker, Michael Gad, Yasmine Elogail This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-7500261/v1 This work is licensed under a CC BY 4.0 License Status: Published Journal Publication published 20 Jan, 2026 Read the published version in Silicon → Version 1 posted 10 You are reading this latest preprint version Abstract Conventional silicon-based tunneling field-effect transistors (TFETs) face several issues, including limited ON current, ambipolar conduction, and suboptimal RF performance. This simulation-based study presents a detailed design and optimization approach for a high-performance heterostructure nanowire tunneling FET (NW-TFET). Starting from a fabricated baseline NW-TFET structure, we modify the design through a series of optimization phases to improve both DC and radio-frequency (RF) characteristics. The proposed design features a heterojunction structure in which the source region is composed of Si 1 − x Ge x to enhance the tunneling probability, thereby increasing the ON current. The design also includes the integration of a 15 nm HfO 2 pocket, careful tuning of gate-source alignment, and optimization of the x-composition in the source. Extensive simulations show significant improvements in ON current (I ON ), ON/OFF current ratio, subthreshold swing, and cutoff frequency ( \(\:{f}_{T})\) compared to the initial configuration, with x = 0.75, 0.5 nm pocket underlap, 50 nm gate length, \(\:60\:\text{n}\text{m}\:\) channel length and work function of 4.3 eV. The optimized device achieves an ON/OFF ratio of 4.79×10 6 , a subthreshold swing (SS) of 64.5 mV/decade, threshold voltage ( \(\:{V}_{t})\:\) of 0.253 V and a maximum cutoff frequency of 355 GHz, while keeping ambipolar current low. These findings highlight the potential of the proposed NW-TFET architecture for low-power, high-speed applications. TFET HfO2 pocket Si1 − xGex Heterojunction ON/OFF current ratio Subthreshold swing Cutoff frequency Full Text Additional Declarations No competing interests reported. Cite Share Download PDF Status: Published Journal Publication published 20 Jan, 2026 Read the published version in Silicon → Version 1 posted Editorial decision: Revision requested 31 Oct, 2025 Reviews received at journal 11 Sep, 2025 Reviewers agreed at journal 11 Sep, 2025 Reviews received at journal 09 Sep, 2025 Reviewers agreed at journal 09 Sep, 2025 Reviewers agreed at journal 08 Sep, 2025 Reviewers invited by journal 08 Sep, 2025 Editor assigned by journal 01 Sep, 2025 Submission checks completed at journal 01 Sep, 2025 First submitted to journal 31 Aug, 2025 You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. 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Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-7500261","acceptedTermsAndConditions":true,"allowDirectSubmit":false,"archivedVersions":[],"articleType":"Research Article","associatedPublications":[],"authors":[{"id":513607819,"identity":"a154c214-f247-4f15-83ce-536c9a2c9c7c","order_by":0,"name":"Mina Labib","email":"","orcid":"","institution":"Ain Shams University","correspondingAuthor":false,"prefix":"","firstName":"Mina","middleName":"","lastName":"Labib","suffix":""},{"id":513607820,"identity":"cfe8d9a0-b98f-4b25-8897-ef9669719987","order_by":1,"name":"Ahmed Shaker","email":"data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAZAAAAAyAQMAAABI0h/eAAAABlBMVEX///8AAABVwtN+AAAACXBIWXMAAA7EAAAOxAGVKw4bAAABL0lEQVRIie2PMUvDQBiGv3CQLAe3noj2L7QEilJp/0qODFkSEVwylHBTHAy4Ci36FywFXQsH6ZJQxwwdKoW4ZAh0EYTiBYeKHFI3wXvgPl6Oe3jvA9Bo/iJUHgzgNAPq3T3aTzFuf60gvI9CRtdsVUF0ThKRbs7CZZ9b85JC2GPcunpWlizzaWcM4pLmsTvys9Ll2O9SyDzGcXahrCmCx0MMM8YX2EZBLFwA36RGLBinvqMyWkXw9I4hYvcLskGnW6mQ15IaW6m0KqXSli1ya8Qe8gQhg4s+UKdLZZAt1kyldIpgejBuCzbJUttIUuGYtLJPnNSzY+wrVzkugkldhRG7y9w1vA3FgBDvpaiHvaMba75SOp/f20UWN7NZwgTcVj//xuBLtn5o0Wg0mn/EBwGkY/Rs1uUNAAAAAElFTkSuQmCC","orcid":"","institution":"Ain Shams University","correspondingAuthor":true,"prefix":"","firstName":"Ahmed","middleName":"","lastName":"Shaker","suffix":""},{"id":513607821,"identity":"b6ddcd56-ce7f-4722-b98e-79998b60535f","order_by":2,"name":"Michael Gad","email":"","orcid":"","institution":"Ain Shams University","correspondingAuthor":false,"prefix":"","firstName":"Michael","middleName":"","lastName":"Gad","suffix":""},{"id":513607822,"identity":"d6c95eca-fd52-4931-aecf-09f873ca2c1a","order_by":3,"name":"Yasmine Elogail","email":"","orcid":"","institution":"Zewail City of Science and Technology","correspondingAuthor":false,"prefix":"","firstName":"Yasmine","middleName":"","lastName":"Elogail","suffix":""}],"badges":[],"createdAt":"2025-08-31 11:38:09","currentVersionCode":1,"declarations":"","doi":"10.21203/rs.3.rs-7500261/v1","doiUrl":"https://doi.org/10.21203/rs.3.rs-7500261/v1","draftVersion":[],"editorialEvents":[{"content":"https://doi.org/10.1007/s12633-025-03612-0","type":"published","date":"2026-01-20T15:57:02+00:00"}],"editorialNote":"","failedWorkflow":false,"files":[{"id":101151646,"identity":"833060b4-7ddf-45b5-99df-7970594d40b4","added_by":"auto","created_at":"2026-01-26 16:00:42","extension":"pdf","order_by":1,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":1612836,"visible":true,"origin":"","legend":"","description":"","filename":"ManuscriptTFETVF.pdf","url":"https://assets-eu.researchsquare.com/files/rs-7500261/v1_covered_f4b8b298-b76a-4c4b-a62d-c5442cd9d5cb.pdf"}],"financialInterests":"No competing interests reported.","formattedTitle":"Numerical Simulation Study and Design Optimization of High- Performance SiGe/Si Heterostructure Nanowire Tunnel FETs","fulltext":[],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":false,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":false,"hideJournal":false,"highlight":"","institution":"","isAcceptedByJournal":true,"isAuthorSuppliedPdf":true,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":true,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"[email protected]","identity":"silicon","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":false,"externalIdentity":"scon","sideBox":"Learn more about [Silicon](https://www.springer.com/journal/12633)","snPcode":"12633","submissionUrl":"https://submission.nature.com/new-submission/12633/3","title":"Silicon","twitterHandle":"","acdcEnabled":true,"dfaEnabled":true,"editorialSystem":"em","reportingPortfolio":"Springer Hybrid","inReviewEnabled":true,"inReviewRevisionsEnabled":false},"keywords":"TFET, HfO2 pocket, Si1 − xGex, Heterojunction, ON/OFF current ratio, Subthreshold swing, Cutoff frequency","lastPublishedDoi":"10.21203/rs.3.rs-7500261/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-7500261/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"\u003cp\u003eConventional silicon-based tunneling field-effect transistors (TFETs) face several issues, including limited ON current, ambipolar conduction, and suboptimal RF performance. This simulation-based study presents a detailed design and optimization approach for a high-performance heterostructure nanowire tunneling FET (NW-TFET). Starting from a fabricated baseline NW-TFET structure, we modify the design through a series of optimization phases to improve both DC and radio-frequency (RF) characteristics. The proposed design features a heterojunction structure in which the source region is composed of Si\u003csub\u003e1\u0026thinsp;\u0026minus;\u0026thinsp;x\u003c/sub\u003eGe\u003csub\u003ex\u003c/sub\u003e to enhance the tunneling probability, thereby increasing the ON current. The design also includes the integration of a 15 nm HfO\u003csub\u003e2\u003c/sub\u003e pocket, careful tuning of gate-source alignment, and optimization of the x-composition in the source. Extensive simulations show significant improvements in ON current (I\u003csub\u003eON\u003c/sub\u003e), ON/OFF current ratio, subthreshold swing, and cutoff frequency (\u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\:{f}_{T})\\)\u003c/span\u003e\u003c/span\u003e compared to the initial configuration, with x\u0026thinsp;=\u0026thinsp;0.75, 0.5 nm pocket underlap, 50 nm gate length, \u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\:60\\:\\text{n}\\text{m}\\:\\)\u003c/span\u003e\u003c/span\u003echannel length and work function of 4.3 eV. The optimized device achieves an ON/OFF ratio of 4.79\u0026times;10\u003csup\u003e6\u003c/sup\u003e, a subthreshold swing (SS) of 64.5 mV/decade, threshold voltage (\u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\:{V}_{t})\\:\\)\u003c/span\u003e\u003c/span\u003eof 0.253 V and a maximum cutoff frequency of 355 GHz, while keeping ambipolar current low. These findings highlight the potential of the proposed NW-TFET architecture for low-power, high-speed applications.\u003c/p\u003e","manuscriptTitle":"Numerical Simulation Study and Design Optimization of High- Performance SiGe/Si Heterostructure Nanowire Tunnel FETs","msid":"","msnumber":"","nonDraftVersions":[{"code":1,"date":"2025-09-16 03:27:36","doi":"10.21203/rs.3.rs-7500261/v1","editorialEvents":[{"type":"communityComments","content":0},{"type":"decision","content":"Revision requested","date":"2025-10-31T06:43:57+00:00","index":"","fulltext":""},{"type":"editorInvitedReview","content":"","date":"2025-09-11T10:59:57+00:00","index":"hide","fulltext":""},{"type":"reviewerAgreed","content":"94011237363260217590458341540539723623","date":"2025-09-11T10:24:31+00:00","index":"hide","fulltext":""},{"type":"editorInvitedReview","content":"","date":"2025-09-09T07:59:14+00:00","index":"hide","fulltext":""},{"type":"reviewerAgreed","content":"127325045432351608076999259307532123821","date":"2025-09-09T06:19:05+00:00","index":"hide","fulltext":""},{"type":"reviewerAgreed","content":"28600073905848683289013658864524416187","date":"2025-09-09T01:39:44+00:00","index":"hide","fulltext":""},{"type":"reviewersInvited","content":"","date":"2025-09-09T00:50:13+00:00","index":"","fulltext":""},{"type":"editorAssigned","content":"","date":"2025-09-01T11:49:04+00:00","index":"","fulltext":""},{"type":"checksComplete","content":"","date":"2025-09-01T11:48:01+00:00","index":"","fulltext":""},{"type":"submitted","content":"Silicon","date":"2025-08-31T11:23:34+00:00","index":"","fulltext":""}],"status":"published","journal":{"display":true,"email":"[email protected]","identity":"silicon","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":false,"externalIdentity":"scon","sideBox":"Learn more about [Silicon](https://www.springer.com/journal/12633)","snPcode":"12633","submissionUrl":"https://submission.nature.com/new-submission/12633/3","title":"Silicon","twitterHandle":"","acdcEnabled":true,"dfaEnabled":true,"editorialSystem":"em","reportingPortfolio":"Springer Hybrid","inReviewEnabled":true,"inReviewRevisionsEnabled":false}}],"origin":"","ownerIdentity":"f1468b69-8fb6-4417-b832-59f81e3dcdfe","owner":[],"postedDate":"September 16th, 2025","published":true,"recentEditorialEvents":[],"rejectedJournal":[],"revision":"","amendment":"","status":"published-in-journal","subjectAreas":[],"tags":[],"updatedAt":"2026-01-26T15:59:43+00:00","versionOfRecord":{"articleIdentity":"rs-7500261","link":"https://doi.org/10.1007/s12633-025-03612-0","journal":{"identity":"silicon","isVorOnly":false,"title":"Silicon"},"publishedOn":"2026-01-20 15:57:02","publishedOnDateReadable":"January 20th, 2026"},"versionCreatedAt":"2025-09-16 03:27:36","video":"","vorDoi":"10.1007/s12633-025-03612-0","vorDoiUrl":"https://doi.org/10.1007/s12633-025-03612-0","workflowStages":[]},"version":"v1","identity":"rs-7500261","journalConfig":"researchsquare"},"__N_SSP":true},"page":"/article/[identity]/[[...version]]","query":{"redirect":"/article/rs-7500261","identity":"rs-7500261","version":["v1"]},"buildId":"8U1c8b4HqxoKbykW_rLl7","isFallback":false,"isExperimentalCompile":false,"dynamicIds":[84888],"gssp":true,"scriptLoader":[]}