Implementation of SRRC Filter Using Variable Alpha

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Implementation of SRRC Filter Using Variable Alpha | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article Implementation of SRRC Filter Using Variable Alpha Vinay S, Mahaanth R, Shreyas N This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-8046725/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract This project reports the design and implementation of a Square-Root Raised Cosine (SRRC) filter with a variable roll-off factor, which could provide enhanced efficiency and flexibility of digital communication systems. Because the SRRC f ilter is one of the most widely used filters for pulse shaping, the SRRC is used to reduce inter-symbol interference (ISI) and make better use of the communication system’s bandwidth. By varying the roll-off factor, the SRRC filter can accommodate different communication system needs the lower the value, the more the communication system is able to utilize bandwidth; the greater the value, the better the signal purity and robustness to timing errors. The SRRC filter was configured and tested using MATLAB and Simulink, and comparisons of the varied values were made by the frequency response, eye diagrams, and ISI performance. The concept was also implemented on an FPGA using Xilinx ISE, using polyphase designs to enhance speed and improve the resource impact. The insights gained from the experiment support the condition that a variable- SRRC filter may provide a reliable and adaptable solution for contemporary communication systems. The variable- SRRC filter demonstrates an elegant compromise between bandwidth consumption and signal fidelity; thus, it could play a noteworthy role in addressing demand in wireless, optical, and satellite communication systems. Electrical Engineering Square Root Raised Cosine (SRRC) Filter Roll-off Factor Pulse Shaping Full Text Additional Declarations The authors declare no competing interests. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. 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Because the SRRC \u0026nbsp;f \u0026nbsp;ilter is one of the most widely used filters for pulse shaping, \u0026nbsp;the SRRC is used to reduce inter-symbol interference (ISI) and \u0026nbsp;make better use of the communication system’s bandwidth. By \u0026nbsp;varying the roll-off factor, the SRRC filter can accommodate \u0026nbsp;different communication system needs the lower the value, the \u0026nbsp;more the communication system is able to utilize bandwidth; the \u0026nbsp;greater the value, the better the signal purity and robustness \u0026nbsp;to timing errors. The SRRC filter was configured and tested \u0026nbsp;using MATLAB and Simulink, and comparisons of the varied \u0026nbsp;values were made by the frequency response, eye diagrams, \u0026nbsp;and ISI performance. The concept was also implemented on an \u0026nbsp;FPGA using Xilinx ISE, using polyphase designs to enhance speed \u0026nbsp;and improve the resource impact. The insights gained from the \u0026nbsp;experiment support the condition that a variable- SRRC filter \u0026nbsp;may provide a reliable and adaptable solution for contemporary \u0026nbsp;communication systems. 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