Programmable Zero-Power Silicon Photonic Read-Only Memory and Compute In-Memory Circuits

Programmable Zero-Power Silicon Photonic Read-Only Memory and Compute In-Memory Circuits | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article Programmable Zero-Power Silicon Photonic Read-Only Memory and Compute In-Memory Circuits Stylianos Simos, Isaac Johnson This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-9235732/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract Wide adoption of optical computing systems necessitates the use of integrated photonic platforms that can synergize non-volatile long-term information storage with efficient linear operation architectures. Non-volatile optical memory operation is emerging as a next generation compute system enabler, as this can support high-speed yet zero electrical power for traditional Read-Only-Memory (ROM) deployments required by firmware, boot procedures and lookup tables. At the same time, this enables a diverse range of compute-in-memory (CIM) edge inference tasks that rely on fixed or rarely updated model parameters, provided that non-volatile memory allows also for analog operation and gets combined with optimized linear optical circuit architectures. In this work, we report the first fully CMOS-compatible silicon photonic programmable read-only memory (SiPROM) and combine this with different architectural schemes to demonstrate experimentally a 36 bit zero-power digital SiPROM bank, a coherent analog 4x9 CIM unit, and a 2-bit 9-word zero-power 50 Gb/s content-addressable memory (CAM) bank. The SiPROM memory cell comprises an n-rich SiNx-based Mach–Zehnder interferometer (MZI) with its memory state being programmed through controlled waveguide refractive index modifications caused by ultraviolet (UV) beam exposure, enabling in this way zero-power non-volatile storage without electrical biasing, thermal tuning, or the use of exotic materials. We demonstrate a zero-power digital SiPROM bank by utilizing this memory cell technology within a matrix arrangement, with its functionality being elevated to an analog coherent CIM circuit and a high-speed CAM bank when the matrix arrangement gets combined with linear optical circuit architectures. We believe that the fully CMOS compatible nature of this SiPROM technology together with its successful demonstration across a range of scaled-up digital and analog system-scale functions can pave the way towards high-speed and zero-power memory and compute operations required by critical communications and edge AI segments. Optics/Lasers Optical Materials and Devices Computer Architecture and Engineering Full Text Additional Declarations The authors declare no competing interests. Supplementary Files SUPPL1.doc Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-9235732","acceptedTermsAndConditions":true,"allowDirectSubmit":true,"archivedVersions":[],"articleType":"Research Article","associatedPublications":[],"authors":[{"id":612765627,"identity":"bdf29fe9-df4e-440e-9bc3-77a75ec2744d","order_by":0,"name":"Stylianos Simos","email":"data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAZAAAAAyAQMAAABI0h/eAAAABlBMVEX///8AAABVwtN+AAAACXBIWXMAAA7EAAAOxAGVKw4bAAAA5UlEQVRIiWNgGAWjYDACZgglww8kJEAsA+K0JDDwSDZAtEgQ1sIA1WJwgFgt8u3ciQ9//jjMY3z8+MMbDDWH68wZ2K99wKfF4DDvZmOehMM8ZmdyjC0Yjh2WsGzgKZ6BVwsz7zZpBpCWGzxsEgxshyUMDvAk43dYM+82yR9ALcYz2J9JMPwjQgvDYd5tEiCHGUgwmEkwtoG0sB/GqwPil7R0HgmQXxL70iU3HOZhxu+w/rMbH/6wsZbjbweG2Idv1vwGx9sf43cYBDRDqAQQwcxDVGzWIXPYHxCjZRSMglEwCkYOAABhjkMjqyXBXAAAAABJRU5ErkJggg==","orcid":"","institution":"Aristotle University of Thessaloniki","correspondingAuthor":true,"prefix":"","firstName":"Stylianos","middleName":"","lastName":"Simos","suffix":""},{"id":612769180,"identity":"96ff132f-d510-4c2a-983f-357d725f3d40","order_by":1,"name":"Isaac Johnson","email":"data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAZAAAAAyAQMAAABI0h/eAAAABlBMVEX///8AAABVwtN+AAAACXBIWXMAAA7EAAAOxAGVKw4bAAAA0UlEQVRIiWNgGAWjYBACNoaDDQwfDGyQhHgIajncwDijIg3EIlILAwN7AzPPmcMkaOFjPNj8grftvD2/fPOxBww1dgwGZw4QctjBNgvJttuJM9vY0g0YjiUzGJxtIKzFwLDtdoLBMR4zCQa2AwwG5wk4DKwlse2cPUTLP+K0ND84cOYA4waQFsa2A8Q5jLGhIhnol7Q0icS+ZB5JQt6Xn3H88ec/Bnb2/MyHj0l8+GYnx3cmgYDLJA6wScA5CcREJAN/A/MHwqpGwSgYBaNgRAMArdtEUWo1kx4AAAAASUVORK5CYII=","orcid":"","institution":"University of Southampton","correspondingAuthor":true,"prefix":"","firstName":"Isaac","middleName":"","lastName":"Johnson","suffix":""}],"badges":[],"createdAt":"2026-03-26 15:06:36","currentVersionCode":1,"declarations":{"humanSubjects":false,"vertebrateSubjects":false,"conflictsOfInterestStatement":false,"humanSubjectEthicalGuidelines":false,"humanSubjectConsent":false,"humanSubjectClinicalTrial":false,"humanSubjectCaseReport":false,"vertebrateSubjectEthicalGuidelines":false},"doi":"10.21203/rs.3.rs-9235732/v1","doiUrl":"https://doi.org/10.21203/rs.3.rs-9235732/v1","draftVersion":[],"editorialEvents":[],"editorialNote":"","failedWorkflow":false,"files":[{"id":106094179,"identity":"6f3bc21d-6680-460d-8f95-64120fbb4337","added_by":"auto","created_at":"2026-04-03 11:41:29","extension":"pdf","order_by":1,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":928308,"visible":true,"origin":"","legend":"","description":"","filename":"mainmanuscriptProgrammableZeroPowerSiliconPhotonicReadOnlyMemoryandComputeInMemoryCircuits.pdf","url":"https://assets-eu.researchsquare.com/files/rs-9235732/v1_covered_6b8ac6ae-6946-4761-99c8-94ec724a4808.pdf"},{"id":106010112,"identity":"ad3b962c-2a8e-4656-a2c3-a83ad7f8631d","added_by":"auto","created_at":"2026-04-02 11:35:58","extension":"doc","order_by":1,"title":"","display":"","copyAsset":false,"role":"supplement","size":2823365,"visible":true,"origin":"","legend":"","description":"","filename":"SUPPL1.doc","url":"https://assets-eu.researchsquare.com/files/rs-9235732/v1/1e1465f9d8e92a81295a0d8a.doc"}],"financialInterests":"The authors declare no competing interests.","formattedTitle":"\u003cp\u003eProgrammable Zero-Power Silicon Photonic Read-Only Memory and Compute In-Memory Circuits\u003c/p\u003e","fulltext":[],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":false,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":true,"hideJournal":true,"highlight":"","institution":"Aristotle University of Thessaloniki","isAcceptedByJournal":false,"isAuthorSuppliedPdf":true,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":true,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true},"keywords":"","lastPublishedDoi":"10.21203/rs.3.rs-9235732/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-9235732/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"\u003cp\u003eWide adoption of optical computing systems necessitates the use of integrated photonic platforms that can synergize non-volatile long-term information storage with efficient linear operation architectures. Non-volatile optical memory operation is emerging as a next generation compute system enabler, as this can support high-speed yet zero electrical power for traditional Read-Only-Memory (ROM) deployments required by firmware, boot procedures and lookup tables. At the same time, this enables a diverse range of compute-in-memory (CIM) edge inference tasks that rely on fixed or rarely updated model parameters, provided that non-volatile memory allows also for analog operation and gets combined with optimized linear optical circuit architectures. In this work, we report the first fully CMOS-compatible silicon photonic programmable read-only memory (SiPROM) and combine this with different architectural schemes to demonstrate experimentally a 36 bit zero-power digital SiPROM bank, a coherent analog 4x9 CIM unit, and a 2-bit 9-word zero-power 50 Gb/s content-addressable memory (CAM) bank. The SiPROM memory cell comprises an n-rich SiNx-based Mach\u0026ndash;Zehnder interferometer (MZI) with its memory state being programmed through controlled waveguide refractive index modifications caused by ultraviolet (UV) beam exposure, enabling in this way zero-power non-volatile storage without electrical biasing, thermal tuning, or the use of exotic materials. We demonstrate a zero-power digital SiPROM bank by utilizing this memory cell technology within a matrix arrangement, with its functionality being elevated to an analog coherent CIM circuit and a high-speed CAM bank when the matrix arrangement gets combined with linear optical circuit architectures. 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