Code Generation and Optimization for Different Targets for a Graph DSL

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Abstract

Parallelizing graph algorithms is challenging due to the inher- ent irregularity of computation, memory access, and commu- nication. The challenge gets exacerbated as newer and dif- ferent parallel platforms become popular. A domain expert needs to learn multiple programming languages to take ad- vantage of the available underlying hardware. To address this issue, recently, a domain-specific language (DSL) for graph al- gorithms has been developed, which targets different kinds of hardware, including multi-core, distributed, and many-core architectures. Thus, this DSL generates CUDA, OpenMP, and MPI codes from the same algorithmic specification. At the heart of this versatile translation lies its analysis and trans- formations operating on a common abstract syntax tree. In this paper, we describe the challenges faced and overcome by this graph DSL’s syntax, code generation, and optimiza- tion phases in generating code for different target hardware focusing mainly OpenMP and CUDA. We also illustrate the effect of various analyses and transforms using a suite of ten large graphs for four popular graph algorithms, such as Page Rank, Betweenness Centrality, Single Source Shortest Paths, and Triangle Counting. Our evaluation on ten large- scale real and synthetic graphs across four fundamental al- gorithms (PageRank, Betweenness Centrality, SSSP, Triangle Counting) demonstrates that StarPlat’s generated code achieves 3.7x – 14.1x speedups over unoptimized baselines and per- formance competitive with or surpassing hand-tuned frame- works such as Gunrock and LonestarGPU. These results show that compiler-driven, graph-specific program analyses can bridge the gap between productivity and performance portability in parallel graph analytics.
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Data may be preliminary. 7 October 2025 V1 Latest version Share on Code Generation and Optimization for Different Targets for a Graph DSL Authors : Ashwina Kumar 0000-0001-6425-7479 [email protected] , Naveen LS , Shriram Chandran , Hemesh DJ , Gudla Sanjay 0009-0004-1938-2966 , Kovvuri Sravan Kumar Reddy , Nibedita Behera , and Rupesh Nasre Authors Info & Affiliations https://doi.org/10.22541/au.175987810.03504550/v1 270 views 146 downloads Contents Abstract Supplementary Material Information & Authors Metrics & Citations View Options References Figures Tables Media Share Abstract Parallelizing graph algorithms is challenging due to the inher- ent irregularity of computation, memory access, and commu- nication. The challenge gets exacerbated as newer and dif- ferent parallel platforms become popular. A domain expert needs to learn multiple programming languages to take ad- vantage of the available underlying hardware. To address this issue, recently, a domain-specific language (DSL) for graph al- gorithms has been developed, which targets different kinds of hardware, including multi-core, distributed, and many-core architectures. Thus, this DSL generates CUDA, OpenMP, and MPI codes from the same algorithmic specification. At the heart of this versatile translation lies its analysis and trans- formations operating on a common abstract syntax tree. In this paper, we describe the challenges faced and overcome by this graph DSL’s syntax, code generation, and optimiza- tion phases in generating code for different target hardware focusing mainly OpenMP and CUDA. We also illustrate the effect of various analyses and transforms using a suite of ten large graphs for four popular graph algorithms, such as Page Rank, Betweenness Centrality, Single Source Shortest Paths, and Triangle Counting. Our evaluation on ten large- scale real and synthetic graphs across four fundamental al- gorithms (PageRank, Betweenness Centrality, SSSP, Triangle Counting) demonstrates that StarPlat’s generated code achieves 3.7x – 14.1x speedups over unoptimized baselines and per- formance competitive with or surpassing hand-tuned frame- works such as Gunrock and LonestarGPU. These results show that compiler-driven, graph-specific program analyses can bridge the gap between productivity and performance portability in parallel graph analytics. Supplementary Material File (wiley_journal_template___analysis.pdf) Download 1.17 MB Information & Authors Information Version history V1 Version 1 07 October 2025 Copyright This work is licensed under a Non Exclusive No Reuse License. Keywords compiler cuda hpc openmp parallel computing Authors Affiliations Ashwina Kumar 0000-0001-6425-7479 [email protected] Indian Institute of Technology Madras View all articles by this author Naveen LS Indian Institute of Technology Madras View all articles by this author Shriram Chandran Indian Institute of Technology Madras View all articles by this author Hemesh DJ Indian Institute of Technology Madras View all articles by this author Gudla Sanjay 0009-0004-1938-2966 Indian Institute of Technology Madras View all articles by this author Kovvuri Sravan Kumar Reddy Indian Institute of Technology Madras View all articles by this author Nibedita Behera Indian Institute of Technology Madras View all articles by this author Rupesh Nasre Indian Institute of Technology Madras View all articles by this author Metrics & Citations Metrics Article Usage 270 views 146 downloads .FvxKWukQNSOunydq8rnd { width: 100px; } Citations Download citation Ashwina Kumar, Naveen LS, Shriram Chandran, et al. Code Generation and Optimization for Different Targets for a Graph DSL. Authorea . 07 October 2025. DOI: https://doi.org/10.22541/au.175987810.03504550/v1 If you have the appropriate software installed, you can download article citation data to the citation manager of your choice. Simply select your manager software from the list below and click Download. For more information or tips please see 'Downloading to a citation manager' in the Help menu . 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