Modular FPGA Design for Montgomery Multiplication Using MATLAB HDL Coder

Modular FPGA Design for Montgomery Multiplication Using MATLAB HDL Coder | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article Modular FPGA Design for Montgomery Multiplication Using MATLAB HDL Coder Ghada Elsayed This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-8492006/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract FPGAs have become vital tools in the design, implementation, and testing of computing algorithms. This paper aims to investigate the impact of the MATLAB HDL Coder script writing method on its synthesis to FPGA resources. This is achieved by designing a complex computational algorithm in a modular way. Three necessary modules are the memory module, the control module, and the computation module, which are analyzed as independent MATLAB HDL coder projects. This analysis includes examining the synthesis report for each module and evaluating them collectively. The modular, scalable design of the Montgomery multiplier Algorithm enables studying area consumption and speed in a combined manner. The analysis shows that the control module has less effect on the speed and the area. The memory module is very fast but shares the area with the computation module. The main module that affects the speed is the computation module. The target platform is xc7vx330t-2ffg1157 Virtex-7 Xilinx FPGA. FPGA Design MATLAB HDL Coder Security Computation Full Text Additional Declarations No competing interests reported. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-8492006","acceptedTermsAndConditions":true,"allowDirectSubmit":true,"archivedVersions":[],"articleType":"Research Article","associatedPublications":[],"authors":[{"id":580115391,"identity":"cde78f1a-f417-4d98-95e0-b0157fc483ab","order_by":0,"name":"Ghada Elsayed","email":"data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAZAAAAAyAQMAAABI0h/eAAAABlBMVEX///8AAABVwtN+AAAACXBIWXMAAA7EAAAOxAGVKw4bAAABGElEQVRIiWNgGAWjYBAC/hkMDBIMDP9kwDyeigNgWgKfFokbYAUHeCBazhChxUACWQtvGzFapJsf3vgB1CLffsbwwdt5dxL7GZgP3uZhsLFrwKVF5pixZQ/DHx6DMznGhnO3PUuc2cCWbM3DkJaMS4vhjQQzCR6gLQYMOWbSvNsOJ244wGMmzcNwOBmnw26kf5P8A3JY/xvz37xzDifuP8D/DajlPx4tOSAzgd4HMph5G4C2MPCwgUTscGmRuJFTbC1jAHTYjWfFknOOPTOecZjN2HKOQXICLi38M9I33nxT8U9Ovj9544c3NXdk+9uBYfimws4elxao80AEhwGEwwwRSWzArwcE2B+gcAnYMgpGwSgYBSMIAADEoVsY6xO2PAAAAABJRU5ErkJggg==","orcid":"","institution":"British University in Egypt","correspondingAuthor":true,"prefix":"","firstName":"Ghada","middleName":"","lastName":"Elsayed","suffix":""}],"badges":[],"createdAt":"2025-12-31 19:53:12","currentVersionCode":1,"declarations":"","doi":"10.21203/rs.3.rs-8492006/v1","doiUrl":"https://doi.org/10.21203/rs.3.rs-8492006/v1","draftVersion":[],"editorialEvents":[],"editorialNote":"","failedWorkflow":false,"files":[{"id":108803918,"identity":"4f6eaef6-1977-4208-a689-76ba89885542","added_by":"auto","created_at":"2026-05-08 15:10:49","extension":"pdf","order_by":1,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":820931,"visible":true,"origin":"","legend":"","description":"","filename":"FPGATechnologyforEmbeddedSystemsApplication.pdf","url":"https://assets-eu.researchsquare.com/files/rs-8492006/v1_covered_77c5a967-05b4-4f0a-88eb-7c7ed33bfd68.pdf"}],"financialInterests":"No competing interests reported.","formattedTitle":"Modular FPGA Design for Montgomery Multiplication Using MATLAB HDL Coder","fulltext":[],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":false,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":false,"hideJournal":true,"highlight":"","institution":"","isAcceptedByJournal":false,"isAuthorSuppliedPdf":true,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":true,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true},"keywords":"FPGA Design, MATLAB HDL Coder, Security Computation","lastPublishedDoi":"10.21203/rs.3.rs-8492006/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-8492006/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"FPGAs have become vital tools in the design, implementation, and testing of computing algorithms. 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