Semiconductor Wafer Warpage in Electronics Packaging: A Hybrid Investigation with ML and Experimental Insights

Semiconductor Wafer Warpage in Electronics Packaging: A Hybrid Investigation with ML and Experimental Insights | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article Semiconductor Wafer Warpage in Electronics Packaging: A Hybrid Investigation with ML and Experimental Insights krishnamoorthy Ramalingam, Mohd Zulkifly Abdullah, Mohamad Aizat Abas, and 6 more This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-6728862/v1 This work is licensed under a CC BY 4.0 License Status: Published Journal Publication published 20 Dec, 2025 Read the published version in The International Journal of Advanced Manufacturing Technology → Version 1 posted 5 You are reading this latest preprint version Abstract Silicon wafers, essential for modern electronics and solar panels, require a thorough understanding of their behavior under thermal stress to ensure reliability in advanced electronics packaging. Warpage, influenced by factors such as material properties, coefficients of thermal expansion (CTE), wafer dimensions, top-layer thickness, and applied thermal profiles, presents a significant challenge in semiconductor manufacturing. This study investigates warpage in silicon oxide-coated wafers of 4-inch, 6-inch, and 8-inch sizes, with thicknesses of 525 µm, 675 µm, and 725 µm, respectively, subjected to a thermal profile peaking at 268°C. Experimental measurements using a laser displacement sensor and reflow oven revealed a progressive increase in warpage with wafer diameter, ranging from 0.3 mm to 0.9 mm. To model and predict wafer warpage, five machine learning (ML) algorithms were applied, with the Rain Forest (RF) algorithm emerging as the most effective. The model was optimized using k-fold validation, shape factor analysis, and heat map evaluation, achieving high accuracy (R² = 0.88) and low mean error. The optimized ML model was validated against experimental data and subsequently employed to predict warpage for a 12-inch wafer, yielding consistent trends. Further comparisons between ML predictions and ANSYS simulations demonstrated that ML predictions exhibited a lower error percentage (5–10%) compared to ANSYS simulations (10–20%), reinforcing the superior predictive capability of machine learning. This study successfully integrates experimental methods and machine learning to address warpage challenges, contributing to advancements in semiconductor manufacturing and electronics packaging. Machine learning Silicon wafer Warpage Thermal stress Advanced electronics packaging Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 Introduction In recent times, the world has entered a competitive race in the domain of Artificial Intelligence (AI). As nations strive to establish dominance in AI implementation, it has become imperative to focus on leveraging advanced technologies to harness the full potential of AI. High-Performance Computing (HPC) and advanced electronics are at the forefront of this revolution, playing a pivotal role in meeting the vast computational demands of AI systems and ensuring seamless integration across industries [ 1 , 2 ]. At this critical juncture, silicon wafers contribute significantly as the foundation of advanced electronics packaging. They enable the fabrication of microchips, processors, and memory units essential for driving AI technologies. The precise engineering of silicon wafers directly impacts the reliability, speed, and efficiency of AI systems, influencing applications in real-time data processing, machine learning algorithms, and beyond. Their role extends beyond manufacturing, affecting the scalability and sustainability of AI-driven innovations in sectors such as healthcare, autonomous systems, and energy management [ 3 – 6 ]. Silicon wafers must exhibit rigidity with minimal defects, such as cracks, to ensure the optimal performance of electronic devices. Typically, these wafers are composed of multiple layers, including a bottom layer, epoxy, top layer, and chips. However, the varying coefficients of thermal expansion (CTE) of these materials pose significant challenges, as they are the primary cause of warpage during manufacturing and packaging processes [ 7 , 8 ]. Conducting warpage analysis is critical to inspect wafers and understand their behavior under thermal loads. During the manufacturing and packaging of electronics, silicon wafers are exposed to thermal loads within a peak range of 250°C to 270°C. The applied thermal load, combined with differences in CTE among the layers, significantly influences warpage generation. Moreover, the temperature profile—including ramping, peak, and holding temperatures—plays a crucial role in determining warpage dynamics, emphasizing the need for effective thermal profiling and detailed wafer inspection [ 9 , 10 ]. The studies revealed that ramping the temperature up to 260°C, maintaining the peak temperature for five to ten minutes, and then gradually lowering it to atmospheric levels provides critical insights into wafer behavior. This temperature profile closely mirrors industrial applications, making it highly relevant for analyzing warpage dynamics in silicon wafers. By replicating these conditions, researchers can better understand the thermal stress impact and the interplay between materials’ coefficients of thermal expansion, ultimately aiding in the optimization of semiconductor manufacturing processes [ 11 , 12 ]. Furthermore, the authors reports that the diameter of the silicon wafer is one of the key factors influencing warpage generation. While larger wafers offer numerous advantages, such as enabling mass production and reducing manufacturing costs, they are also associated with higher rates of warpage. In light of this, researchers are driven to explore effective methods for minimizing warpage in larger wafers, ensuring their reliability and continued benefits in high-scale semiconductor manufacturing [ 13 , 14 ]. In addition, the epoxy and coated layers in silicon wafers are typically composed of distinct materials, each with unique mechanical and thermal properties. These layers are strategically selected and optimized to minimize warpage formation during manufacturing and packaging processes. By tailoring the coefficients of thermal expansion (CTE) and material compatibility, engineers can reduce thermal stress and improve wafer stability. Advances in material science and computational techniques have further facilitated the development of epoxy and coatings that mitigate warpage, ensuring the reliability of semiconductor devices in high-performance applications [ 15 , 16 ]. In this context, many researchers are actively engaged in analyzing wafer warpage behavior using a variety of techniques. Among these, non-contact-based laser displacement devices have proven to deliver highly accurate measurements. Such sensitive and precise wafer measurements are essential, as they provide manufacturers with critical insights necessary for optimizing production processes and ensuring the reliability of electronic components [ 17 – 19 ]. The application of machine learning in engineering has recently gained significant attention due to its accuracy, reliability, and efficiency. In particular, experimental investigations often demand extensive data collection, multiple iterations of testing, and significant costs, making traditional methods both time-intensive and resource-heavy. Machine learning offers a promising alternative by providing effective tools for prediction and validation, eliminating the need for tedious experiments, and reducing costs substantially [ 20 – 23 ]. When applied to silicon wafer warpage analysis, machine learning-based advanced prediction tools deliver valuable benefits. These tools enable precise modeling of wafer behavior under thermal stress, allowing researchers to predict outcomes with high accuracy. By integrating experimental data into machine learning algorithms, such as decision trees or regression models, engineers can optimize parameters like temperature profiles, material properties, and wafer dimensions. This not only enhances the understanding of wafer warpage dynamics but also helps in designing wafers with minimal deformation, improving manufacturing efficiency and product reliability [ 24 – 26 ]. Moreover, machine learning facilitates rapid simulations that can analyze vast datasets, uncover hidden patterns, and support real-time decision-making in industrial settings. By leveraging machine learning, manufacturers can adopt a predictive approach, ensuring better quality control, reducing defects, and optimizing production processes. As semiconductor technologies continue to evolve, the role of machine learning will only become more critical in addressing challenges like warpage and enhancing the performance of advanced electronics packaging [ 27 , 28 ]. Based on insights from literature studies, the present work focuses on both experimental and machine learning-based numerical investigations involving three different silicon wafers: 4-inch, 6-inch, and 8-inch, with thicknesses ranging from 525 microns to 725 microns. The thermal load was applied using a reflow oven equipped with a control system to manage precise heating and cooling cycles. A non-contact laser displacement device was employed to measure wafer thickness before and after the thermal load at various points across the wafers. The wafer thickness prior to the thermal load was used as the reference point for measuring warpage. Furthermore, regression-based machine learning models were developed, trained, and tested using the experimental data to optimize and select the most suitable learning algorithm. The selected algorithm was then employed for predicting and validating the warpage behavior of silicon wafers under thermal stress, providing a robust framework for understanding and mitigating warpage in semiconductor manufacturing. The detailed overall work flow was mentioned in figure (1) Materials and Methodology All silicon oxide wafers were procured from the same supplier. The typical specifications, including thickness, diameter, and oxide layer composition, were provided by the supplier. However, to verify the supplier’s claims, one silicon oxide wafer underwent characterization using Scanning Electron Microscopy (SEM) and Energy Dispersive X-ray Spectroscopy (EDX). 3.1 Characterization of Silicon oxide wafer The SEM analysis was conducted on the wafer to measure and confirm the thickness of its layers, as illustrated in Figure (2). The results indicated that the total thickness of the wafer was 525 µm, with the top layer measuring 120 µm and the bottom layer accounting for the remaining thickness. This analysis was performed on three samples to ensure consistency in wafer size. EDX analysis was carried out on the wafer samples to determine the material composition. Three distinct spots on a sample were analyzed to assess the compound distribution. The results revealed that the bottom layer was composed of 100% silicon, while the top layer consisted of 95% silicon oxide, with the remainder being elements such as carbon, nickel, and others. The EDX results are illustrated in Figure (3). Both the SEM and EDX analyses were conducted in our microscopy lab, adhering to standard procedures to ensure accuracy and reliability. 3.2 Procedure for measuring wafer thickness The wafer warpage was analyzed by measuring thickness at various points across the silicon oxide wafer. Measurement points were marked using a permanent marker, with the center of the wafer designated as the first point. Subsequent points were marked in a clockwise direction, positioned at the middle and edge of the wafer, with an angular increment of 45 degrees. The number of measurement points varied depending on the size of the wafer. The Keyence LK-GD500 model laser displacement device was employed to measure wafer thickness accurately. The device was mounted on a rigid, surface-finished table to ensure stability and precision during measurements. The laser displacement system featured a Class II laser with a wavelength of 850 nm and a maximum output of 0.95 mW. Wafer thickness measurements were conducted at each designated point using LK Navigator software, with approximately 3000 readings recorded for each point. The average value of these measurements was calculated and used for data plotting. The laser displacement apparatus utilized in this study is shown in Figure (4). 3.3 Procedure for heating and cooling process The Madell TRY 108C model reflow oven was employed to provide controlled heating and cooling for analyzing the wafer warpage behavior. The temperature profile for the process was meticulously designed based on insights from various literature studies and industrial requirements, ensuring a balance between real-world applicability and experimental control. A Reflow Oven Control System software (version 1.0) was integrated with the reflow oven, enabling precise adjustments of heating and cooling cycles to replicate industry-standard temperature profiles. To ensure uniform temperature distribution, the wafer was carefully placed at the center of the reflow oven tray. This central placement allowed consistent thermal exposure across the wafer surface, minimizing potential variances in temperature gradients that might arise from edge effects. The temperature profile included a ramp-up phase, where the temperature was gradually increased to the peak range of 250°C to 270°C, a holding phase at the peak temperature for five to ten minutes, and a controlled cooling phase to ambient temperature. These steps were critical in replicating the thermal conditions experienced during semiconductor manufacturing and electronics packaging processes. The reflow oven featured advanced heating elements and airflow mechanisms designed to maintain uniformity in thermal conditions throughout the chamber. Data from the reflow oven's control system were logged to monitor and verify the heating and cooling curves, ensuring that the desired temperature profile was consistently achieved. The detailed setup of the reflow oven system, including its key components and placement of the wafer, is illustrated in Figure (5). 3.4 Background of Machine learning model In recent years, machine learning has gained significant attention in engineering applications due to its speedy response, high accuracy, cost-effectiveness, and time-saving capabilities. Among the machine learning models commonly applied in non-linear processes, three major categories stand out: Artificial Neural Networks (ANNs), Classifiers, and Regression models [ 29 , 30 ]. In this study, regression model-based machine learning techniques were employed due to their effectiveness in ensuring the accuracy of silicon wafer inspection. Regression models operate by training and testing experimental data through various learning algorithms, enabling them to predict and validate outcomes with precision. While a wide range of learning algorithms is available, five specific algorithms namely Polynomial Regression (PR), Support Vector Regression (SVR), K-Nearest Neighbors (KNN), Decision Tree (DT), and Random Forest (RF) were selected for this study. These algorithms were used to train and test experimental data to accurately predict and validate wafer warpage behavior, providing valuable insights for understanding and minimizing warpage in semiconductor manufacturing. The overall ML work flow was illustrated in figure (6) 3.4.1 Data collection The data employed in this study consists of experimental outputs totalling 35 data points, with 80% allocated for training and 20% reserved for testing purposes. The input parameters include the diameter and thickness of the wafer, along with the point location on the wafer, while the output parameter being analyzed is wafer warpage. The collected data parameters span a range, with wafer diameters varying from 4 inches to 8 inches, thicknesses ranging from 525 microns to 725 microns, and point locations categorized as center, middle, and edge. These point locations are represented through contour plots illustrated in Figs. 7 a and 7 b. Furthermore, Fig. 7 c provides a statistical overview of the dataset, showcasing key characteristics and highlighting notable trends. 3.4.2 Validation learning algorithm in the ML model Before implementing the learning algorithm in real-time engineering applications, it was subjected to further validation using metrics such as Pearson correlation coefficient (Cp), coefficient of determination (R²), Root Mean Square Error (RMSE), MSE, MAE. These metrics were employed across different learning models to ensure reliability, accuracy, and adaptability [ 31 , 32 ]. The selection of the most suitable model was based on rigorous validation processes that involved continuous comparisons between predictions and the experimental database. The focus was on analyzing the relationship between input and output constraints. The accuracy of the model was evaluated using the aforementioned validation metrics, which are defined as follows R² = \(\:\:1-\frac{\sum\:{\left({y}_{i}-\widehat{{y}_{i}}\right)}^{2}\:}{\sum\:{\left({y}_{i}-\stackrel{-}{y}\right)}^{2}}\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\left(1\right)\) where: \(\:{y}_{i}\) = True values \(\:\widehat{{y}_{i}}\) = Anticipated values \(\:\stackrel{-}{y}\) ​ = Mean of true values RMSE = \(\:\sqrt{\frac{1}{n}\sum\:{\left({y}_{i}-\widehat{{y}_{i}}\right)}^{2}}\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\left(2\right)\) C p = \(\:\frac{\sum\:\left({y}_{i}-\widehat{y}\right)\left(\widehat{{y}_{i}}-\stackrel{-}{\widehat{y}}\right)}{\sqrt{\sum\:{\left({y}_{i}-\widehat{y}\right)}^{2}}\sqrt{\sum\:{\left(\widehat{{y}_{i}}-\stackrel{-}{\widehat{y}}\right)}^{2}}}\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\:\left(3\right)\) where: • \(\:\stackrel{-}{y}\) = Mean of actual values • \(\:\stackrel{-}{\widehat{y}}\) = Mean of predicted values 3.4.3 K-fold cross validation Conventionally, regression models operate using a standard holdout validation method, where the experimental data is split into an 80:20 ratio for training and testing. This approach involves training the model on 80% of the data and testing its performance on the remaining 20%. The results are typically evaluated in terms of metrics such as R² (coefficient of determination) and error values. A high R² value and low error indicate a better-performing learning algorithm, which can then be selected for prediction and validation in further studies. However, this single-instance training and testing approach is not always fully reliable due to potential biases or uneven data splits [ 33 , 34 ]. To address this limitation, k-fold cross-validation has gained attention for its enhanced reliability. In this study, k-fold cross-validation with (k = 5) was employed, where the data is divided into five equal segments (or "folds"). The model is trained and tested iteratively across these folds to ensure a comprehensive evaluation of the data. For instance, in the first iteration, the first segment is used as the testing set while the remaining four segments are used for training. In the second iteration, the second segment becomes the testing set, and the remaining segments are used for training. This process continues until all five segments have been used as the testing set exactly once [ 35 , 36 ]. The k-fold cross-validation approach ensures 100% utilization of the data, reducing the risk of overfitting or bias from a single data split. It provides a more robust and reliable framework for predicting and validating the warpage behavior of silicon wafers. The working principle of k-fold cross-validation ((k = 5)) is illustrated in Figure (8), demonstrating how the iterations contribute to achieving consistent and accurate results for modeling and analyzing silicon wafer warpage. Typically, K-fold cross-validation is a crucial technique for evaluating the performance of machine learning models. Each of the five iterations produces an individual R² value. After completing all iterations, five R² values are obtained, and their average is calculated to represent the model's overall performance. This averaged R² value indicates the most reliable and robust assessment of the learning model. Notably, K-fold cross-validation provides significant advantages, particularly for tasks with small or limited datasets Results and Interpretations 4.1 Report on Experimental warpage measurement Figure (9) depicts the thickness variations observed at different locations on a 4-inch silicon oxide-coated semiconductor wafer, comparing its state prior to and following the heating process. The deformation ranged from a minimum of 0.01 mm to a maximum of 0.03 mm. The deformation pattern resembled a smile shape, attributed to the uneven thermal expansion and contraction occurring across the wafer's surface during heating and cooling cycles. The non-uniform warpage pattern was significantly influenced by the thermal stress distribution, which was shaped by the oven's temperature profile. The maximum deformation was observed at the wafer's edge, where thermal stress variations were more pronounced due to higher temperature gradients and mechanical constraints compared to the center. This smile-shaped deformation arose from differential thermal gradients, with the center experiencing less deformation due to a more uniform temperature distribution, while the edges underwent greater displacement and curvature due to larger thermal stress variations. Figure (10) illustrates the thickness variations at different points on a 6-inch silicon oxide-coated semiconductor wafer, comparing its state before and after heating. It confirms that the deformation ranged from 0.01 mm to 0.05 mm, with a smile-shaped pattern similar to that of the 4-inch wafer. However, the 6-inch wafer exhibited a higher maximum deformation, exceeding the 4-inch wafer by 0.02 mm. This increase can be attributed to the larger surface area of the 6-inch wafer, which amplifies thermal gradients and stress. The edges of the larger wafer experienced more significant temperature differentials due to the extended exposure area during the heating and cooling cycles. Figure (11) presents the thickness variations measured at different points on an 8-inch silicon oxide-coated semiconductor wafer, comparing its state before and after heating. It indicates that the deformation ranged from 0.01 mm to 0.07 mm, maintaining the smile-shaped pattern observed in the smaller wafers. Compared to the 4-inch and 6-inch wafers, the 8-inch wafer exhibited a substantially higher maximum deformation, with increases of 0.04 mm and 0.02 mm, respectively. This progressive rise in deformation with increasing wafer size is attributed to the larger surface area, which intensifies thermal stress variations and mechanical constraints during the heating and cooling cycles. Based on deformation measurements, center-to-edge warpage was calculated as the difference between center deformation and edge deformation. The average deformations of center, middle and edge of wafers are compared in figure (12). 4.2 Report on ML warpage validation In this study, five different machine learning (ML) algorithms—Polynomial Regression (PR), Support Vector Regression (SVR), K-Nearest Neighbors (KNN), Decision Trees (DT), and Random Forest (RF)—were utilized to predict wafer deformation across various wafer sizes. The model was trained using experimental data, which included key parameters such as wafer diameter, wafer thickness, and point location on the wafer. These factors play a crucial role in understanding deformation behavior across different wafer configurations. Figure 13 (a-e) illustrates the predictive capability of each algorithm by visually presenting the correlation between predicted and experimentally observed deformation values. This comparison is expressed through fit lines, test set points, and train set points, providing insight into the accuracy of each learning algorithm. The results indicate that the DT and RF models produced predictions that were highly consistent with experimental findings. Among the five learning models DTs and RF showed exceptional alignment, as observed through minimal deviation between red and green points from the fit line. This strong agreement underscores the robustness of predictive capabilities in capturing deformation trends across wafer sizes. Additionally, the ML model evaluates predictive accuracy using R² values and error metrics, both of which are essential for assessing the reliability of learning algorithms. Typically, a high R² value and low error margin signify a well-performing predictive model [ 37 , 38 ]. Figures (14) presents the R² and error values for all five learning models, confirming that DT and RF exhibit the highest R² values and lowest error rates. These results validate DT and RF as the most effective models for predicting and analyzing wafer deformation across various sizes and thicknesses. 4.2.1 Report on K-Fold validation K-fold cross-validation is one of the most robust techniques for estimating the performance of machine learning models by analyzing bias and variance. The bias-variance trade-off is illustrated in Figure (15), which categorizes models into four types: the best model, an overly simple model, a model that is both too simple and too sensitive, and an overly sensitive model. These characteristics are primarily determined by bias and variance, measured using R² values [ 39 , 40 ]. High bias and low variance indicate an overly simple model, where all target points are far from the yellow spot, signifying high bias. However, since the target points are close to each other, this suggests low variance. As a result, the model deviates from the actual target, leading to inaccurate predictions. In contrast, high bias and high variance represent a model that is both too simple and too sensitive, with target points far from the yellow spot (high bias) and widely dispersed (high variance). This model fails to capture the underlying prediction pattern and reacts strongly to noise in the data. Low bias and high variance indicate an overly sensitive model, where target points are close to the yellow spot (low bias) but spread far apart (high variance). Although this model captures the overall prediction trend, its sensitivity to noisy data leads to inconsistent predictions. Conversely, the best-performing model exhibits low bias and low variance, where all target points lie within the yellow spot and remain close to each other. This optimal balance allows the model to accurately capture patterns, ensuring reliable predictions across different data segments [ 41 , 42 ]. The average R² values for the five learning models are presented in Table (1), revealing that among them, the Random Forest (RF) model exhibits the highest mean R² value, indicating low bias and low variance. Across all five iterations, the RF model consistently achieves values close to the ideal value of 1, demonstrating strong agreement in predicting silicon wafer deformation. Table 1 K-fold cross validation results on R 2 values for all ML models ML Model R 2 value of Iterations from 1 to 5 Average R 2 1st 2nd 3rd 4th 5th PR 0.89 0.50 0.83 0.76 0.98 0.79 SVR 0.76 0.79 0.68 0.79 0.54 0.71 KNN 0.93 0.72 0.46 0.51 0.17 0.56 DTs 0.84 0.98 0.69 0.72 0.55 0.76 RF 0.91 0.52 0.87 0.76 0.98 0.81 4.2.2 Optimised learning Model interpretation on SHAP factor Based on the machine learning regression model’s R², error values, and K-fold bias-variance trade-off, the Random Forest (RF) model was selected as the optimized model (best model) for predicting and validating silicon wafer deformation. Additionally, the results of the chosen best model were interpreted using SHAP analysis to identify the significant input parameters influencing the predictions. The figure illustrates the relationship between SHAP values and feature values for the RF model. SHAP visualizations often resemble a tree-like structure, where the wider sections represent factors with a substantial impact on the output response. Feature values are used to estimate whether an input has a positive or negative influence on the output prediction, indicated by color gradients. For example, a blue-to-red gradient (low to high values) signifies a positive impact, whereas a red-to-blue gradient (high to low values) indicates a negative impact [ 43 – 45 ]. From the figure (16), the edge points of the wafer exhibit wider sections, indicating a major influence on output prediction. Additionally, the feature value for the edge points transitions from blue to red, suggesting a positive impact on the output predictions. This means that as the distance from the center to the edge increases, wafer deformation also increases. 4.2.3 Optimised learning Model interpretation on Heatmap The heatmap interpretation is based on linear correlation, meaning it examines the relationship between input constraints (such as wafer diameter, points on the wafer, and wafer thickness) and output constraints (wafer deformation). The Pearson correlation heatmap categorizes relationships into three types: positive correlation, negative correlation, and no correlation, with correlation coefficients ranging from − 1 to + 1. A positive correlation, indicated by values near + 1, suggests that an increase in input constraints leads to a corresponding increase in output constraints. Conversely, a negative correlation, with values approaching − 1, implies that as input constraints rise, output constraints decrease. When there is no correlation, it signifies the absence of a linear relationship between the input and output constraints [ 46 , 47 ]. From Figure (17), it was confirmed that the edge points on the wafer exhibit a strong positive correlation with wafer deformation, as indicated by a correlation coefficient of 0.90. This suggests that an increase in the distance from the center to the edge leads to a corresponding increase in wafer deformation. 4.5 ML Prediction for 12-inch wafer The warpage of a 12-inch wafer was predicted using the optimized Random Forest (RF) learning model, which demonstrated the best performance. The results, illustrated in Figure (18), depict the deformation at both the center and edge of the wafer, with warpage determined by the difference between these values. The center deformation was 0.0099, while the edge deformation was 0.0533, resulting in a total warpage of 0.04437 for the 12-inch wafer. A detailed comparison is presented in Table (2), which contrasts the experimental warpage with the machine learning-predicted warpage across different wafer sizes. Additionally, the error percentage of the machine learning predictions is provided for 4-inch, 6-inch, 8-inch, and 12-inch wafers. From the predictions, it was confirmed that the deformation pattern observed in the 12-inch wafer aligns with the trends seen in smaller wafers (4-inch, 6-inch, and 8-inch). Specifically, deformation increases with wafer size, reinforcing the scalability of the machine learning model. The prediction error percentage remains within 5–10%, further validating the reliability of the ML approach. These findings provide valuable insights into the application of machine learning for wafer warpage prediction, offering significant advantages such as reducing or eliminating experimental costs, saving time in wafer characterization, and improving efficiency in semiconductor manufacturing. By leveraging machine learning, manufacturers can optimize wafer design and fabrication processes while minimizing resource-intensive experimental procedures. Future work could focus on refining the model further to reduce prediction errors and enhance its applicability across diverse wafer materials and processing conditions. Table 2 the comparison and error % of Experimental and Machine learning output SI. No Wafer diameter (inch) Experimental warpage Machine Learning warpage Error % 1 4 0.03 0.0272 9.33 2 6 0.035 0.03672 4.91 3 8 0.041 0.03851 6.07 4 12 - 0.04437 - 4.6 ML Prediction Vs Ansys simulation Wafer warpage simulation is typically performed using the ANSYS tool, which provides valuable insights for semiconductor silicon wafer manufacturers through its predictive outputs. However, ANSYS has some significant limitations, such as requiring high-performance computing (HPC) resources and an original software license, which can be costly and restrictive. Additionally, various factors must be carefully considered for accurate predictions, including material selection, finite element meshing, and loading conditions. Material selection is particularly challenging due to the complex compositions of thin films on wafers, and handling ANSYS simulation files can be cumbersome, adding to the practical difficulties of the process [ 48 , 49 ]. To overcome these challenges, machine learning (ML) prediction was chosen as an alternative approach. Unlike traditional simulations, ML-based predictions rely purely on experimental data and can be executed efficiently on cloud platforms. In this study, Google Colab was used for ML-based predictions, offering a cost-effective and accessible solution without the need for specialized hardware. Additionally, ML-based predictions demonstrated a lower error percentage compared to ANSYS simulations, as illustrated in Table (3). The error percentage of ANSYS simulations ranged between 10–20%, whereas ML predictions exhibited a lower error percentage of 5–10%. Table 3 the comparison and error % of Experimental, Simulation and Machine learning output SI.No Wafer diameter (inch) Experimental warpage Simulation warpage Machine Learning warpage Error% (Simulation) Error% (Machine Learning) 1 4 0.03 0.027 0.0272 10.00 9.33 2 6 0.035 0.043 0.03672 22.86 4.91 3 8 0.041 0.049 0.03851 19.51 6.07 4 12 NA 0.086 0.04437 NA NA Despite this difference in accuracy, both predictive tools confirmed the same warpage pattern trend, indicating that as wafer size increases, warpage also increases. The figure (19) clearly illustrates the comparison between ML predictions, ANSYS simulations, and experimental results, effectively demonstrating this trend. While ANSYS simulations follow a similar pattern, they deviate more significantly from experimental results at larger wafer sizes. In contrast, ML predictions closely align with experimental data, demonstrating higher accuracy with a lower error percentage. These findings highlight the superior predictive capability of machine learning, reinforcing its potential as a cost-effective and reliable alternative for wafer warpage analysis. By reducing computational complexity while maintaining precision, ML-based predictions offer a practical solution for semiconductor manufacturers, enabling efficient wafer design optimization while minimizing resource-intensive experimental procedures. Conclusion The experimental and predictive analyses of wafer warpage across different sizes have provided valuable insights into deformation behavior and the effectiveness of machine learning (ML) models compared to traditional simulation methods. Experimental measurements confirmed that warpage increases with wafer size, with the smile-shaped deformation pattern observed consistently across 4-inch, 6-inch, 8-inch, and 12-inch wafers. The center-to-edge warpage calculations further validated the impact of thermal stress distribution on wafer deformation. The experimentally measured warpage values were 0.03 mm for the 4-inch wafer, 0.035 mm for the 6-inch wafer, and 0.041 mm for the 8-inch wafer, demonstrating a progressive increase in deformation with wafer size. Machine learning predictions, particularly those generated using Decision Trees (DT) and Random Forest (RF) models, demonstrated high accuracy in capturing wafer warpage trends. The ML-based approach exhibited a lower error percentage (5–10%) compared to ANSYS simulations (10–20%), reinforcing its reliability as an alternative predictive tool. Additionally, ML models offer cost-effective and scalable solutions, eliminating the need for high-performance computing (HPC) resources and software licensing constraints associated with ANSYS simulations. The R² values for the ML models further validated their predictive accuracy, with Random Forest achieving an R² value of 0.95, indicating strong agreement between predicted and experimental warpage values. The comparative analysis between ML predictions and ANSYS simulations confirmed that both methods follow the same warpage trend, where deformation increases with wafer size. However, ML predictions showed closer alignment with experimental results, demonstrating higher precision and reduced computational complexity. By leveraging cloud-based ML models, semiconductor manufacturers can optimize wafer design and fabrication processes, significantly reducing experimental costs and time while maintaining predictive accuracy. Declarations Declaration of generative AI During the preparation of this work, the author(s) utilized Copilot to enhance language and readability. After employing this tool/service, the author(s) thoroughly reviewed and edited the content as necessary and assume full responsibility for the final publication. Data Availability Statement The datasets generated during and/or analysed during the current study are available from the corresponding author on reasonable request. Author Contributions Statements Krishnamoorthy Ramalingam, Mohd Zulkifly Abdullah, developed the idea and conducted the experiments and wrote the manuscript, Mohamad Aizat Abas, Kok Hwa Yu, Roslan Kamarudin, Muhammad Raz Abdul Rahman, Shaw Fong Wong, Pooi Kit Lam, Bok Eng Cheah, edited, validated, supervised and reviewed the manuscript. Declaration of competing interest The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper. Funding Information Intel Advanced Packaging Research Grant Scheme (Grant number: R504-LR-GAL007-0000000609-I169) Acknowledgment The authors wish to express their gratitude to the School of Mechanical Engineering, Universiti Sains Malaysia (USM) for providing the necessary facilities and support for this research. Special thanks to Intel (M) Sdn. Bhd. for their generous funding under the Intel Advanced Packaging Research Grant Scheme (Grant number: R504-LR-GAL007-0000000609-I169), which has significantly contributed to the success of this study. The financial assistance and collaborative insights provided by Intel (M) Sdn. Bhd. have been instrumental in advancing the research on semiconductor warpage and packaging technologies. References Puttegowda, M. and Nagaraju, S.B., 2025. Artificial intelligence and machine learning in mechanical engineering: Current trends and future prospects. Engineering Applications of Artificial Intelligence , 142 , p.109910. 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Finite element modeling and analysis method for predicting and optimizing the warpage of construction before flip chip bonding in System-on-Wafer process flow. Microelectronics Reliability . https://doi.org/10.1016/j.microrel.2023.115260. Cite Share Download PDF Status: Published Journal Publication published 20 Dec, 2025 Read the published version in The International Journal of Advanced Manufacturing Technology → Version 1 posted Editorial decision: Major Revisions Needed 23 Oct, 2025 Reviewers agreed at journal 10 Jun, 2025 Reviewers invited by journal 03 Jun, 2025 Editor assigned by journal 28 May, 2025 First submitted to journal 26 May, 2025 You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. 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Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-6728862","acceptedTermsAndConditions":true,"allowDirectSubmit":false,"archivedVersions":[],"articleType":"Research Article","associatedPublications":[],"authors":[{"id":466055400,"identity":"a42f3c7f-1e48-4e24-bc6d-8b9e6b92170d","order_by":0,"name":"krishnamoorthy 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13","display":"","copyAsset":false,"role":"figure","size":143262,"visible":true,"origin":"","legend":"\u003cp\u003eExperimental deformation verus Prediction deformation for ML models a) PR, b) SVR, c) KNN d) DTs e) RF\u003c/p\u003e","description":"","filename":"image13.png","url":"https://assets-eu.researchsquare.com/files/rs-6728862/v1/0dd8e6999fa80c43631533f4.png"},{"id":84079277,"identity":"e7088518-9401-406b-a60c-edc8fcdabcdf","added_by":"auto","created_at":"2025-06-06 13:50:50","extension":"png","order_by":14,"title":"Figure 14","display":"","copyAsset":false,"role":"figure","size":238665,"visible":true,"origin":"","legend":"\u003cp\u003eThe validation Metrix for all ML models a) R2, b) RMSE, c) MSE and d) MAE\u003c/p\u003e","description":"","filename":"image14.png","url":"https://assets-eu.researchsquare.com/files/rs-6728862/v1/d19a4edb01cf757d36b044e1.png"},{"id":84079302,"identity":"6fd00da3-064c-4339-9c77-f70d74830ec2","added_by":"auto","created_at":"2025-06-06 13:50:51","extension":"png","order_by":15,"title":"Figure 15","display":"","copyAsset":false,"role":"figure","size":200205,"visible":true,"origin":"","legend":"\u003cp\u003eThe Bias-Variance trade-off chart\u003c/p\u003e","description":"","filename":"image15.png","url":"https://assets-eu.researchsquare.com/files/rs-6728862/v1/bcc40463b66fabeed81fa4eb.png"},{"id":84079283,"identity":"bfd01eaa-da23-442b-8af1-8abfc070f8a8","added_by":"auto","created_at":"2025-06-06 13:50:50","extension":"png","order_by":16,"title":"Figure 16","display":"","copyAsset":false,"role":"figure","size":22528,"visible":true,"origin":"","legend":"\u003cp\u003eThe SHAP value for RF model interpretation\u003c/p\u003e","description":"","filename":"image16.png","url":"https://assets-eu.researchsquare.com/files/rs-6728862/v1/5dbab9aca89b983b5b526214.png"},{"id":84080237,"identity":"a81f5b13-f5a9-4a22-ac64-34134d18821e","added_by":"auto","created_at":"2025-06-06 13:58:51","extension":"png","order_by":17,"title":"Figure 17","display":"","copyAsset":false,"role":"figure","size":43159,"visible":true,"origin":"","legend":"\u003cp\u003eThe Heatmap for linear data interpretation\u003c/p\u003e","description":"","filename":"image17.png","url":"https://assets-eu.researchsquare.com/files/rs-6728862/v1/9145d8acfc65b04046c4b7fc.png"},{"id":84079333,"identity":"d40511db-74ce-4370-b43b-26378a46179c","added_by":"auto","created_at":"2025-06-06 13:50:51","extension":"png","order_by":18,"title":"Figure 18","display":"","copyAsset":false,"role":"figure","size":1053144,"visible":true,"origin":"","legend":"\u003cp\u003ethe ML output of deformation prediction for 12-inch wafer a) center b) edge\u003c/p\u003e","description":"","filename":"image18.png","url":"https://assets-eu.researchsquare.com/files/rs-6728862/v1/83d36321d51fa7c48f7ce5b9.png"},{"id":84080228,"identity":"85dd83ce-ba24-4a72-942d-cad826538b0c","added_by":"auto","created_at":"2025-06-06 13:58:50","extension":"jpg","order_by":19,"title":"Figure 19","display":"","copyAsset":false,"role":"figure","size":85793,"visible":true,"origin":"","legend":"\u003cp\u003eThe warpage comparison on Experimental, Simulation and Machine learning among the wafers\u003c/p\u003e","description":"","filename":"image19.jpg","url":"https://assets-eu.researchsquare.com/files/rs-6728862/v1/a897463616f2a4a9bed477c3.jpg"},{"id":98814122,"identity":"74785f52-9b27-4813-aa37-30193703e58e","added_by":"auto","created_at":"2025-12-22 16:11:24","extension":"pdf","order_by":0,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":8411516,"visible":true,"origin":"","legend":"","description":"","filename":"manuscript.pdf","url":"https://assets-eu.researchsquare.com/files/rs-6728862/v1/66953bf7-6267-48f4-8a1a-324fbf4607a1.pdf"}],"financialInterests":"","formattedTitle":"Semiconductor Wafer Warpage in Electronics Packaging: A Hybrid Investigation with ML and Experimental Insights","fulltext":[{"header":"Introduction","content":"\u003cp\u003eIn recent times, the world has entered a competitive race in the domain of Artificial Intelligence (AI). As nations strive to establish dominance in AI implementation, it has become imperative to focus on leveraging advanced technologies to harness the full potential of AI. High-Performance Computing (HPC) and advanced electronics are at the forefront of this revolution, playing a pivotal role in meeting the vast computational demands of AI systems and ensuring seamless integration across industries [\u003cspan citationid=\"CR1\" class=\"CitationRef\"\u003e1\u003c/span\u003e, \u003cspan citationid=\"CR2\" class=\"CitationRef\"\u003e2\u003c/span\u003e]. At this critical juncture, silicon wafers contribute significantly as the foundation of advanced electronics packaging. They enable the fabrication of microchips, processors, and memory units essential for driving AI technologies. The precise engineering of silicon wafers directly impacts the reliability, speed, and efficiency of AI systems, influencing applications in real-time data processing, machine learning algorithms, and beyond. Their role extends beyond manufacturing, affecting the scalability and sustainability of AI-driven innovations in sectors such as healthcare, autonomous systems, and energy management [\u003cspan additionalcitationids=\"CR4 CR5\" citationid=\"CR3\" class=\"CitationRef\"\u003e3\u003c/span\u003e\u0026ndash;\u003cspan citationid=\"CR6\" class=\"CitationRef\"\u003e6\u003c/span\u003e].\u003c/p\u003e \u003cp\u003eSilicon wafers must exhibit rigidity with minimal defects, such as cracks, to ensure the optimal performance of electronic devices. Typically, these wafers are composed of multiple layers, including a bottom layer, epoxy, top layer, and chips. However, the varying coefficients of thermal expansion (CTE) of these materials pose significant challenges, as they are the primary cause of warpage during manufacturing and packaging processes [\u003cspan citationid=\"CR7\" class=\"CitationRef\"\u003e7\u003c/span\u003e, \u003cspan citationid=\"CR8\" class=\"CitationRef\"\u003e8\u003c/span\u003e]. Conducting warpage analysis is critical to inspect wafers and understand their behavior under thermal loads. During the manufacturing and packaging of electronics, silicon wafers are exposed to thermal loads within a peak range of 250\u0026deg;C to 270\u0026deg;C. The applied thermal load, combined with differences in CTE among the layers, significantly influences warpage generation. Moreover, the temperature profile\u0026mdash;including ramping, peak, and holding temperatures\u0026mdash;plays a crucial role in determining warpage dynamics, emphasizing the need for effective thermal profiling and detailed wafer inspection [\u003cspan citationid=\"CR9\" class=\"CitationRef\"\u003e9\u003c/span\u003e, \u003cspan citationid=\"CR10\" class=\"CitationRef\"\u003e10\u003c/span\u003e].\u003c/p\u003e \u003cp\u003eThe studies revealed that ramping the temperature up to 260\u0026deg;C, maintaining the peak temperature for five to ten minutes, and then gradually lowering it to atmospheric levels provides critical insights into wafer behavior. This temperature profile closely mirrors industrial applications, making it highly relevant for analyzing warpage dynamics in silicon wafers. By replicating these conditions, researchers can better understand the thermal stress impact and the interplay between materials\u0026rsquo; coefficients of thermal expansion, ultimately aiding in the optimization of semiconductor manufacturing processes [\u003cspan citationid=\"CR11\" class=\"CitationRef\"\u003e11\u003c/span\u003e, \u003cspan citationid=\"CR12\" class=\"CitationRef\"\u003e12\u003c/span\u003e]. Furthermore, the authors reports that the diameter of the silicon wafer is one of the key factors influencing warpage generation. While larger wafers offer numerous advantages, such as enabling mass production and reducing manufacturing costs, they are also associated with higher rates of warpage. In light of this, researchers are driven to explore effective methods for minimizing warpage in larger wafers, ensuring their reliability and continued benefits in high-scale semiconductor manufacturing [\u003cspan citationid=\"CR13\" class=\"CitationRef\"\u003e13\u003c/span\u003e, \u003cspan citationid=\"CR14\" class=\"CitationRef\"\u003e14\u003c/span\u003e].\u003c/p\u003e \u003cp\u003eIn addition, the epoxy and coated layers in silicon wafers are typically composed of distinct materials, each with unique mechanical and thermal properties. These layers are strategically selected and optimized to minimize warpage formation during manufacturing and packaging processes. By tailoring the coefficients of thermal expansion (CTE) and material compatibility, engineers can reduce thermal stress and improve wafer stability. Advances in material science and computational techniques have further facilitated the development of epoxy and coatings that mitigate warpage, ensuring the reliability of semiconductor devices in high-performance applications [\u003cspan citationid=\"CR15\" class=\"CitationRef\"\u003e15\u003c/span\u003e, \u003cspan citationid=\"CR16\" class=\"CitationRef\"\u003e16\u003c/span\u003e]. In this context, many researchers are actively engaged in analyzing wafer warpage behavior using a variety of techniques. Among these, non-contact-based laser displacement devices have proven to deliver highly accurate measurements. Such sensitive and precise wafer measurements are essential, as they provide manufacturers with critical insights necessary for optimizing production processes and ensuring the reliability of electronic components [\u003cspan additionalcitationids=\"CR18\" citationid=\"CR17\" class=\"CitationRef\"\u003e17\u003c/span\u003e\u0026ndash;\u003cspan citationid=\"CR19\" class=\"CitationRef\"\u003e19\u003c/span\u003e].\u003c/p\u003e \u003cp\u003eThe application of machine learning in engineering has recently gained significant attention due to its accuracy, reliability, and efficiency. In particular, experimental investigations often demand extensive data collection, multiple iterations of testing, and significant costs, making traditional methods both time-intensive and resource-heavy. Machine learning offers a promising alternative by providing effective tools for prediction and validation, eliminating the need for tedious experiments, and reducing costs substantially [\u003cspan additionalcitationids=\"CR21 CR22\" citationid=\"CR20\" class=\"CitationRef\"\u003e20\u003c/span\u003e\u0026ndash;\u003cspan citationid=\"CR23\" class=\"CitationRef\"\u003e23\u003c/span\u003e]. When applied to silicon wafer warpage analysis, machine learning-based advanced prediction tools deliver valuable benefits. These tools enable precise modeling of wafer behavior under thermal stress, allowing researchers to predict outcomes with high accuracy. By integrating experimental data into machine learning algorithms, such as decision trees or regression models, engineers can optimize parameters like temperature profiles, material properties, and wafer dimensions. This not only enhances the understanding of wafer warpage dynamics but also helps in designing wafers with minimal deformation, improving manufacturing efficiency and product reliability [\u003cspan additionalcitationids=\"CR25\" citationid=\"CR24\" class=\"CitationRef\"\u003e24\u003c/span\u003e\u0026ndash;\u003cspan citationid=\"CR26\" class=\"CitationRef\"\u003e26\u003c/span\u003e]. Moreover, machine learning facilitates rapid simulations that can analyze vast datasets, uncover hidden patterns, and support real-time decision-making in industrial settings. By leveraging machine learning, manufacturers can adopt a predictive approach, ensuring better quality control, reducing defects, and optimizing production processes. As semiconductor technologies continue to evolve, the role of machine learning will only become more critical in addressing challenges like warpage and enhancing the performance of advanced electronics packaging [\u003cspan citationid=\"CR27\" class=\"CitationRef\"\u003e27\u003c/span\u003e, \u003cspan citationid=\"CR28\" class=\"CitationRef\"\u003e28\u003c/span\u003e].\u003c/p\u003e \u003cp\u003eBased on insights from literature studies, the present work focuses on both experimental and machine learning-based numerical investigations involving three different silicon wafers: 4-inch, 6-inch, and 8-inch, with thicknesses ranging from 525 microns to 725 microns. The thermal load was applied using a reflow oven equipped with a control system to manage precise heating and cooling cycles. A non-contact laser displacement device was employed to measure wafer thickness before and after the thermal load at various points across the wafers. The wafer thickness prior to the thermal load was used as the reference point for measuring warpage. Furthermore, regression-based machine learning models were developed, trained, and tested using the experimental data to optimize and select the most suitable learning algorithm. The selected algorithm was then employed for predicting and validating the warpage behavior of silicon wafers under thermal stress, providing a robust framework for understanding and mitigating warpage in semiconductor manufacturing. The detailed overall work flow was mentioned in figure (1)\u003c/p\u003e \u003cp\u003e \u003c/p\u003e"},{"header":"Materials and Methodology","content":"\u003cp\u003eAll silicon oxide wafers were procured from the same supplier. The typical specifications, including thickness, diameter, and oxide layer composition, were provided by the supplier. However, to verify the supplier\u0026rsquo;s claims, one silicon oxide wafer underwent characterization using Scanning Electron Microscopy (SEM) and Energy Dispersive X-ray Spectroscopy (EDX).\u003c/p\u003e \u003cdiv id=\"Sec3\" class=\"Section2\"\u003e \u003ch2\u003e3.1 Characterization of Silicon oxide wafer\u003c/h2\u003e \u003cp\u003eThe SEM analysis was conducted on the wafer to measure and confirm the thickness of its layers, as illustrated in Figure (2). The results indicated that the total thickness of the wafer was 525 \u0026micro;m, with the top layer measuring 120 \u0026micro;m and the bottom layer accounting for the remaining thickness. This analysis was performed on three samples to ensure consistency in wafer size. EDX analysis was carried out on the wafer samples to determine the material composition. Three distinct spots on a sample were analyzed to assess the compound distribution. The results revealed that the bottom layer was composed of 100% silicon, while the top layer consisted of 95% silicon oxide, with the remainder being elements such as carbon, nickel, and others. The EDX results are illustrated in Figure (3). Both the SEM and EDX analyses were conducted in our microscopy lab, adhering to standard procedures to ensure accuracy and reliability.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec4\" class=\"Section2\"\u003e \u003ch2\u003e3.2 Procedure for measuring wafer thickness\u003c/h2\u003e \u003cp\u003eThe wafer warpage was analyzed by measuring thickness at various points across the silicon oxide wafer. Measurement points were marked using a permanent marker, with the center of the wafer designated as the first point. Subsequent points were marked in a clockwise direction, positioned at the middle and edge of the wafer, with an angular increment of 45 degrees. The number of measurement points varied depending on the size of the wafer. The Keyence LK-GD500 model laser displacement device was employed to measure wafer thickness accurately. The device was mounted on a rigid, surface-finished table to ensure stability and precision during measurements. The laser displacement system featured a Class II laser with a wavelength of 850 nm and a maximum output of 0.95 mW. Wafer thickness measurements were conducted at each designated point using LK Navigator software, with approximately 3000 readings recorded for each point. The average value of these measurements was calculated and used for data plotting. The laser displacement apparatus utilized in this study is shown in Figure (4).\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec5\" class=\"Section2\"\u003e \u003ch2\u003e3.3 Procedure for heating and cooling process\u003c/h2\u003e \u003cp\u003eThe Madell TRY 108C model reflow oven was employed to provide controlled heating and cooling for analyzing the wafer warpage behavior. The temperature profile for the process was meticulously designed based on insights from various literature studies and industrial requirements, ensuring a balance between real-world applicability and experimental control. A Reflow Oven Control System software (version 1.0) was integrated with the reflow oven, enabling precise adjustments of heating and cooling cycles to replicate industry-standard temperature profiles. To ensure uniform temperature distribution, the wafer was carefully placed at the center of the reflow oven tray. This central placement allowed consistent thermal exposure across the wafer surface, minimizing potential variances in temperature gradients that might arise from edge effects. The temperature profile included a ramp-up phase, where the temperature was gradually increased to the peak range of 250\u0026deg;C to 270\u0026deg;C, a holding phase at the peak temperature for five to ten minutes, and a controlled cooling phase to ambient temperature. These steps were critical in replicating the thermal conditions experienced during semiconductor manufacturing and electronics packaging processes. The reflow oven featured advanced heating elements and airflow mechanisms designed to maintain uniformity in thermal conditions throughout the chamber. Data from the reflow oven's control system were logged to monitor and verify the heating and cooling curves, ensuring that the desired temperature profile was consistently achieved. The detailed setup of the reflow oven system, including its key components and placement of the wafer, is illustrated in Figure (5).\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec6\" class=\"Section2\"\u003e \u003ch2\u003e3.4 Background of Machine learning model\u003c/h2\u003e \u003cp\u003eIn recent years, machine learning has gained significant attention in engineering applications due to its speedy response, high accuracy, cost-effectiveness, and time-saving capabilities. Among the machine learning models commonly applied in non-linear processes, three major categories stand out: Artificial Neural Networks (ANNs), Classifiers, and Regression models [\u003cspan citationid=\"CR29\" class=\"CitationRef\"\u003e29\u003c/span\u003e, \u003cspan citationid=\"CR30\" class=\"CitationRef\"\u003e30\u003c/span\u003e]. In this study, regression model-based machine learning techniques were employed due to their effectiveness in ensuring the accuracy of silicon wafer inspection.\u003c/p\u003e \u003cp\u003eRegression models operate by training and testing experimental data through various learning algorithms, enabling them to predict and validate outcomes with precision. While a wide range of learning algorithms is available, five specific algorithms namely Polynomial Regression (PR), Support Vector Regression (SVR), K-Nearest Neighbors (KNN), Decision Tree (DT), and Random Forest (RF) were selected for this study. These algorithms were used to train and test experimental data to accurately predict and validate wafer warpage behavior, providing valuable insights for understanding and minimizing warpage in semiconductor manufacturing. The overall ML work flow was illustrated in figure (6)\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cdiv id=\"Sec7\" class=\"Section3\"\u003e \u003ch2\u003e3.4.1 Data collection\u003c/h2\u003e \u003cp\u003eThe data employed in this study consists of experimental outputs totalling 35 data points, with 80% allocated for training and 20% reserved for testing purposes. The input parameters include the diameter and thickness of the wafer, along with the point location on the wafer, while the output parameter being analyzed is wafer warpage. The collected data parameters span a range, with wafer diameters varying from 4 inches to 8 inches, thicknesses ranging from 525 microns to 725 microns, and point locations categorized as center, middle, and edge. These point locations are represented through contour plots illustrated in Figs.\u0026nbsp;\u003cspan refid=\"Fig7\" class=\"InternalRef\"\u003e7\u003c/span\u003ea and \u003cspan refid=\"Fig7\" class=\"InternalRef\"\u003e7\u003c/span\u003eb. Furthermore, Fig.\u0026nbsp;\u003cspan refid=\"Fig7\" class=\"InternalRef\"\u003e7\u003c/span\u003ec provides a statistical overview of the dataset, showcasing key characteristics and highlighting notable trends.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec8\" class=\"Section3\"\u003e \u003ch2\u003e3.4.2 Validation learning algorithm in the ML model\u003c/h2\u003e \u003cp\u003eBefore implementing the learning algorithm in real-time engineering applications, it was subjected to further validation using metrics such as Pearson correlation coefficient (Cp), coefficient of determination (R\u0026sup2;), Root Mean Square Error (RMSE), MSE, MAE. These metrics were employed across different learning models to ensure reliability, accuracy, and adaptability [\u003cspan citationid=\"CR31\" class=\"CitationRef\"\u003e31\u003c/span\u003e, \u003cspan citationid=\"CR32\" class=\"CitationRef\"\u003e32\u003c/span\u003e]. The selection of the most suitable model was based on rigorous validation processes that involved continuous comparisons between predictions and the experimental database. The focus was on analyzing the relationship between input and output constraints. The accuracy of the model was evaluated using the aforementioned validation metrics, which are defined as follows\u003c/p\u003e \u003cp\u003e \u003cdiv class=\"gridtable\"\u003e\u003ctable float=\"No\" id=\"Taba\" border=\"1\"\u003e \u003ccolgroup cols=\"2\"\u003e \u003cdiv align=\"left\" class=\"colspec\" colname=\"c1\" colnum=\"1\"\u003e\u003c/div\u003e \u003cdiv align=\"left\" class=\"colspec\" colname=\"c2\" colnum=\"2\"\u003e\u003c/div\u003e \u003cthead\u003e \u003ctr\u003e \u003cth align=\"left\" colname=\"c1\"\u003e\u0026nbsp;\u003c/th\u003e \u003cth align=\"left\" colname=\"c2\"\u003e \u003cp\u003eR\u0026sup2; =\u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\:\\:1-\\frac{\\sum\\:{\\left({y}_{i}-\\widehat{{y}_{i}}\\right)}^{2}\\:}{\\sum\\:{\\left({y}_{i}-\\stackrel{-}{y}\\right)}^{2}}\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\left(1\\right)\\)\u003c/span\u003e\u003c/span\u003e\u003c/p\u003e \u003c/th\u003e \u003c/tr\u003e \u003c/thead\u003e \u003ctbody\u003e \u003ctr\u003e \u003ctd align=\"left\" colspan=\"2\" nameend=\"c2\" namest=\"c1\"\u003e \u003cp\u003ewhere:\u003c/p\u003e \u003cp\u003e\u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\:{y}_{i}\\)\u003c/span\u003e\u003c/span\u003e= True values\u003c/p\u003e \u003cp\u003e\u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\:\\widehat{{y}_{i}}\\)\u003c/span\u003e\u003c/span\u003e= Anticipated values\u003c/p\u003e \u003cp\u003e\u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\:\\stackrel{-}{y}\\)\u003c/span\u003e\u003c/span\u003e​ = Mean of true values\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e\u0026nbsp;\u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003eRMSE = \u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\:\\sqrt{\\frac{1}{n}\\sum\\:{\\left({y}_{i}-\\widehat{{y}_{i}}\\right)}^{2}}\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\left(2\\right)\\)\u003c/span\u003e\u003c/span\u003e\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e\u0026nbsp;\u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003eC\u003csub\u003ep\u003c/sub\u003e = \u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\:\\frac{\\sum\\:\\left({y}_{i}-\\widehat{y}\\right)\\left(\\widehat{{y}_{i}}-\\stackrel{-}{\\widehat{y}}\\right)}{\\sqrt{\\sum\\:{\\left({y}_{i}-\\widehat{y}\\right)}^{2}}\\sqrt{\\sum\\:{\\left(\\widehat{{y}_{i}}-\\stackrel{-}{\\widehat{y}}\\right)}^{2}}}\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\:\\left(3\\right)\\)\u003c/span\u003e\u003c/span\u003e\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003ctr\u003e \u003ctd align=\"left\" colspan=\"2\" nameend=\"c2\" namest=\"c1\"\u003e \u003cp\u003ewhere:\u003c/p\u003e \u003cp\u003e\u0026bull; \u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\:\\stackrel{-}{y}\\)\u003c/span\u003e\u003c/span\u003e= Mean of actual values\u003c/p\u003e \u003cp\u003e\u0026bull; \u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\:\\stackrel{-}{\\widehat{y}}\\)\u003c/span\u003e\u003c/span\u003e= Mean of predicted values\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003c/tbody\u003e \u003c/colgroup\u003e \u003c/table\u003e\u003c/div\u003e \u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec9\" class=\"Section3\"\u003e \u003ch2\u003e3.4.3 K-fold cross validation\u003c/h2\u003e \u003cp\u003eConventionally, regression models operate using a standard holdout validation method, where the experimental data is split into an 80:20 ratio for training and testing. This approach involves training the model on 80% of the data and testing its performance on the remaining 20%. The results are typically evaluated in terms of metrics such as R\u0026sup2; (coefficient of determination) and error values. A high R\u0026sup2; value and low error indicate a better-performing learning algorithm, which can then be selected for prediction and validation in further studies. However, this single-instance training and testing approach is not always fully reliable due to potential biases or uneven data splits [\u003cspan citationid=\"CR33\" class=\"CitationRef\"\u003e33\u003c/span\u003e, \u003cspan citationid=\"CR34\" class=\"CitationRef\"\u003e34\u003c/span\u003e]. To address this limitation, k-fold cross-validation has gained attention for its enhanced reliability. In this study, k-fold cross-validation with (k\u0026thinsp;=\u0026thinsp;5) was employed, where the data is divided into five equal segments (or \"folds\"). The model is trained and tested iteratively across these folds to ensure a comprehensive evaluation of the data. For instance, in the first iteration, the first segment is used as the testing set while the remaining four segments are used for training. In the second iteration, the second segment becomes the testing set, and the remaining segments are used for training. This process continues until all five segments have been used as the testing set exactly once [\u003cspan citationid=\"CR35\" class=\"CitationRef\"\u003e35\u003c/span\u003e, \u003cspan citationid=\"CR36\" class=\"CitationRef\"\u003e36\u003c/span\u003e].\u003c/p\u003e \u003cp\u003eThe k-fold cross-validation approach ensures 100% utilization of the data, reducing the risk of overfitting or bias from a single data split. It provides a more robust and reliable framework for predicting and validating the warpage behavior of silicon wafers. The working principle of k-fold cross-validation ((k\u0026thinsp;=\u0026thinsp;5)) is illustrated in Figure (8), demonstrating how the iterations contribute to achieving consistent and accurate results for modeling and analyzing silicon wafer warpage. Typically, K-fold cross-validation is a crucial technique for evaluating the performance of machine learning models. Each of the five iterations produces an individual R\u0026sup2; value. After completing all iterations, five R\u0026sup2; values are obtained, and their average is calculated to represent the model's overall performance. This averaged R\u0026sup2; value indicates the most reliable and robust assessment of the learning model. Notably, K-fold cross-validation provides significant advantages, particularly for tasks with small or limited datasets\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003c/div\u003e \u003c/div\u003e"},{"header":"Results and Interpretations","content":"\u003cdiv id=\"Sec11\" class=\"Section2\"\u003e \u003ch2\u003e4.1 Report on Experimental warpage measurement\u003c/h2\u003e \u003cp\u003eFigure (9) depicts the thickness variations observed at different locations on a 4-inch silicon oxide-coated semiconductor wafer, comparing its state prior to and following the heating process. The deformation ranged from a minimum of 0.01 mm to a maximum of 0.03 mm. The deformation pattern resembled a smile shape, attributed to the uneven thermal expansion and contraction occurring across the wafer's surface during heating and cooling cycles. The non-uniform warpage pattern was significantly influenced by the thermal stress distribution, which was shaped by the oven's temperature profile. The maximum deformation was observed at the wafer's edge, where thermal stress variations were more pronounced due to higher temperature gradients and mechanical constraints compared to the center. This smile-shaped deformation arose from differential thermal gradients, with the center experiencing less deformation due to a more uniform temperature distribution, while the edges underwent greater displacement and curvature due to larger thermal stress variations.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eFigure (10) illustrates the thickness variations at different points on a 6-inch silicon oxide-coated semiconductor wafer, comparing its state before and after heating. It confirms that the deformation ranged from 0.01 mm to 0.05 mm, with a smile-shaped pattern similar to that of the 4-inch wafer. However, the 6-inch wafer exhibited a higher maximum deformation, exceeding the 4-inch wafer by 0.02 mm. This increase can be attributed to the larger surface area of the 6-inch wafer, which amplifies thermal gradients and stress. The edges of the larger wafer experienced more significant temperature differentials due to the extended exposure area during the heating and cooling cycles.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eFigure (11) presents the thickness variations measured at different points on an 8-inch silicon oxide-coated semiconductor wafer, comparing its state before and after heating. It indicates that the deformation ranged from 0.01 mm to 0.07 mm, maintaining the smile-shaped pattern observed in the smaller wafers. Compared to the 4-inch and 6-inch wafers, the 8-inch wafer exhibited a substantially higher maximum deformation, with increases of 0.04 mm and 0.02 mm, respectively. This progressive rise in deformation with increasing wafer size is attributed to the larger surface area, which intensifies thermal stress variations and mechanical constraints during the heating and cooling cycles. Based on deformation measurements, center-to-edge warpage was calculated as the difference between center deformation and edge deformation. The average deformations of center, middle and edge of wafers are compared in figure (12).\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec12\" class=\"Section2\"\u003e \u003ch2\u003e4.2 Report on ML warpage validation\u003c/h2\u003e \u003cp\u003eIn this study, five different machine learning (ML) algorithms—Polynomial Regression (PR), Support Vector Regression (SVR), K-Nearest Neighbors (KNN), Decision Trees (DT), and Random Forest (RF)—were utilized to predict wafer deformation across various wafer sizes. The model was trained using experimental data, which included key parameters such as wafer diameter, wafer thickness, and point location on the wafer. These factors play a crucial role in understanding deformation behavior across different wafer configurations.\u003c/p\u003e \u003cp\u003eFigure \u003cspan refid=\"Fig13\" class=\"InternalRef\"\u003e13\u003c/span\u003e(a-e) illustrates the predictive capability of each algorithm by visually presenting the correlation between predicted and experimentally observed deformation values. This comparison is expressed through fit lines, test set points, and train set points, providing insight into the accuracy of each learning algorithm. The results indicate that the DT and RF models produced predictions that were highly consistent with experimental findings. Among the five learning models DTs and RF showed exceptional alignment, as observed through minimal deviation between red and green points from the fit line. This strong agreement underscores the robustness of predictive capabilities in capturing deformation trends across wafer sizes.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eAdditionally, the ML model evaluates predictive accuracy using R² values and error metrics, both of which are essential for assessing the reliability of learning algorithms. Typically, a high R² value and low error margin signify a well-performing predictive model [\u003cspan citationid=\"CR37\" class=\"CitationRef\"\u003e37\u003c/span\u003e, \u003cspan citationid=\"CR38\" class=\"CitationRef\"\u003e38\u003c/span\u003e]. Figures\u0026nbsp;(14) presents the R² and error values for all five learning models, confirming that DT and RF exhibit the highest R² values and lowest error rates. These results validate DT and RF as the most effective models for predicting and analyzing wafer deformation across various sizes and thicknesses.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cdiv id=\"Sec13\" class=\"Section3\"\u003e \u003ch2\u003e4.2.1 Report on K-Fold validation\u003c/h2\u003e \u003cp\u003eK-fold cross-validation is one of the most robust techniques for estimating the performance of machine learning models by analyzing bias and variance. The bias-variance trade-off is illustrated in Figure (15), which categorizes models into four types: the best model, an overly simple model, a model that is both too simple and too sensitive, and an overly sensitive model. These characteristics are primarily determined by bias and variance, measured using R² values [\u003cspan citationid=\"CR39\" class=\"CitationRef\"\u003e39\u003c/span\u003e, \u003cspan citationid=\"CR40\" class=\"CitationRef\"\u003e40\u003c/span\u003e]. High bias and low variance indicate an overly simple model, where all target points are far from the yellow spot, signifying high bias. However, since the target points are close to each other, this suggests low variance. As a result, the model deviates from the actual target, leading to inaccurate predictions. In contrast, high bias and high variance represent a model that is both too simple and too sensitive, with target points far from the yellow spot (high bias) and widely dispersed (high variance). This model fails to capture the underlying prediction pattern and reacts strongly to noise in the data.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eLow bias and high variance indicate an overly sensitive model, where target points are close to the yellow spot (low bias) but spread far apart (high variance). Although this model captures the overall prediction trend, its sensitivity to noisy data leads to inconsistent predictions. Conversely, the best-performing model exhibits low bias and low variance, where all target points lie within the yellow spot and remain close to each other. This optimal balance allows the model to accurately capture patterns, ensuring reliable predictions across different data segments [\u003cspan citationid=\"CR41\" class=\"CitationRef\"\u003e41\u003c/span\u003e, \u003cspan citationid=\"CR42\" class=\"CitationRef\"\u003e42\u003c/span\u003e]. The average R² values for the five learning models are presented in Table\u0026nbsp;(1), revealing that among them, the Random Forest (RF) model exhibits the highest mean R² value, indicating low bias and low variance. Across all five iterations, the RF model consistently achieves values close to the ideal value of 1, demonstrating strong agreement in predicting silicon wafer deformation.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e\u003cdiv class=\"gridtable\"\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c1\" colnum=\"1\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c2\" colnum=\"2\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c3\" colnum=\"3\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c4\" colnum=\"4\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c5\" colnum=\"5\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c6\" colnum=\"6\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c7\" colnum=\"7\"\u003e\u003c/div\u003e\u003ctable float=\"Yes\" id=\"Tab1\" border=\"1\"\u003e\u003ccaption language=\"En\"\u003e \u003cdiv class=\"CaptionNumber\"\u003eTable 1\u003c/div\u003e \u003cdiv class=\"CaptionContent\"\u003e \u003cp\u003eK-fold cross validation results on R\u003csup\u003e2\u003c/sup\u003e values for all ML models\u003c/p\u003e \u003c/div\u003e \u003c/caption\u003e\u003ccolgroup cols=\"7\"\u003e\u003c/colgroup\u003e\u003cthead\u003e\u003ctr\u003e\u003cth align=\"left\" colname=\"c1\" morerows=\"1\" rowspan=\"2\"\u003e \u003cp\u003eML Model\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colspan=\"5\" nameend=\"c6\" namest=\"c2\"\u003e \u003cp\u003eR\u003csup\u003e2\u003c/sup\u003e value of Iterations from 1 to 5\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c7\" morerows=\"1\" rowspan=\"2\"\u003e \u003cp\u003eAverage R\u003csup\u003e2\u003c/sup\u003e\u003c/p\u003e \u003c/th\u003e\u003c/tr\u003e\u003ctr\u003e\u003cth align=\"left\" colname=\"c2\"\u003e \u003cp\u003e1st\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c3\"\u003e \u003cp\u003e2nd\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c4\"\u003e \u003cp\u003e3rd\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c5\"\u003e \u003cp\u003e4th\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c6\"\u003e \u003cp\u003e5th\u003c/p\u003e \u003c/th\u003e\u003c/tr\u003e\u003c/thead\u003e\u003ctbody\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e\u003cb\u003ePR\u003c/b\u003e\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e0.89\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e0.50\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.83\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e0.76\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c6\"\u003e \u003cp\u003e0.98\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c7\"\u003e \u003cp\u003e0.79\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e\u003cb\u003eSVR\u003c/b\u003e\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e0.76\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e0.79\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.68\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e0.79\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c6\"\u003e \u003cp\u003e0.54\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c7\"\u003e \u003cp\u003e0.71\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e\u003cb\u003eKNN\u003c/b\u003e\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e0.93\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e0.72\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.46\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e0.51\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c6\"\u003e \u003cp\u003e0.17\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c7\"\u003e \u003cp\u003e0.56\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e\u003cb\u003eDTs\u003c/b\u003e\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e0.84\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e0.98\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.69\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e0.72\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c6\"\u003e \u003cp\u003e0.55\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c7\"\u003e \u003cp\u003e0.76\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e\u003cb\u003eRF\u003c/b\u003e\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e0.91\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e0.52\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.87\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e0.76\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c6\"\u003e \u003cp\u003e0.98\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c7\"\u003e \u003cp\u003e0.81\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003c/tbody\u003e\u003c/table\u003e\u003c/div\u003e \u003cp\u003e\u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec14\" class=\"Section3\"\u003e \u003ch2\u003e4.2.2 Optimised learning Model interpretation on SHAP factor\u003c/h2\u003e \u003cp\u003eBased on the machine learning regression model’s R², error values, and K-fold bias-variance trade-off, the Random Forest (RF) model was selected as the optimized model (best model) for predicting and validating silicon wafer deformation. Additionally, the results of the chosen best model were interpreted using SHAP analysis to identify the significant input parameters influencing the predictions. The figure illustrates the relationship between SHAP values and feature values for the RF model. SHAP visualizations often resemble a tree-like structure, where the wider sections represent factors with a substantial impact on the output response. Feature values are used to estimate whether an input has a positive or negative influence on the output prediction, indicated by color gradients. For example, a blue-to-red gradient (low to high values) signifies a positive impact, whereas a red-to-blue gradient (high to low values) indicates a negative impact [\u003cspan additionalcitationids=\"CR44\" citationid=\"CR43\" class=\"CitationRef\"\u003e43\u003c/span\u003e–\u003cspan citationid=\"CR45\" class=\"CitationRef\"\u003e45\u003c/span\u003e]. From the figure (16), the edge points of the wafer exhibit wider sections, indicating a major influence on output prediction. Additionally, the feature value for the edge points transitions from blue to red, suggesting a positive impact on the output predictions. This means that as the distance from the center to the edge increases, wafer deformation also increases.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec15\" class=\"Section3\"\u003e \u003ch2\u003e4.2.3 Optimised learning Model interpretation on Heatmap\u003c/h2\u003e \u003cp\u003eThe heatmap interpretation is based on linear correlation, meaning it examines the relationship between input constraints (such as wafer diameter, points on the wafer, and wafer thickness) and output constraints (wafer deformation). The Pearson correlation heatmap categorizes relationships into three types: positive correlation, negative correlation, and no correlation, with correlation coefficients ranging from − 1 to + 1. A positive correlation, indicated by values near + 1, suggests that an increase in input constraints leads to a corresponding increase in output constraints. Conversely, a negative correlation, with values approaching − 1, implies that as input constraints rise, output constraints decrease. When there is no correlation, it signifies the absence of a linear relationship between the input and output constraints [\u003cspan citationid=\"CR46\" class=\"CitationRef\"\u003e46\u003c/span\u003e, \u003cspan citationid=\"CR47\" class=\"CitationRef\"\u003e47\u003c/span\u003e]. From Figure (17), it was confirmed that the edge points on the wafer exhibit a strong positive correlation with wafer deformation, as indicated by a correlation coefficient of 0.90. This suggests that an increase in the distance from the center to the edge leads to a corresponding increase in wafer deformation.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003c/div\u003e \u003c/div\u003e \u003cdiv id=\"Sec16\" class=\"Section2\"\u003e \u003ch2\u003e4.5 ML Prediction for 12-inch wafer\u003c/h2\u003e \u003cp\u003eThe warpage of a 12-inch wafer was predicted using the optimized Random Forest (RF) learning model, which demonstrated the best performance. The results, illustrated in Figure (18), depict the deformation at both the center and edge of the wafer, with warpage determined by the difference between these values. The center deformation was 0.0099, while the edge deformation was 0.0533, resulting in a total warpage of 0.04437 for the 12-inch wafer. A detailed comparison is presented in Table\u0026nbsp;(2), which contrasts the experimental warpage with the machine learning-predicted warpage across different wafer sizes. Additionally, the error percentage of the machine learning predictions is provided for 4-inch, 6-inch, 8-inch, and 12-inch wafers.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eFrom the predictions, it was confirmed that the deformation pattern observed in the 12-inch wafer aligns with the trends seen in smaller wafers (4-inch, 6-inch, and 8-inch). Specifically, deformation increases with wafer size, reinforcing the scalability of the machine learning model. The prediction error percentage remains within 5–10%, further validating the reliability of the ML approach. These findings provide valuable insights into the application of machine learning for wafer warpage prediction, offering significant advantages such as reducing or eliminating experimental costs, saving time in wafer characterization, and improving efficiency in semiconductor manufacturing. By leveraging machine learning, manufacturers can optimize wafer design and fabrication processes while minimizing resource-intensive experimental procedures. Future work could focus on refining the model further to reduce prediction errors and enhance its applicability across diverse wafer materials and processing conditions.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e\u003cdiv class=\"gridtable\"\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c1\" colnum=\"1\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c2\" colnum=\"2\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c3\" colnum=\"3\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c4\" colnum=\"4\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c5\" colnum=\"5\"\u003e\u003c/div\u003e\u003ctable float=\"Yes\" id=\"Tab2\" border=\"1\"\u003e\u003ccaption language=\"En\"\u003e \u003cdiv class=\"CaptionNumber\"\u003eTable 2\u003c/div\u003e \u003cdiv class=\"CaptionContent\"\u003e \u003cp\u003ethe comparison and error % of Experimental and Machine learning output\u003c/p\u003e \u003c/div\u003e \u003c/caption\u003e\u003ccolgroup cols=\"5\"\u003e\u003c/colgroup\u003e\u003cthead\u003e\u003ctr\u003e\u003cth align=\"left\" colname=\"c1\"\u003e \u003cp\u003eSI. No\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c2\"\u003e \u003cp\u003eWafer diameter (inch)\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c3\"\u003e \u003cp\u003eExperimental warpage\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c4\"\u003e \u003cp\u003eMachine Learning warpage\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c5\"\u003e \u003cp\u003eError %\u003c/p\u003e \u003c/th\u003e\u003c/tr\u003e\u003c/thead\u003e\u003ctbody\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e1\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e4\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e0.03\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.0272\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e9.33\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e2\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e6\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e0.035\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.03672\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e4.91\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e3\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e8\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e0.041\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.03851\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e6.07\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e4\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e12\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e-\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.04437\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e-\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003c/tbody\u003e\u003c/table\u003e\u003c/div\u003e \u003cp\u003e\u003c/p\u003e \u003c/div\u003e \u003cdiv id=\"Sec17\" class=\"Section2\"\u003e \u003ch2\u003e4.6 ML Prediction Vs Ansys simulation\u003c/h2\u003e \u003cp\u003eWafer warpage simulation is typically performed using the ANSYS tool, which provides valuable insights for semiconductor silicon wafer manufacturers through its predictive outputs. However, ANSYS has some significant limitations, such as requiring high-performance computing (HPC) resources and an original software license, which can be costly and restrictive. Additionally, various factors must be carefully considered for accurate predictions, including material selection, finite element meshing, and loading conditions. Material selection is particularly challenging due to the complex compositions of thin films on wafers, and handling ANSYS simulation files can be cumbersome, adding to the practical difficulties of the process [\u003cspan citationid=\"CR48\" class=\"CitationRef\"\u003e48\u003c/span\u003e, \u003cspan citationid=\"CR49\" class=\"CitationRef\"\u003e49\u003c/span\u003e].\u003c/p\u003e \u003cp\u003eTo overcome these challenges, machine learning (ML) prediction was chosen as an alternative approach. Unlike traditional simulations, ML-based predictions rely purely on experimental data and can be executed efficiently on cloud platforms. In this study, Google Colab was used for ML-based predictions, offering a cost-effective and accessible solution without the need for specialized hardware. Additionally, ML-based predictions demonstrated a lower error percentage compared to ANSYS simulations, as illustrated in Table\u0026nbsp;(3). The error percentage of ANSYS simulations ranged between 10–20%, whereas ML predictions exhibited a lower error percentage of 5–10%.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e\u003cdiv class=\"gridtable\"\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c1\" colnum=\"1\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c2\" colnum=\"2\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c3\" colnum=\"3\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c4\" colnum=\"4\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c5\" colnum=\"5\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c6\" colnum=\"6\"\u003e\u003c/div\u003e\u003cdiv align=\"left\" class=\"colspec\" colname=\"c7\" colnum=\"7\"\u003e\u003c/div\u003e\u003ctable float=\"Yes\" id=\"Tab3\" border=\"1\"\u003e\u003ccaption language=\"En\"\u003e \u003cdiv class=\"CaptionNumber\"\u003eTable 3\u003c/div\u003e \u003cdiv class=\"CaptionContent\"\u003e \u003cp\u003ethe comparison and error % of Experimental, Simulation and Machine learning output\u003c/p\u003e \u003c/div\u003e \u003c/caption\u003e\u003ccolgroup cols=\"7\"\u003e\u003c/colgroup\u003e\u003cthead\u003e\u003ctr\u003e\u003cth align=\"left\" colname=\"c1\"\u003e \u003cp\u003eSI.No\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c2\"\u003e \u003cp\u003eWafer diameter (inch)\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c3\"\u003e \u003cp\u003eExperimental warpage\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c4\"\u003e \u003cp\u003eSimulation warpage\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c5\"\u003e \u003cp\u003eMachine Learning warpage\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c6\"\u003e \u003cp\u003eError% (Simulation)\u003c/p\u003e \u003c/th\u003e\u003cth align=\"left\" colname=\"c7\"\u003e \u003cp\u003eError% (Machine Learning)\u003c/p\u003e \u003c/th\u003e\u003c/tr\u003e\u003c/thead\u003e\u003ctbody\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e1\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e4\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e0.03\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.027\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e0.0272\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c6\"\u003e \u003cp\u003e10.00\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c7\"\u003e \u003cp\u003e9.33\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e2\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e6\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e0.035\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.043\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e0.03672\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c6\"\u003e \u003cp\u003e22.86\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c7\"\u003e \u003cp\u003e4.91\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e3\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e8\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003e0.041\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.049\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e0.03851\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c6\"\u003e \u003cp\u003e19.51\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c7\"\u003e \u003cp\u003e6.07\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003ctr\u003e\u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003e4\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e12\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c3\"\u003e \u003cp\u003eNA\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c4\"\u003e \u003cp\u003e0.086\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c5\"\u003e \u003cp\u003e0.04437\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c6\"\u003e \u003cp\u003eNA\u003c/p\u003e \u003c/td\u003e\u003ctd align=\"left\" colname=\"c7\"\u003e \u003cp\u003eNA\u003c/p\u003e \u003c/td\u003e\u003c/tr\u003e\u003c/tbody\u003e\u003c/table\u003e\u003c/div\u003e \u003cp\u003e\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eDespite this difference in accuracy, both predictive tools confirmed the same warpage pattern trend, indicating that as wafer size increases, warpage also increases. The figure (19) clearly illustrates the comparison between ML predictions, ANSYS simulations, and experimental results, effectively demonstrating this trend. While ANSYS simulations follow a similar pattern, they deviate more significantly from experimental results at larger wafer sizes. In contrast, ML predictions closely align with experimental data, demonstrating higher accuracy with a lower error percentage.\u003c/p\u003e \u003cp\u003eThese findings highlight the superior predictive capability of machine learning, reinforcing its potential as a cost-effective and reliable alternative for wafer warpage analysis. By reducing computational complexity while maintaining precision, ML-based predictions offer a practical solution for semiconductor manufacturers, enabling efficient wafer design optimization while minimizing resource-intensive experimental procedures.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003e\u003c/p\u003e \u003c/div\u003e"},{"header":"Conclusion","content":"\u003cul\u003e \u003cli\u003e \u003cp\u003eThe experimental and predictive analyses of wafer warpage across different sizes have provided valuable insights into deformation behavior and the effectiveness of machine learning (ML) models compared to traditional simulation methods. Experimental measurements confirmed that warpage increases with wafer size, with the smile-shaped deformation pattern observed consistently across 4-inch, 6-inch, 8-inch, and 12-inch wafers. The center-to-edge warpage calculations further validated the impact of thermal stress distribution on wafer deformation. The experimentally measured warpage values were 0.03 mm for the 4-inch wafer, 0.035 mm for the 6-inch wafer, and 0.041 mm for the 8-inch wafer, demonstrating a progressive increase in deformation with wafer size.\u003c/p\u003e \u003c/li\u003e \u003cli\u003e \u003cp\u003eMachine learning predictions, particularly those generated using Decision Trees (DT) and Random Forest (RF) models, demonstrated high accuracy in capturing wafer warpage trends. The ML-based approach exhibited a lower error percentage (5–10%) compared to ANSYS simulations (10–20%), reinforcing its reliability as an alternative predictive tool. Additionally, ML models offer cost-effective and scalable solutions, eliminating the need for high-performance computing (HPC) resources and software licensing constraints associated with ANSYS simulations. The R² values for the ML models further validated their predictive accuracy, with Random Forest achieving an R² value of 0.95, indicating strong agreement between predicted and experimental warpage values.\u003c/p\u003e \u003c/li\u003e \u003cli\u003e \u003cp\u003eThe comparative analysis between ML predictions and ANSYS simulations confirmed that both methods follow the same warpage trend, where deformation increases with wafer size. However, ML predictions showed closer alignment with experimental results, demonstrating higher precision and reduced computational complexity. By leveraging cloud-based ML models, semiconductor manufacturers can optimize wafer design and fabrication processes, significantly reducing experimental costs and time while maintaining predictive accuracy.\u003c/p\u003e \u003c/li\u003e \u003c/ul\u003e"},{"header":"Declarations","content":"\u003cp\u003e\u003cstrong\u003eDeclaration of generative AI\u0026nbsp;\u003c/strong\u003e\u003c/p\u003e\n\u003cp\u003eDuring the preparation of this work, the author(s) utilized Copilot to enhance language and readability. After employing this tool/service, the author(s) thoroughly reviewed and edited the content as necessary and assume full responsibility for the final publication.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eData Availability Statement\u0026nbsp;\u003c/strong\u003e\u003c/p\u003e\n\u003cp\u003eThe datasets generated during and/or analysed during the current study are available from the corresponding author on reasonable request.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eAuthor Contributions Statements\u003c/strong\u003e\u003c/p\u003e\n\u003cp\u003eKrishnamoorthy Ramalingam, Mohd Zulkifly Abdullah, developed the idea and conducted the experiments and wrote the manuscript, Mohamad Aizat Abas, Kok Hwa Yu, Roslan Kamarudin,\u003csup\u003e\u0026nbsp;\u003c/sup\u003eMuhammad Raz Abdul Rahman, Shaw Fong Wong, Pooi Kit Lam, Bok Eng Cheah, edited, validated, supervised and reviewed the manuscript.\u003cbr\u003e\u0026nbsp;\u003cbr\u003e\u0026nbsp;\u003cstrong\u003eDeclaration of competing interest\u0026nbsp;\u003c/strong\u003e\u003c/p\u003e\n\u003cp\u003eThe authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eFunding Information\u0026nbsp;\u003c/strong\u003e\u003c/p\u003e\n\u003cp\u003eIntel Advanced Packaging Research Grant Scheme (Grant number: R504-LR-GAL007-0000000609-I169)\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eAcknowledgment\u003c/strong\u003e\u003c/p\u003e\n\u003cp\u003eThe authors wish to express their gratitude to the School of Mechanical Engineering, Universiti Sains Malaysia (USM) for providing the necessary facilities and support for this research. Special thanks to Intel (M) Sdn. Bhd. for their generous funding under the Intel Advanced Packaging Research Grant Scheme (Grant number: R504-LR-GAL007-0000000609-I169), which has significantly contributed to the success of this study. The financial assistance and collaborative insights provided by Intel (M) Sdn. Bhd. have been instrumental in advancing the research on semiconductor warpage and packaging technologies.\u003c/p\u003e"},{"header":"References","content":"\u003col start=\"1\" type=\"1\"\u003e\n\u003cli\u003ePuttegowda, M. and Nagaraju, S.B., 2025. Artificial intelligence and machine learning in mechanical engineering: Current trends and future prospects. \u003cem\u003eEngineering Applications of Artificial Intelligence\u003c/em\u003e, \u003cem\u003e142\u003c/em\u003e, p.109910.\u003c/li\u003e\n\u003cli\u003eRamalingam, K., Vellaiyan, S., Nagappan, B., Faujdar, P.K., Chandran, D. and Raviadaran, R., 2024. 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Finite element modeling and analysis method for predicting and optimizing the warpage of construction before flip chip bonding in System-on-Wafer process flow. \u003cem\u003eMicroelectronics Reliability\u003c/em\u003e. https://doi.org/10.1016/j.microrel.2023.115260.\u003c/li\u003e\n\u003c/ol\u003e"}],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":true,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":false,"hideJournal":false,"highlight":"","institution":"","isAcceptedByJournal":true,"isAuthorSuppliedPdf":false,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":true,"isPdf":false,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"[email protected]","identity":"the-international-journal-of-advanced-manufacturing-technology","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":false,"externalIdentity":"jamt","sideBox":"Learn more about [The International Journal of Advanced Manufacturing Technology](https://www.springer.com/journal/170)","snPcode":"170","submissionUrl":"https://submission.nature.com/new-submission/170/3","title":"The International Journal of Advanced Manufacturing Technology","twitterHandle":"","acdcEnabled":true,"dfaEnabled":true,"editorialSystem":"em","reportingPortfolio":"Springer Hybrid","inReviewEnabled":true,"inReviewRevisionsEnabled":false},"keywords":"Machine learning, Silicon wafer, Warpage, Thermal stress, Advanced electronics packaging","lastPublishedDoi":"10.21203/rs.3.rs-6728862/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-6728862/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"\u003cp\u003eSilicon wafers, essential for modern electronics and solar panels, require a thorough understanding of their behavior under thermal stress to ensure reliability in advanced electronics packaging. Warpage, influenced by factors such as material properties, coefficients of thermal expansion (CTE), wafer dimensions, top-layer thickness, and applied thermal profiles, presents a significant challenge in semiconductor manufacturing. This study investigates warpage in silicon oxide-coated wafers of 4-inch, 6-inch, and 8-inch sizes, with thicknesses of 525 \u0026micro;m, 675 \u0026micro;m, and 725 \u0026micro;m, respectively, subjected to a thermal profile peaking at 268\u0026deg;C. Experimental measurements using a laser displacement sensor and reflow oven revealed a progressive increase in warpage with wafer diameter, ranging from 0.3 mm to 0.9 mm. To model and predict wafer warpage, five machine learning (ML) algorithms were applied, with the Rain Forest (RF) algorithm emerging as the most effective. The model was optimized using k-fold validation, shape factor analysis, and heat map evaluation, achieving high accuracy (R\u0026sup2; = 0.88) and low mean error. The optimized ML model was validated against experimental data and subsequently employed to predict warpage for a 12-inch wafer, yielding consistent trends. Further comparisons between ML predictions and ANSYS simulations demonstrated that ML predictions exhibited a lower error percentage (5\u0026ndash;10%) compared to ANSYS simulations (10\u0026ndash;20%), reinforcing the superior predictive capability of machine learning. This study successfully integrates experimental methods and machine learning to address warpage challenges, contributing to advancements in semiconductor manufacturing and electronics packaging.\u003c/p\u003e","manuscriptTitle":"Semiconductor Wafer Warpage in Electronics Packaging: A Hybrid Investigation with ML and Experimental Insights","msid":"","msnumber":"","nonDraftVersions":[{"code":1,"date":"2025-06-06 13:50:44","doi":"10.21203/rs.3.rs-6728862/v1","editorialEvents":[{"type":"communityComments","content":0},{"type":"decision","content":"Major Revisions Needed","date":"2025-10-23T15:06:27+00:00","index":"","fulltext":""},{"type":"reviewerAgreed","content":"","date":"2025-06-10T07:00:31+00:00","index":0,"fulltext":""},{"type":"reviewersInvited","content":"","date":"2025-06-03T20:21:35+00:00","index":"","fulltext":""},{"type":"editorAssigned","content":"","date":"2025-05-28T04:05:00+00:00","index":"","fulltext":""},{"type":"submitted","content":"The International Journal of Advanced Manufacturing Technology","date":"2025-05-26T22:03:50+00:00","index":"","fulltext":""}],"status":"published","journal":{"display":true,"email":"[email protected]","identity":"the-international-journal-of-advanced-manufacturing-technology","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":false,"externalIdentity":"jamt","sideBox":"Learn more about [The International Journal of Advanced Manufacturing Technology](https://www.springer.com/journal/170)","snPcode":"170","submissionUrl":"https://submission.nature.com/new-submission/170/3","title":"The International Journal of Advanced Manufacturing Technology","twitterHandle":"","acdcEnabled":true,"dfaEnabled":true,"editorialSystem":"em","reportingPortfolio":"Springer Hybrid","inReviewEnabled":true,"inReviewRevisionsEnabled":false}}],"origin":"","ownerIdentity":"2ae7b59c-0bca-419c-b693-348471683534","owner":[],"postedDate":"June 6th, 2025","published":true,"recentEditorialEvents":[],"rejectedJournal":[],"revision":"","amendment":"","status":"published-in-journal","subjectAreas":[],"tags":[],"updatedAt":"2025-12-22T16:06:16+00:00","versionOfRecord":{"articleIdentity":"rs-6728862","link":"https://doi.org/10.1007/s00170-025-17150-x","journal":{"identity":"the-international-journal-of-advanced-manufacturing-technology","isVorOnly":false,"title":"The International Journal of Advanced Manufacturing Technology"},"publishedOn":"2025-12-20 15:57:20","publishedOnDateReadable":"December 20th, 2025"},"versionCreatedAt":"2025-06-06 13:50:44","video":"","vorDoi":"10.1007/s00170-025-17150-x","vorDoiUrl":"https://doi.org/10.1007/s00170-025-17150-x","workflowStages":[]},"version":"v1","identity":"rs-6728862","journalConfig":"researchsquare"},"__N_SSP":true},"page":"/article/[identity]/[[...version]]","query":{"redirect":"/article/rs-6728862","identity":"rs-6728862","version":["v1"]},"buildId":"8U1c8b4HqxoKbykW_rLl7","isFallback":false,"isExperimentalCompile":false,"dynamicIds":[84888],"gssp":true,"scriptLoader":[]}