A Multiple Dead Zone Controller for Fast-Locking Sub-sampling PLL

In this article, a multiple dead zone controller (MDZC) is proposed to automatically adjust the dead zone range based on the timing error. The MDZC generates three distinct dead zone ranges, thereby categorizing the timing error into four distinct regions. Thus, the sensitivity of switching the loop’s operational modes can be enhanced to reduce the locking and re-locking times. The proposed MDZC is fabricated in 55-nm CMOS technology. Simulation demonstrates that the locking time is 2.3 $\mu s$, and the re-locking times are 2.3 $\mu s$ and 1.5 $\mu s$, respectively, when 150 mV and 350 mV are applied.