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To date, the absence of a design-led strategy to systematically enhance the performance of fundamental molecular circuit components, coupled with sub-optimal device fabrication yields, has posed significant barriers to the widespread adoption and practical implementation of nanoelectronics. In this study, we report high-performance molecular transistors with a vertical configuration that employs self-assembled monolayers as the channel material and a top graphene electrode that allows external electro-gating. Leveraging on distinct hopping and tunneling charge transport mechanisms to mediate the ON and OFF transistor states, we achieve robust device performance at working CPU temperatures up to 350 K, with ON/OFF ratios exceeding 10 4 . Produced in yields > 90%, these novel molecular transistors perform logic operations, support wafer-scale integration and provide a versatile platform for advancing the understanding of the mechanisms governing molecular charge transport. Physical sciences/Nanoscience and technology/Nanoscale devices/Molecular electronics Physical sciences/Engineering/Electrical and electronic engineering Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Introduction Co-innovation of microelectronic fabrication processes and high-performance materials advanced CMOS (complementary metal–oxide–semiconductor) technology in the past decades. 1 The current drive to sub-5-nm transistors, approaching the molecular dimension, introduces new engineering and scientific challenges for traditional materials, requiring bespoke ultra-miniaturized processing, expensive additives and stabilizer materials, and harnessing of quantum charge tunneling mechanisms. 2 , 3 Utilizing molecular junctions shrinks the dimension of electronics directly below 2-nm, simplifying the fabrication process, providing opportunities for tailoring device performance and introducing novel functionalities through chemical design. 4 , 5 Thus, the creation of high-performance molecular transistors that are integratable with conventional nanofabrication processes and that present high ON/OFF ratios is a key goal for the realization of miniaturized, low-power integrated circuits. 6 , 7 To date, this goal has been hampered by the generally low yield of standard fabrication strategies and variable performance of molecular junctions, as well as poor stability and reproducibility of molecular transistors that rely on molecular orbital gating at cryo-temperatures 8 – 10 or conformational changes under external stimuli. 11 , 12 Nanoscale effects including surface defects, Fermi-level (E F ) pinning and poor contacting geometries, further degrade performance. 13 In addition, most molecular transistors reported to-date are implemented through single-molecule junctions (Table S1 ) which are ill-suited to large-area integration and show large device-to-device variability. Self-assembled monolayers (SAMs), in which bottom-up supramolecular packing spontaneously generates large-area, ordered structures, offer mature and reliable technology for molecular electronics, with scalable production, high-yield and CMOS-compatibility. 14 However, the classic sandwich structure that confines functional SAMs between top and bottom electrodes hinders gate regulation of molecular orbitals by external electrical field. 4 , 15 – 17 While side, central, and top gates have been demonstrated for SAMs-based transistors, side and central gate regulation is cumbersome. 4 Fortunately, efficient top gating of SAMs can be achieved employing single-layer graphene (SLG) top electrode to construct damage-free molecular junctions, 18,19 with a gate dielectric placed on SLG providing electric gating. 20 , 21 Here, we employ molecular tunnel junctions formed by Au-SAMs//SLG sandwich structure. Both HOMO- (exTTF-SH, π-extended analog of tetrathiafulvalene) and LUMO-type (C 60 -SH, fullerene derivative) SAMs are employed to obtain different molecular transistors (Fig. 1 d), in analogy to p- and n-type silicon-based transistors. Ionic liquid placed above the SLG provides the third electrode (gate) to tune the alignment of the frontier molecular orbitals with respect to the Fermi level (E F ) of the SLG. The close match in energy between the molecular orbital participating in charge transport, i.e ., the electron donor HOMO (exTTF-SH) or electron acceptor LUMO (C 60 -SH), and the E F of SLG enables efficient molecular orbital gating at and above room temperature in the SAMs-based transistors. The resulting vertical molecular transistors, just 1.5-nm thick, achieve unprecedented electrical performance, exhibiting ON/OFF ratios > 10 4 at elevated, working CPU temperature. Results Vertical molecular transistors We utilized the concept of vertical molecular transistors (Fig. 1 a-b), where the channel consists of SAMs chemically-bound to the Au bottom electrode and physically-contacted to the top SLG. 20 – 22 Thiol-functionalized molecules formed well-packed SAMs to serve as the channel material, featuring functional groups with strategically-positioned frontier orbitals, specifically exTTF-SH HOMO and C 60 -SH LUMO. 23 , 24 To control the contact area and minimize contact defects between the SAMs and the SLG, patterned Al 2 O 3 insulator was used to separate SLG from Au electrodes, with micropores created in the Al 2 O 3 layer to host the SAMs. After forming Au-SAMs//SLG, ionic liquid [DEME] + [TFSI] − (N,N-diethyl-N-methyl-N-(2-methoxyethyl)ammonium bis(trifluoromethylsulfonyl)imide) was dropped on the SLG. Upon applying a gate voltage V gs , redistribution of charge in the ionic liquid generates strong electric field (only partially screened by SLG) in the SAMs, providing the transistor conductance switching by orbital gating. The detailed fabrication flow is depicted in Methods and Section S3. The design of the SLG-based gates of our molecular transistors was inspired by the work of Duan and collaborators, 21 an approach that we have extrapolated to resolve the long-standing scalability and large-area integration challenge in molecular electronics. 25 To characterize the cross-sectional scale of the Au-S-exTTF//SLG junctions, we deposited a final topcoat of 30 nm Au and then cut a slab around the edge of the Al 2 O 3 micropore using focused ion beam. High-resolution transmission electron microscopy (HRTEM) confirmed a well-defined 1.5-nm gap between the two Au layers (Fig. 1 c), consistent with the thickness of the SAM, confirming that the channel length in our molecular transistor is sub-2nm. Features of Au-SAM//graphene two-terminal junctions The chemical design and energy level diagrams of the HOMO- and LUMO-type molecular junctions are shown in Fig. 1 d-e. The positions of the frontier orbitals are determined from photoelectron spectroscopy and UV-vis absorption spectra (Section S3), and matched well with density functional theory (DFT) calculations. The HOMO of Au-S-exTTF (-4.91 eV) and the LUMO of Au-S-C 60 (-4.33 eV) sit close to the Fermi level of SLG (E F = -4.5 eV). First, we measured the two-terminal charge transport characteristics ( I ds -V ds ) of Au-S-exTTF//SLG and Au-S-C 60 //SLG junctions. For Au-S-exTTF//SLG, the asymmetric I ds - V ds characteristics, as visualized in the heatmap generated from over 700 traces, demonstrate that I ds (+ 1.0 V) is 3× higher than I ds (-1.0 V) (Fig. 2 a, Fig.S13). The trend is reversed for Au-S-C 60 //SLG, where I ds (-1.5 V) is two orders of magnitude higher than I ds (+ 1.5 V), suggesting involvement of different molecular orbitals in charge transport for the two molecules (Fig. 2 b). 23 , 26 , 27 To verify the charge transport mechanism, we conducted temperature-dependent measurements on Au-S-exTTF//SLG. It shows clear temperature-dependent charge transport behavior with an exponential decay in current, indicating electron hopping via frontier molecular orbitals (Fig.S14). 28 To gain further insight into the charge transport features, we performed charge transport calculations with DFTB + software, 29 based on Non-Equilibrium Green Function (NEGF) 30 approach combined with Density Functional-based Tight Binding (DFTB) models 31 – 33 for the electronic structures of the exTTF-SH and C 60 -SH junctions (Fig.S29). Computed transmission functions (Fig. 2 c) show the unoccupied conduction levels of C 60 -SH shifted to similar energy as exTTF-SH occupied valence levels, reflecting the transmission process in the near-Fermi bias windows of the junctions. Computed I ds - V ds characteristics for the two-terminal molecular junction exhibit similar asymmetry features to those observed in the experimental data (Fig. 2 d). Thus, we conclude that the HOMO of exTTF-SH and LUMO of C 60 -SH participate in the charge transport, which makes it possible for gate voltage V gs to shift their positions and regulate the channel conductance. Features of HOMO- and LUMO-type molecular transistors To sample the transistor response of our SAMs-based junctions, a gate voltage V gs was applied to the ionic liquid on top of SLG. The transfer characteristics, reflecting the current ( I ds ) regulation through V gs , are used to evaluate the performance of the transistors. Two distinct transfer characteristics emerge in the molecular transistors, reflecting the contrasting electronic structures of Au-S-exTTF//SLG and Au-S-C 60 //SLG. For Au-S-exTTF//SLG, the transfer characteristics exhibit strongest increase in I ds when gate voltage V gs is negative (measured up to -3.0 V), with negligible increase for positive gate values (Fig. 3 a). The situation reserves for the Au-S-C 60 transistors, where strongest enhancement of current magnitude is achieved at positive V gs (Fig. 3 c). This allows their classification as HOMO- and LUMO-type molecular transistors, in direct analogy to the standard p- and n-type semiconductor transistors. Transfer characteristics of the HOMO- and LUMO-type molecular transistors at V ds >0 (Fig.S16) demonstrate similar trend compared with V ds < 0. Figure 2 b, d shows typical output characteristics ( I ds - V ds ) of Au-S-exTTF and Au-S-C 60 as V gs is varied between − 3.0 and 3.0 V, with all molecular transistors exhibiting nonlinear output characteristics across all gate voltages. As V gs in Au-S-exTTF is varied from 0 to -3.0 V, I ds rises exponentially with V ds and is lack of saturation. These measurements confirm that the SAMs, as the tunneling barrier in molecular junctions, drive short-channel effects. 17 The relative alignment between the frontier molecular orbitals and the E F of the SLG is the determining factor for the distinct behaviors. Specifically, the HOMO of Au-S-exTTF lies 0.41 eV below E F , whereas the LUMO of Au-S-C 60 sits 0.17 eV above E F , both within the electrostatic window of SLG. The alignment of the HOMO or LUMO requires opposite V gs polarities to bring the respective orbital into the conduction window, thereby modulating I ds in distinctive ways and providing a means for creation of future p-n molecular transistor junctions, e.g ., heterostructures composed of both HOMO- and LUMO-type SAM-based junctions spaced by SLG layers. To validate the universality of the molecular transistor design presented in this work, we tested two additional SAMs, including Fc-SH (ferrocene derivative) and PDI-SH (perylene diimides derivative) (Fig.S19). As shown in Sections S3, Fc-SH, with near-E F HOMO at -4.97 eV, exhibits a HOMO-type transistor response similar to exTFF-SH, while PDI-SH, with near-E F LUMO at -3.95 eV, shows the similar characteristics as C 60 -SH. As a negative control, SC 18 (1-octadecanethiol) with frontier orbitals energetically-distant (> 2 eV) from E F showed extremely poor ON/OFF transistor ratios around 10 (Fig.S20, see also SAMs-less devices in Fig.S21). 34 Operating mechanisms of the molecular transistors Compared to conductance changes induced by conformational adjustments or chemical reactions, regulating molecular orbitals in molecular transistors by all-electrical means offers a universal and practical approach. However, a key obstacle for deployment of high-performance molecular transistors is their degradation at ambient and elevated temperatures. The inherent orbital level broadening at and above ambient temperature makes it exceedingly difficult to regulate the current response using gate voltages. 43 , 44 The vertical architecture of the molecular junctions in this study utilizes asymmetrically-positioned functional groups, separated by insulating aliphatic linker groups from the Au substrate to prevent hybridization, and capped by the SLG top electrode, which acts as a protecting layer against degradation and minimizes energy level broadening mediated by the SLG–SAMs steric, van der Waals interaction, enabling effective gating at elevated temperature. 22 , 26 We performed temperature-dependent measurements to elucidate the operational mechanisms of the molecular transistors. Electron transport in Au-S-exTTF//SLG was measured over 230–350 K, with V ds fixed at + 0.5 V to ensure stable ON and OFF currents during measurements (Fig. 3 e-f). I ds presents markedly-different temperature dependencies at different V gs values. The charge transport mechanism at V ds = + 0.5 V with V gs =0 V is hopping (Fig.S14). For negative gate voltages, the molecular transistor operates in the ON-state and log| I ds | exhibits linear decrease with inverse temperature (Fig. 3 e). The extracted Arrhenius activation energy ( E a ) for electron hopping is E a =61.21 meV, close to reported values (71.97 meV), 24 and confirming that electron transport in the ON-state occurs by hopping (Fig. 3 i). When setting positive V gs , the molecular transistor operates in the OFF-state and I ds remains near-constant with decreasing temperature, consistent with activationless tunneling (Fig. 3 f). Temperature-dependent measurements on Au-S-C 60 //SLG transistors also showed distinct charge transport mechanisms for the ON-state and OFF-state (Fig. 3 g-h). At V gs = + 3.0 V (ON-state) the charge transport is governed by temperature-dependent hopping mechanism displaying an Arrhenius behavior of the current, whereas at V gs =-3.0 V (OFF-state), it is governed by a temperature-independent tunneling mechanism. The corresponding activation energy is 148 meV, about 2 times larger than the values reported for two terminal fullerene molecular junctions (69 meV). 45 This observation indicates that LUMO-type transistors also adhere to the operating principle of transitioning from a tunneling-dominated mechanism in the OFF-state to a hopping-dominated mechanism in the ON-state. The most important finding from the temperature-dependent measurements is that the charge transport mechanisms are highly dependent on the energy level alignment between molecular orbitals and the E F of SLG. Specifically, the hopping mechanism occurs when the molecular orbitals enter the conduction window, while the tunneling mechanism dominates when the molecular orbitals lie outside the conduction window. At a fixed V ds , the charge transport mechanism in the molecular transistors transitions from tunneling to hopping as the V gs shifts the respective HOMO and LUMO orbitals, corresponding to a switch from the OFF-state to the ON-state (Fig. 3 i). Moreover, the operating mechanism relies on energy level shifts under a gate voltage, rather than requiring conformational changes or chemical reactions. This characteristic enables their potential for fast, all-electrical and stable operation at and above room temperature. Figure 3 j benchmarks the high performance and operation temperature of our transistors against previously reported molecular transistors, while Table S1 summarizes the corresponding features, with the current molecular transistors showing state-of-the-art performance across the operating temperature range of modern computing systems with working CPU temperatures of ~ 310–350K. The HOMO-type transistors achieve high performance at 350K, with ON/OFF ratios exceeding 10 4 , the highest reported to date for molecular transistors operating at or above room temperature, and only surpassed overall by quantum interference single-molecule tunneling junctions transistors requiring temperatures lower than 100 K. Similarly, the LUMO-type transistors exhibit a near 10 4 ON/OFF ratio at 330 K (Fig.S17-18). These results mark a significant advancement in the performance of molecular transistors and pave the way for their integration into practical electronics. Applications of molecular transistors To demonstrate the cycling stability of molecular transistors, we recorded over 100,000 switching cycles for the HOMO-type transistors, which has not been realized to-date under room temperature for any other molecular transistor. 35 The schematic wiring diagram for the switching cycle measurements under AC mode (Fig. 4 a) utilizes a square wave with an absolute amplitude of 3.0 V and a frequency of 10 Hz. Owing to the SLG layer, the device exhibits excellent air stability, enabling the ON-current of the HOMO-type transistor to be maintained for over 30 days (Fig. S27). To our knowledge, there are also no examples to-date of the creation of proof-of-concept logic gates with voltage output implemented with molecular transistors. 46 , 47 Here, we used an individual HOMO-type transistor to implement a NOT gate (Fig. 4 b) and combined two of these transistors to achieve NOR and NAND gates (Fig. 4 c-d). The wiring diagram is shown in Fig.S26. For the individual-transistor NOT gate, the drive voltage ( V dd ) is fixed at -0.1 V, while the input signal V in is the 1 -state at -3.0 V and 0 -state at 0 V. While the output voltage demonstrates clear logic operation (Fig. 4 b), the significant disparity between the magnitudes of the drive voltage and the input signal poses a challenge for implementing more complex logic operations. Furthermore, the functionality of these molecular logic gates is dependent on external load resistors, which limits their practical application. To overcome this limitation, we fabricated an on-chip combination of HOMO- and LUMO-type transistors to create the complementary NOT gate (Fig. 4 e). In this case, the V dd of the NOT gate is -2.0 V. The combination of the two types of molecular transistors improves the output logic levels to -1.2 V at V in = + 2.0 V, which is a substantial improvement compared with the gates implemented only with HOMO-type transistors. Moreover, this gate operates without the need for external resistors, significantly enhancing its integration potential and simplifying the circuit design. Wafer-scale integration As shown in Fig. 5a, we have advanced the individual transistor design towards ~ 8,000 molecular transistors on 2-inch wafer using industry-compatible microfabrication techniques. Nonlinear I ds – V ds curves indicate the proper contact between electrodes and SAMs while linear curves would indicate that the top and bottom electrode are shorted. We determined the yield of integrated molecular junctions through the proportion of nonlinear I ds – V ds , which yields 94.8% in our case (Table S4, Fig.S23). We measured the 36 molecular transistors in an individual cell and they all exhibited high ON/OFF ratios (Fig. 5b, c). Note that the molecular transistors in an individual cell are controlled by a common gate, which can be applied directly through a metallic probe or cross marker, which hinders the further high-density integration. This can be resolved by an integration scheme that includes individually-addressable solid dielectric gates to substitute the ionic liquid, which can be achieved, for example, with superionic fluoride dielectrics. 48 The measured transfer characteristics of 200 randomly-selected HOMO-type molecular transistors (Fig. 5d, Fig.S24-25) showed the ideal switching behavior collected from four different patches. The log(ON/OFF) values exhibit a tight normal distribution, with mean of 4660 and standard deviation of 14 (Fig. 5e). To benchmark the integration and yield of the functional molecular transistor devices, we profiled functional molecular diodes, molecular memories and molecular transistors, with variable fabrication techniques (Fig. 5f, Table S2). Mass production has not been achieved to-date for functional molecular devices with complex fabrication flows. The most promising approach so far is using PEDOT: PSS, gold nanoparticle or deposited carbon as non-invasive top electrode, which enables high-yield (> 99%) and high integration (> 10,000) molecular junction fabrication, but fails to exhibit high functionality due to imperfect interfaces. 14 , 49 , 50 Due to their restricted utility in functional molecular devices, these molecular junctions are overlooked in the benchmark. In this work, we filled the gap in high-integration and high-yield of high-performance functional molecular transistors using industry-compatible microfabrication flows. Conclusion This study demonstrates high-performance molecular transistors with a vertical configuration, utilizing SAMs as the channel material. The drain current is effectively modulated through the energy level alignment of molecular orbitals, enabling the classification of HOMO- and LUMO-type molecular transistors based on the bias-mediated alignment between the frontier molecular orbitals and the Fermi level of single-layer graphene. Temperature-dependent measurements reveal that the charge transport mechanisms in the ON-state and OFF-state are dominated by hopping and tunneling, respectively. These devices exhibit unprecedented electrical performance, including ON/OFF ratios exceeding 10 4 at and above room temperature, stable operation over 100,000 cycles, and high fabrication yield exceeding 90%. Furthermore, they can be successfully combined to create high-fidelity logic gates, and assembled in dense, large-area arrays on 2-inch wafer, paving the way for their integration into next-generation integrated circuits. Beyond their practical applications, these novel molecular transistors serve as a versatile platform for investigating charge transport mechanisms and engineering novel electronic functionalities for next-generation nanotechnologies. Methods Chemical synthesis The detailed synthetic procedures along with the corresponding NMR and MS data are provided in Section S1. Device fabrication Silicon wafers (100, p-type) were from SiBranch, with a thickness of 525 ± 25 µm with one side polished and thick oxide layer of 280 nm. The wafer was cut into proper size and further cleaned for use. After a photolithographic process (MA8, SUSS MicroTec; photoresist: AZ601-46cp; spin-coating: 700 rpm 9 s, 4000 rpm, 45 s; baking: 80 ℃, 90 s; exposure: 10 s; developing: MF-319 Developer, 60s), we deposited 10 nm Cr and 50 nm Au to form source electrodes through thermal evaporation (KYKY-400, KYKY TECHNOLOGY CO.). After that, the photoresist was lifted off using hot acetone and the substrates were washed with acetone, isopropanol and deionized water. The residue was removed using oxygen plasma (SAT-9D, Saiaote Technology Co.). The substrate was then treated with atomic layer deposition (ALD-P-100B, SVT Associates, Inc.) to deposit 30 nm Al 2 O 3 layer. After a second photolithographic process, the substrates were baked under 120 ℃ and cleaned using oxygen plasma. The 5.0 µm Al 2 O 3 micropores were etched in BOE (28 ml 49% HF was added into 170 ml 40% NH 4 F aqueous solution) for 30 seconds and washed thoroughly with deionized water. The photoresist was removed following the same procedure. After the formation of the SAMs on exposed Au surfaces, a high-quality single-layer graphene (SLG) sheet was transferred onto the substrates, according to following procedures: SLG (Purchased from Nanjing MKNANO Tech. Co.) grown on copper films using CVD method was coated with PMMA layer. The copper layer was etched using 2.0% ammonium persulphate aqueous solution and washed with deionized water several times. Then the PMMA//SLG film was transferred on SAMs and dried in vacuum desiccators for several hours. After the removal of PMMA in hot acetone (50 ℃) for 3 hours, a photolithographic process and oxygen plasma etching, were used to pattern graphene sheets to cover the hole with SAMs at the center. After another photolithographic process, Cr/Au (10/50 nm) was thermally evaporated to make drain electrodes with connection to graphene sheets and gate electrodes. We dropped the ionic liquid onto the patch and conduct electrical measurements. The study emphasizes that the photolithographic process on samples with prepared Au-SAMs//SLG junctions required the baking temperature below 60 ℃, to prevent the fast photoresist hardening, which could potentially compromise the integrity of the prepared junctions. Preparation of SAMs The SAMs were prepared in a glove box to minimize the contaminations from air. As for HOMO-type SAMs, about 1.0 mg of pure compound was added into a vial, following the addition of 1.0 ml dry tetrahydrofuran. After the compound dissolved, 9.0 ml dry ethanol was then added to dilute the concentration. As for C 60 -SH, 0.2 mg compounds were dissolved in 5.0 ml toluene to produce slight pink solution. The solution was filtered and prepared substrate was immersed into it. The SAMs were formed for 24 hours under the atmosphere of N 2 . The substrate was rinsed thoroughly with corresponding solvent, and finally dried under a stream of nitrogen. Fabrication of STEM sample To determine the scale of Au-S-exTTF//SLG junction and characterize the structure of Al 2 O 3 micropores, we prepared the sample for scanning transmission electron microscope (STEM) imaging using a focused ion beam (FIB, Zeiss Auriga) apparatus. To avoid charging effect during FIB, we deposited 30 nm Au layer onto SLG in advance. The sample was cut by the FIB into slab with size of 8 µm in width, 5 µm in height, and 2 µm in thickness, followed by transferred onto a TEM sample holder by nanomanipulator (Oxford, Omniprobe 200). To make the sample thin enough (50–70 nm) for effective electron beam penetration during STEM imaging, it was subsequently milled with nanomilling. After the milling process was complete, the sample was transferred for imaging to a high-resolution scanning TEM (HRTEM) instrument (JEM-F200, JEOL). Electrical measurements The electrical measurements of molecular transistors are conducted with Agilent B2912. To make sure the stability of ionic liquid, nitrogen flows through the probe station. For logic gates measurements, Keithley 2182A NANOVOLTMETER was used to measure the output voltage. Declarations Data availability All the data supporting the findings are available within the article, its supporting information or from the corresponding authors upon request. Conflict of interest Authors declare no competing interests. Acknowledgements Y.X., Z.C. and Z.Z. contributed equally. This work was supported by the National Natural Science Foundation of China (52488101, 22273045) and Tsinghua University “Dushi” program. P.-A.C. and D.T. thank Research Ireland for financial support under Grant Number 12/RC/2275_P2 (SSPC), and for provision of computing resources at the Irish Centre for High-End Computing (ICHEC). References Mack CA (2011) Fifty years of Moore's law. IEEE Trans Semicond Manuf 24:202–207. https://doi.org/10.1109/TSM.2010.2096437 Zhao Y, Gobbi M, Hueso LE, Samori P (2022) Molecular approach to engineer two-dimensional devices for CMOS and beyond-CMOS applications. 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06:25:58","extension":"html","order_by":15,"title":"","display":"","copyAsset":false,"role":"acdc-reference","size":139562,"visible":true,"origin":"","legend":"","description":"","filename":"earlyproof.html","url":"https://assets-eu.researchsquare.com/files/rs-7595893/v1/8607116c3aa73d3a384c0886.html"},{"id":91815921,"identity":"e2ec5b16-b90c-47e4-bcd6-e29f1cc30541","added_by":"auto","created_at":"2025-09-22 06:33:58","extension":"png","order_by":1,"title":"Figure 1","display":"","copyAsset":false,"role":"figure","size":1587219,"visible":true,"origin":"","legend":"\u003cp\u003e\u003cstrong\u003eMolecular transistors using self-assembled monolayers (SAMs).\u003c/strong\u003e (a) The schematic concept of molecular transistors. (b) The schematic illustration of the molecular transistors relies on a vertically stacked architecture, where SAMs serve as the channel material, sandwiched between a gold source electrode and a SLG drain electrode. Ionic liquid acts as the gate dielectric. The electric field generated by the applied \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e penetrates through the SLG layer to electrostatically modulate the molecular energy levels, thereby enabling controlled switching of charge transport between the ON and OFF states. (c) HRTEM image shows sub-2 nm gap of Au-S-exTTF//SLG junction. (d) The chemical structures of thiol-functionalized molecules. (e) The energy level diagrams of the molecular junctions. The non-participatory, far-from-Fermi frontier energy levels of the control, highly insulating 1-octadecanethiol (SC\u003csub\u003e18\u003c/sub\u003e) SAMs are plotted for reference.\u003c/p\u003e","description":"","filename":"image1.png","url":"https://assets-eu.researchsquare.com/files/rs-7595893/v1/0bd141887978343f84ab9570.png"},{"id":91815579,"identity":"4b83c7f5-7c09-4850-85d1-48e4ffc52a77","added_by":"auto","created_at":"2025-09-22 06:25:57","extension":"png","order_by":2,"title":"Figure 2","display":"","copyAsset":false,"role":"figure","size":290622,"visible":true,"origin":"","legend":"\u003cp\u003e\u003cstrong\u003eFeatures of two-terminal junctions.\u003c/strong\u003e Electrical performance of \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e-\u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e for two-terminal molecular junctions comprising (a) Au-S-exTTF//SLG and (b) Au-S-C\u003csub\u003e60\u003c/sub\u003e//SLG. (c) Predicted transmission function for the Au-S-exTTF//SLG and Au-S-C\u003csub\u003e60\u003c/sub\u003e//SLG models, for \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e equals 0.5 V and -1.1 V respectively. (d) Computed \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e-\u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e characteristics for the two-terminal molecular junctions.\u003c/p\u003e","description":"","filename":"image2.png","url":"https://assets-eu.researchsquare.com/files/rs-7595893/v1/a061970f85c7b0a13c71569b.png"},{"id":91815595,"identity":"6d12b3d6-edbc-4cc8-8081-631241c81e9e","added_by":"auto","created_at":"2025-09-22 06:25:58","extension":"png","order_by":3,"title":"Figure 3","display":"","copyAsset":false,"role":"figure","size":667509,"visible":true,"origin":"","legend":"\u003cp\u003e\u003cstrong\u003eCharge transport through molecular transistors. \u003c/strong\u003e(a) Transfer and (b) output characteristics of exTTF-SH junctions, denoted as HOMO-type transistors. (c) Transfer and (d) output characteristics of C\u003csub\u003e60\u003c/sub\u003e-SH junctions, denoted as LUMO-type transistors. (e) The temperature-dependent transfer characteristics for HOMO-type transistors and (f) corresponding Arrhenius plots of log|\u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e| at ON and OFF state. (g) The temperature-dependent transfer characteristics for LUMO-type transistors and (h) corresponding Arrhenius plots of log|\u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e| at ON and OFF state. (i) The energy level diagram for HOMO- and LUMO-type transistors at ON state and OFF state. (j) Benchmarking the performance of previously reported molecular transistors and this work. \u003csup\u003e6,15,17,20,21,35-42\u003c/sup\u003e\u003c/p\u003e","description":"","filename":"image3.png","url":"https://assets-eu.researchsquare.com/files/rs-7595893/v1/b44103d20b4cf050718dbeb4.png"},{"id":91815581,"identity":"e1d8d69b-7952-4559-af8d-905c20f4170a","added_by":"auto","created_at":"2025-09-22 06:25:57","extension":"png","order_by":4,"title":"Figure 4","display":"","copyAsset":false,"role":"figure","size":738992,"visible":true,"origin":"","legend":"\u003cp\u003e\u003cstrong\u003eApplications of molecular transistors.\u003c/strong\u003e (a) Schematic wiring diagram of switching cycle measurements under AC mode, using square wave with magnitude of 3.0 V and frequency of 10 Hz. Output logics for (b) NOT, (c) NOR and (d) NAND gate implemented with HOMO-type molecular transistors, with driving voltage \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003edd\u003c/em\u003e\u003c/sub\u003e = -0.1 V, input voltage \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003ein,0\u003c/em\u003e\u003c/sub\u003e = 0 V and \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003ein,1\u003c/em\u003e\u003c/sub\u003e = -3V. (e) Illustration of combination of HOMO- and LUMO-type transistors to create NOT gate.\u003c/p\u003e","description":"","filename":"image4.png","url":"https://assets-eu.researchsquare.com/files/rs-7595893/v1/2b1665b50977016e818d6c0e.png"},{"id":91815582,"identity":"c7e99f8d-c65d-4678-8885-5f79489ae8e8","added_by":"auto","created_at":"2025-09-22 06:25:57","extension":"png","order_by":5,"title":"Figure 5","display":"","copyAsset":false,"role":"figure","size":1837925,"visible":true,"origin":"","legend":"\u003cp\u003e\u003cstrong\u003eIntegrated molecular transistors and benchmark for functional molecular devices. \u003c/strong\u003e(a) Photograph of batch-fabricated molecular junctions on 2-inch wafer. (b) Optical microscopy image of an individual cell with dropped ionic liquid and the wiring diagram. (c) The performance of 36 molecular transistors in a cell. (d) Transfer characteristics of 200 randomly selected HOMO-type molecular transistors (\u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e = 0.1 V), and (e) the corresponding distribution of ON/OFF ratio. (f) Benchmarking the integration and yield of our molecular transistors with other functional molecular devices, including molecular diodes, molecular memories and molecular transistors.\u003csup\u003e38,51-55\u003c/sup\u003e\u003c/p\u003e","description":"","filename":"image5.png","url":"https://assets-eu.researchsquare.com/files/rs-7595893/v1/4ff64191b0a227271df8730a.png"},{"id":91816498,"identity":"c62f66f1-49b9-4d04-81c6-8765ca9ec0b4","added_by":"auto","created_at":"2025-09-22 06:42:06","extension":"pdf","order_by":0,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":5682207,"visible":true,"origin":"","legend":"","description":"","filename":"manuscript.pdf","url":"https://assets-eu.researchsquare.com/files/rs-7595893/v1/b2a74195-7633-4e1f-abba-e15bf144135c.pdf"},{"id":91815592,"identity":"14d8cd32-bbfb-4d3d-ae65-92c9c6ffad76","added_by":"auto","created_at":"2025-09-22 06:25:58","extension":"docx","order_by":1,"title":"","display":"","copyAsset":false,"role":"supplement","size":6911693,"visible":true,"origin":"","legend":"SI-High-performance Microelectronic-integratable Molecular Transistor","description":"","filename":"supportinginformation.docx","url":"https://assets-eu.researchsquare.com/files/rs-7595893/v1/837c88a6f45015e7796cc8bc.docx"}],"financialInterests":"There is \u003cb\u003eNO\u003c/b\u003e Competing Interest.","formattedTitle":"High-performance Microelectronic-integratable Molecular Transistor","fulltext":[{"header":"Introduction","content":"\u003cp\u003eCo-innovation of microelectronic fabrication processes and high-performance materials advanced CMOS (complementary metal\u0026ndash;oxide\u0026ndash;semiconductor) technology in the past decades.\u003csup\u003e\u003cspan citationid=\"CR1\" class=\"CitationRef\"\u003e1\u003c/span\u003e\u003c/sup\u003e The current drive to sub-5-nm transistors, approaching the molecular dimension, introduces new engineering and scientific challenges for traditional materials, requiring bespoke ultra-miniaturized processing, expensive additives and stabilizer materials, and harnessing of quantum charge tunneling mechanisms.\u003csup\u003e\u003cspan citationid=\"CR2\" class=\"CitationRef\"\u003e2\u003c/span\u003e,\u003cspan citationid=\"CR3\" class=\"CitationRef\"\u003e3\u003c/span\u003e\u003c/sup\u003e Utilizing molecular junctions shrinks the dimension of electronics directly below 2-nm, simplifying the fabrication process, providing opportunities for tailoring device performance and introducing novel functionalities through chemical design.\u003csup\u003e\u003cspan citationid=\"CR4\" class=\"CitationRef\"\u003e4\u003c/span\u003e,\u003cspan citationid=\"CR5\" class=\"CitationRef\"\u003e5\u003c/span\u003e\u003c/sup\u003e Thus, the creation of high-performance molecular transistors that are integratable with conventional nanofabrication processes and that present high ON/OFF ratios is a key goal for the realization of miniaturized, low-power integrated circuits.\u003csup\u003e\u003cspan citationid=\"CR6\" class=\"CitationRef\"\u003e6\u003c/span\u003e,\u003cspan citationid=\"CR7\" class=\"CitationRef\"\u003e7\u003c/span\u003e\u003c/sup\u003e To date, this goal has been hampered by the generally low yield of standard fabrication strategies and variable performance of molecular junctions, as well as poor stability and reproducibility of molecular transistors that rely on molecular orbital gating at cryo-temperatures\u003csup\u003e\u003cspan additionalcitationids=\"CR9\" citationid=\"CR8\" class=\"CitationRef\"\u003e8\u003c/span\u003e\u0026ndash;\u003cspan citationid=\"CR10\" class=\"CitationRef\"\u003e10\u003c/span\u003e\u003c/sup\u003e or conformational changes under external stimuli.\u003csup\u003e\u003cspan citationid=\"CR11\" class=\"CitationRef\"\u003e11\u003c/span\u003e,\u003cspan citationid=\"CR12\" class=\"CitationRef\"\u003e12\u003c/span\u003e\u003c/sup\u003e Nanoscale effects including surface defects, Fermi-level (E\u003csub\u003eF\u003c/sub\u003e) pinning and poor contacting geometries, further degrade performance.\u003csup\u003e\u003cspan citationid=\"CR13\" class=\"CitationRef\"\u003e13\u003c/span\u003e\u003c/sup\u003e In addition, most molecular transistors reported to-date are implemented through single-molecule junctions (Table \u003cspan refid=\"MOESM1\" class=\"InternalRef\"\u003eS1\u003c/span\u003e) which are ill-suited to large-area integration and show large device-to-device variability.\u003c/p\u003e\u003cp\u003eSelf-assembled monolayers (SAMs), in which bottom-up supramolecular packing spontaneously generates large-area, ordered structures, offer mature and reliable technology for molecular electronics, with scalable production, high-yield and CMOS-compatibility.\u003csup\u003e\u003cspan citationid=\"CR14\" class=\"CitationRef\"\u003e14\u003c/span\u003e\u003c/sup\u003e However, the classic sandwich structure that confines functional SAMs between top and bottom electrodes hinders gate regulation of molecular orbitals by external electrical field.\u003csup\u003e\u003cspan citationid=\"CR4\" class=\"CitationRef\"\u003e4\u003c/span\u003e,\u003cspan additionalcitationids=\"CR16\" citationid=\"CR15\" class=\"CitationRef\"\u003e15\u003c/span\u003e\u0026ndash;\u003cspan citationid=\"CR17\" class=\"CitationRef\"\u003e17\u003c/span\u003e\u003c/sup\u003e While side, central, and top gates have been demonstrated for SAMs-based transistors, side and central gate regulation is cumbersome.\u003csup\u003e\u003cspan citationid=\"CR4\" class=\"CitationRef\"\u003e4\u003c/span\u003e\u003c/sup\u003e Fortunately, efficient top gating of SAMs can be achieved employing single-layer graphene (SLG) top electrode to construct damage-free molecular junctions,\u003csup\u003e18,19\u003c/sup\u003e with a gate dielectric placed on SLG providing electric gating.\u003csup\u003e\u003cspan citationid=\"CR20\" class=\"CitationRef\"\u003e20\u003c/span\u003e,\u003cspan citationid=\"CR21\" class=\"CitationRef\"\u003e21\u003c/span\u003e\u003c/sup\u003e\u003c/p\u003e\u003cp\u003eHere, we employ molecular tunnel junctions formed by Au-SAMs//SLG sandwich structure. Both HOMO- (exTTF-SH, π-extended analog of tetrathiafulvalene) and LUMO-type (C\u003csub\u003e60\u003c/sub\u003e-SH, fullerene derivative) SAMs are employed to obtain different molecular transistors (Fig.\u0026nbsp;\u003cspan refid=\"Fig1\" class=\"InternalRef\"\u003e1\u003c/span\u003ed), in analogy to p- and n-type silicon-based transistors. Ionic liquid placed above the SLG provides the third electrode (gate) to tune the alignment of the frontier molecular orbitals with respect to the Fermi level (E\u003csub\u003eF\u003c/sub\u003e) of the SLG. The close match in energy between the molecular orbital participating in charge transport, \u003cem\u003ei.e\u003c/em\u003e., the electron donor HOMO (exTTF-SH) or electron acceptor LUMO (C\u003csub\u003e60\u003c/sub\u003e-SH), and the E\u003csub\u003eF\u003c/sub\u003e of SLG enables efficient molecular orbital gating at and above room temperature in the SAMs-based transistors. The resulting vertical molecular transistors, just 1.5-nm thick, achieve unprecedented electrical performance, exhibiting ON/OFF ratios\u0026thinsp;\u0026gt;\u0026thinsp;10\u003csup\u003e4\u003c/sup\u003e at elevated, working CPU temperature.\u003c/p\u003e"},{"header":"Results","content":"\u003cdiv id=\"Sec3\" class=\"Section2\"\u003e\u003ch2\u003eVertical molecular transistors\u003c/h2\u003e\u003cp\u003eWe utilized the concept of vertical molecular transistors (Fig.\u0026nbsp;\u003cspan refid=\"Fig1\" class=\"InternalRef\"\u003e1\u003c/span\u003ea-b), where the channel consists of SAMs chemically-bound to the Au bottom electrode and physically-contacted to the top SLG.\u003csup\u003e\u003cspan additionalcitationids=\"CR21\" citationid=\"CR20\" class=\"CitationRef\"\u003e20\u003c/span\u003e\u0026ndash;\u003cspan citationid=\"CR22\" class=\"CitationRef\"\u003e22\u003c/span\u003e\u003c/sup\u003e Thiol-functionalized molecules formed well-packed SAMs to serve as the channel material, featuring functional groups with strategically-positioned frontier orbitals, specifically exTTF-SH HOMO and C\u003csub\u003e60\u003c/sub\u003e-SH LUMO.\u003csup\u003e\u003cspan citationid=\"CR23\" class=\"CitationRef\"\u003e23\u003c/span\u003e,\u003cspan citationid=\"CR24\" class=\"CitationRef\"\u003e24\u003c/span\u003e\u003c/sup\u003e To control the contact area and minimize contact defects between the SAMs and the SLG, patterned Al\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e3\u003c/sub\u003e insulator was used to separate SLG from Au electrodes, with micropores created in the Al\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e3\u003c/sub\u003e layer to host the SAMs. After forming Au-SAMs//SLG, ionic liquid [DEME]\u003csup\u003e+\u003c/sup\u003e[TFSI]\u003csup\u003e\u0026minus;\u003c/sup\u003e (N,N-diethyl-N-methyl-N-(2-methoxyethyl)ammonium bis(trifluoromethylsulfonyl)imide) was dropped on the SLG. Upon applying a gate voltage \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e, redistribution of charge in the ionic liquid generates strong electric field (only partially screened by SLG) in the SAMs, providing the transistor conductance switching by orbital gating. The detailed fabrication flow is depicted in Methods and Section S3.\u003c/p\u003e\u003cp\u003eThe design of the SLG-based gates of our molecular transistors was inspired by the work of Duan and collaborators,\u003csup\u003e21\u003c/sup\u003e an approach that we have extrapolated to resolve the long-standing scalability and large-area integration challenge in molecular electronics.\u003csup\u003e\u003cspan citationid=\"CR25\" class=\"CitationRef\"\u003e25\u003c/span\u003e\u003c/sup\u003e To characterize the cross-sectional scale of the Au-S-exTTF//SLG junctions, we deposited a final topcoat of 30 nm Au and then cut a slab around the edge of the Al\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e3\u003c/sub\u003e micropore using focused ion beam. High-resolution transmission electron microscopy (HRTEM) confirmed a well-defined 1.5-nm gap between the two Au layers (Fig.\u0026nbsp;\u003cspan refid=\"Fig1\" class=\"InternalRef\"\u003e1\u003c/span\u003ec), consistent with the thickness of the SAM, confirming that the channel length in our molecular transistor is sub-2nm.\u003c/p\u003e\u003cp\u003e\u003c/p\u003e\u003c/div\u003e\n\u003ch3\u003eFeatures of Au-SAM//graphene two-terminal junctions\u003c/h3\u003e\n\u003cp\u003eThe chemical design and energy level diagrams of the HOMO- and LUMO-type molecular junctions are shown in Fig.\u0026nbsp;\u003cspan refid=\"Fig1\" class=\"InternalRef\"\u003e1\u003c/span\u003ed-e. The positions of the frontier orbitals are determined from photoelectron spectroscopy and UV-vis absorption spectra (Section S3), and matched well with density functional theory (DFT) calculations. The HOMO of Au-S-exTTF (-4.91 eV) and the LUMO of Au-S-C\u003csub\u003e60\u003c/sub\u003e (-4.33 eV) sit close to the Fermi level of SLG (E\u003csub\u003eF\u003c/sub\u003e = -4.5 eV).\u003c/p\u003e\u003cp\u003eFirst, we measured the two-terminal charge transport characteristics (\u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e\u003cem\u003e-V\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e) of Au-S-exTTF//SLG and Au-S-C\u003csub\u003e60\u003c/sub\u003e//SLG junctions. For Au-S-exTTF//SLG, the asymmetric \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e-\u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e characteristics, as visualized in the heatmap generated from over 700 traces, demonstrate that \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e(+\u0026thinsp;1.0 V) is 3\u0026times; higher than \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e(-1.0 V) (Fig.\u0026nbsp;\u003cspan refid=\"Fig2\" class=\"InternalRef\"\u003e2\u003c/span\u003ea, Fig.S13). The trend is reversed for Au-S-C\u003csub\u003e60\u003c/sub\u003e//SLG, where \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e(-1.5 V) is two orders of magnitude higher than \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e(+\u0026thinsp;1.5 V), suggesting involvement of different molecular orbitals in charge transport for the two molecules (Fig.\u0026nbsp;\u003cspan refid=\"Fig2\" class=\"InternalRef\"\u003e2\u003c/span\u003eb).\u003csup\u003e\u003cspan citationid=\"CR23\" class=\"CitationRef\"\u003e23\u003c/span\u003e,\u003cspan citationid=\"CR26\" class=\"CitationRef\"\u003e26\u003c/span\u003e,\u003cspan citationid=\"CR27\" class=\"CitationRef\"\u003e27\u003c/span\u003e\u003c/sup\u003e To verify the charge transport mechanism, we conducted temperature-dependent measurements on Au-S-exTTF//SLG. It shows clear temperature-dependent charge transport behavior with an exponential decay in current, indicating electron hopping via frontier molecular orbitals (Fig.S14).\u003csup\u003e\u003cspan citationid=\"CR28\" class=\"CitationRef\"\u003e28\u003c/span\u003e\u003c/sup\u003e\u003c/p\u003e\u003cp\u003eTo gain further insight into the charge transport features, we performed charge transport calculations with DFTB\u0026thinsp;+\u0026thinsp;software,\u003csup\u003e29\u003c/sup\u003e based on Non-Equilibrium Green Function (NEGF)\u003csup\u003e\u003cspan citationid=\"CR30\" class=\"CitationRef\"\u003e30\u003c/span\u003e\u003c/sup\u003e approach combined with Density Functional-based Tight Binding (DFTB) models\u003csup\u003e\u003cspan additionalcitationids=\"CR32\" citationid=\"CR31\" class=\"CitationRef\"\u003e31\u003c/span\u003e\u0026ndash;\u003cspan citationid=\"CR33\" class=\"CitationRef\"\u003e33\u003c/span\u003e\u003c/sup\u003e for the electronic structures of the exTTF-SH and C\u003csub\u003e60\u003c/sub\u003e-SH junctions (Fig.S29). Computed transmission functions (Fig.\u0026nbsp;\u003cspan refid=\"Fig2\" class=\"InternalRef\"\u003e2\u003c/span\u003ec) show the unoccupied conduction levels of C\u003csub\u003e60\u003c/sub\u003e-SH shifted to similar energy as exTTF-SH occupied valence levels, reflecting the transmission process in the near-Fermi bias windows of the junctions. Computed \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e-\u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e characteristics for the two-terminal molecular junction exhibit similar asymmetry features to those observed in the experimental data (Fig.\u0026nbsp;\u003cspan refid=\"Fig2\" class=\"InternalRef\"\u003e2\u003c/span\u003ed). Thus, we conclude that the HOMO of exTTF-SH and LUMO of C\u003csub\u003e60\u003c/sub\u003e-SH participate in the charge transport, which makes it possible for gate voltage \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e to shift their positions and regulate the channel conductance.\u003c/p\u003e\u003cp\u003e\u003c/p\u003e\n\u003ch3\u003eFeatures of HOMO- and LUMO-type molecular transistors\u003c/h3\u003e\n\u003cp\u003eTo sample the transistor response of our SAMs-based junctions, a gate voltage \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e was applied to the ionic liquid on top of SLG. The transfer characteristics, reflecting the current (\u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e) regulation through \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e, are used to evaluate the performance of the transistors. Two distinct transfer characteristics emerge in the molecular transistors, reflecting the contrasting electronic structures of Au-S-exTTF//SLG and Au-S-C\u003csub\u003e60\u003c/sub\u003e//SLG. For Au-S-exTTF//SLG, the transfer characteristics exhibit strongest increase in \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e when gate voltage \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e is negative (measured up to -3.0 V), with negligible increase for positive gate values (Fig.\u0026nbsp;\u003cspan refid=\"Fig3\" class=\"InternalRef\"\u003e3\u003c/span\u003ea). The situation reserves for the Au-S-C\u003csub\u003e60\u003c/sub\u003e transistors, where strongest enhancement of current magnitude is achieved at positive \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e (Fig.\u0026nbsp;\u003cspan refid=\"Fig3\" class=\"InternalRef\"\u003e3\u003c/span\u003ec). This allows their classification as HOMO- and LUMO-type molecular transistors, in direct analogy to the standard p- and n-type semiconductor transistors. Transfer characteristics of the HOMO- and LUMO-type molecular transistors at \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e \u0026gt;0 (Fig.S16) demonstrate similar trend compared with \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e \u0026lt; 0. Figure\u0026nbsp;\u003cspan refid=\"Fig2\" class=\"InternalRef\"\u003e2\u003c/span\u003eb, d shows typical output characteristics (\u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e-\u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e) of Au-S-exTTF and Au-S-C\u003csub\u003e60\u003c/sub\u003e as \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e is varied between \u0026minus;\u0026thinsp;3.0 and 3.0 V, with all molecular transistors exhibiting nonlinear output characteristics across all gate voltages. As \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e in Au-S-exTTF is varied from 0 to -3.0 V, \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e rises exponentially with \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e and is lack of saturation. These measurements confirm that the SAMs, as the tunneling barrier in molecular junctions, drive short-channel effects.\u003csup\u003e\u003cspan citationid=\"CR17\" class=\"CitationRef\"\u003e17\u003c/span\u003e\u003c/sup\u003e\u003c/p\u003e\u003cp\u003eThe relative alignment between the frontier molecular orbitals and the E\u003csub\u003eF\u003c/sub\u003e of the SLG is the determining factor for the distinct behaviors. Specifically, the HOMO of Au-S-exTTF lies 0.41 eV below E\u003csub\u003eF\u003c/sub\u003e, whereas the LUMO of Au-S-C\u003csub\u003e60\u003c/sub\u003e sits 0.17 eV above E\u003csub\u003eF\u003c/sub\u003e, both within the electrostatic window of SLG. The alignment of the HOMO or LUMO requires opposite \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e polarities to bring the respective orbital into the conduction window, thereby modulating \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e in distinctive ways and providing a means for creation of future p-n molecular transistor junctions, \u003cem\u003ee.g\u003c/em\u003e., heterostructures composed of both HOMO- and LUMO-type SAM-based junctions spaced by SLG layers.\u003c/p\u003e\u003cp\u003eTo validate the universality of the molecular transistor design presented in this work, we tested two additional SAMs, including Fc-SH (ferrocene derivative) and PDI-SH (perylene diimides derivative) (Fig.S19). As shown in Sections S3, Fc-SH, with near-E\u003csub\u003eF\u003c/sub\u003e HOMO at -4.97 eV, exhibits a HOMO-type transistor response similar to exTFF-SH, while PDI-SH, with near-E\u003csub\u003eF\u003c/sub\u003e LUMO at -3.95 eV, shows the similar characteristics as C\u003csub\u003e60\u003c/sub\u003e-SH. As a negative control, SC\u003csub\u003e18\u003c/sub\u003e (1-octadecanethiol) with frontier orbitals energetically-distant (\u0026gt;\u0026thinsp;2 eV) from E\u003csub\u003eF\u003c/sub\u003e showed extremely poor ON/OFF transistor ratios around 10 (Fig.S20, see also SAMs-less devices in Fig.S21).\u003csup\u003e\u003cspan citationid=\"CR34\" class=\"CitationRef\"\u003e34\u003c/span\u003e\u003c/sup\u003e\u003c/p\u003e\u003cp\u003e\u003c/p\u003e\n\u003ch3\u003eOperating mechanisms of the molecular transistors\u003c/h3\u003e\n\u003cp\u003eCompared to conductance changes induced by conformational adjustments or chemical reactions, regulating molecular orbitals in molecular transistors by all-electrical means offers a universal and practical approach. However, a key obstacle for deployment of high-performance molecular transistors is their degradation at ambient and elevated temperatures. The inherent orbital level broadening at and above ambient temperature makes it exceedingly difficult to regulate the current response using gate voltages.\u003csup\u003e\u003cspan citationid=\"CR43\" class=\"CitationRef\"\u003e43\u003c/span\u003e,\u003cspan citationid=\"CR44\" class=\"CitationRef\"\u003e44\u003c/span\u003e\u003c/sup\u003e The vertical architecture of the molecular junctions in this study utilizes asymmetrically-positioned functional groups, separated by insulating aliphatic linker groups from the Au substrate to prevent hybridization, and capped by the SLG top electrode, which acts as a protecting layer against degradation and minimizes energy level broadening mediated by the SLG\u0026ndash;SAMs steric, van der Waals interaction, enabling effective gating at elevated temperature.\u003csup\u003e\u003cspan citationid=\"CR22\" class=\"CitationRef\"\u003e22\u003c/span\u003e,\u003cspan citationid=\"CR26\" class=\"CitationRef\"\u003e26\u003c/span\u003e\u003c/sup\u003e\u003c/p\u003e\u003cp\u003eWe performed temperature-dependent measurements to elucidate the operational mechanisms of the molecular transistors. Electron transport in Au-S-exTTF//SLG was measured over 230\u0026ndash;350 K, with \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e fixed at +\u0026thinsp;0.5 V to ensure stable ON and OFF currents during measurements (Fig.\u0026nbsp;\u003cspan refid=\"Fig3\" class=\"InternalRef\"\u003e3\u003c/span\u003ee-f). \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e presents markedly-different temperature dependencies at different \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e values. The charge transport mechanism at \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e\u0026thinsp;=\u0026thinsp;+\u0026thinsp;0.5 V with \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e=0 V is hopping (Fig.S14). For negative gate voltages, the molecular transistor operates in the ON-state and log|\u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e| exhibits linear decrease with inverse temperature (Fig.\u0026nbsp;\u003cspan refid=\"Fig3\" class=\"InternalRef\"\u003e3\u003c/span\u003ee). The extracted Arrhenius activation energy (\u003cem\u003eE\u003c/em\u003e\u003csub\u003e\u003cem\u003ea\u003c/em\u003e\u003c/sub\u003e) for electron hopping is \u003cem\u003eE\u003c/em\u003e\u003csub\u003e\u003cem\u003ea\u003c/em\u003e\u003c/sub\u003e=61.21 meV, close to reported values (71.97 meV),\u003csup\u003e24\u003c/sup\u003e and confirming that electron transport in the ON-state occurs by hopping (Fig.\u0026nbsp;\u003cspan refid=\"Fig3\" class=\"InternalRef\"\u003e3\u003c/span\u003ei). When setting positive \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e, the molecular transistor operates in the OFF-state and \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e remains near-constant with decreasing temperature, consistent with activationless tunneling (Fig.\u0026nbsp;\u003cspan refid=\"Fig3\" class=\"InternalRef\"\u003e3\u003c/span\u003ef).\u003c/p\u003e\u003cp\u003eTemperature-dependent measurements on Au-S-C\u003csub\u003e60\u003c/sub\u003e//SLG transistors also showed distinct charge transport mechanisms for the ON-state and OFF-state (Fig.\u0026nbsp;\u003cspan refid=\"Fig3\" class=\"InternalRef\"\u003e3\u003c/span\u003eg-h). At \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e\u0026thinsp;=\u0026thinsp;+\u0026thinsp;3.0 V (ON-state) the charge transport is governed by temperature-dependent hopping mechanism displaying an Arrhenius behavior of the current, whereas at \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e=-3.0 V (OFF-state), it is governed by a temperature-independent tunneling mechanism. The corresponding activation energy is 148 meV, about 2 times larger than the values reported for two terminal fullerene molecular junctions (69 meV).\u003csup\u003e\u003cspan citationid=\"CR45\" class=\"CitationRef\"\u003e45\u003c/span\u003e\u003c/sup\u003e This observation indicates that LUMO-type transistors also adhere to the operating principle of transitioning from a tunneling-dominated mechanism in the OFF-state to a hopping-dominated mechanism in the ON-state.\u003c/p\u003e\u003cp\u003eThe most important finding from the temperature-dependent measurements is that the charge transport mechanisms are highly dependent on the energy level alignment between molecular orbitals and the E\u003csub\u003eF\u003c/sub\u003e of SLG. Specifically, the hopping mechanism occurs when the molecular orbitals enter the conduction window, while the tunneling mechanism dominates when the molecular orbitals lie outside the conduction window. At a fixed \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e, the charge transport mechanism in the molecular transistors transitions from tunneling to hopping as the \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003egs\u003c/em\u003e\u003c/sub\u003e shifts the respective HOMO and LUMO orbitals, corresponding to a switch from the OFF-state to the ON-state (Fig.\u0026nbsp;\u003cspan refid=\"Fig3\" class=\"InternalRef\"\u003e3\u003c/span\u003ei). Moreover, the operating mechanism relies on energy level shifts under a gate voltage, rather than requiring conformational changes or chemical reactions. This characteristic enables their potential for fast, all-electrical and stable operation at and above room temperature. Figure\u0026nbsp;\u003cspan refid=\"Fig3\" class=\"InternalRef\"\u003e3\u003c/span\u003ej benchmarks the high performance and operation temperature of our transistors against previously reported molecular transistors, while Table \u003cspan refid=\"MOESM1\" class=\"InternalRef\"\u003eS1\u003c/span\u003e summarizes the corresponding features, with the current molecular transistors showing state-of-the-art performance across the operating temperature range of modern computing systems with working CPU temperatures of ~\u0026thinsp;310\u0026ndash;350K. The HOMO-type transistors achieve high performance at 350K, with ON/OFF ratios exceeding 10\u003csup\u003e4\u003c/sup\u003e, the highest reported to date for molecular transistors operating at or above room temperature, and only surpassed overall by quantum interference single-molecule tunneling junctions transistors requiring temperatures lower than 100 K. Similarly, the LUMO-type transistors exhibit a near 10\u003csup\u003e4\u003c/sup\u003e ON/OFF ratio at 330 K (Fig.S17-18). These results mark a significant advancement in the performance of molecular transistors and pave the way for their integration into practical electronics.\u003c/p\u003e\n\u003ch3\u003eApplications of molecular transistors\u003c/h3\u003e\n\u003cp\u003eTo demonstrate the cycling stability of molecular transistors, we recorded over 100,000 switching cycles for the HOMO-type transistors, which has not been realized to-date under room temperature for any other molecular transistor.\u003csup\u003e\u003cspan citationid=\"CR35\" class=\"CitationRef\"\u003e35\u003c/span\u003e\u003c/sup\u003e The schematic wiring diagram for the switching cycle measurements under AC mode (Fig.\u0026nbsp;\u003cspan refid=\"Fig5\" class=\"InternalRef\"\u003e4\u003c/span\u003ea) utilizes a square wave with an absolute amplitude of 3.0 V and a frequency of 10 Hz. Owing to the SLG layer, the device exhibits excellent air stability, enabling the ON-current of the HOMO-type transistor to be maintained for over 30 days (Fig. S27).\u003c/p\u003e\u003cp\u003eTo our knowledge, there are also no examples to-date of the creation of proof-of-concept logic gates with voltage output implemented with molecular transistors.\u003csup\u003e\u003cspan citationid=\"CR46\" class=\"CitationRef\"\u003e46\u003c/span\u003e,\u003cspan citationid=\"CR47\" class=\"CitationRef\"\u003e47\u003c/span\u003e\u003c/sup\u003e Here, we used an individual HOMO-type transistor to implement a NOT gate (Fig.\u0026nbsp;\u003cspan refid=\"Fig5\" class=\"InternalRef\"\u003e4\u003c/span\u003eb) and combined two of these transistors to achieve NOR and NAND gates (Fig.\u0026nbsp;\u003cspan refid=\"Fig5\" class=\"InternalRef\"\u003e4\u003c/span\u003ec-d). The wiring diagram is shown in Fig.S26. For the individual-transistor NOT gate, the drive voltage (\u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003edd\u003c/em\u003e\u003c/sub\u003e) is fixed at -0.1 V, while the input signal \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003ein\u003c/em\u003e\u003c/sub\u003e is the \u003cb\u003e1\u003c/b\u003e-state at -3.0 V and \u003cb\u003e0\u003c/b\u003e-state at 0 V. While the output voltage demonstrates clear logic operation (Fig.\u0026nbsp;\u003cspan refid=\"Fig5\" class=\"InternalRef\"\u003e4\u003c/span\u003eb), the significant disparity between the magnitudes of the drive voltage and the input signal poses a challenge for implementing more complex logic operations. Furthermore, the functionality of these molecular logic gates is dependent on external load resistors, which limits their practical application. To overcome this limitation, we fabricated an on-chip combination of HOMO- and LUMO-type transistors to create the complementary NOT gate (Fig.\u0026nbsp;\u003cspan refid=\"Fig5\" class=\"InternalRef\"\u003e4\u003c/span\u003ee). In this case, the \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003edd\u003c/em\u003e\u003c/sub\u003e of the NOT gate is -2.0 V. The combination of the two types of molecular transistors improves the output logic levels to -1.2 V at \u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003ein\u003c/em\u003e\u003c/sub\u003e\u0026thinsp;=\u0026thinsp;+\u0026thinsp;2.0 V, which is a substantial improvement compared with the gates implemented only with HOMO-type transistors. Moreover, this gate operates without the need for external resistors, significantly enhancing its integration potential and simplifying the circuit design.\u003c/p\u003e\u003cp\u003e\u003c/p\u003e\u003cdiv id=\"Sec8\" class=\"Section2\"\u003e\u003ch2\u003eWafer-scale integration\u003c/h2\u003e\u003cp\u003eAs shown in Fig.\u0026nbsp;5a, we have advanced the individual transistor design towards ~\u0026thinsp;8,000 molecular transistors on 2-inch wafer using industry-compatible microfabrication techniques. Nonlinear \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e\u0026ndash;\u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e curves indicate the proper contact between electrodes and SAMs while linear curves would indicate that the top and bottom electrode are shorted. We determined the yield of integrated molecular junctions through the proportion of nonlinear \u003cem\u003eI\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e\u0026ndash;\u003cem\u003eV\u003c/em\u003e\u003csub\u003e\u003cem\u003eds\u003c/em\u003e\u003c/sub\u003e, which yields 94.8% in our case (Table S4, Fig.S23). We measured the 36 molecular transistors in an individual cell and they all exhibited high ON/OFF ratios (Fig.\u0026nbsp;5b, c). Note that the molecular transistors in an individual cell are controlled by a common gate, which can be applied directly through a metallic probe or cross marker, which hinders the further high-density integration. This can be resolved by an integration scheme that includes individually-addressable solid dielectric gates to substitute the ionic liquid, which can be achieved, for example, with superionic fluoride dielectrics.\u003csup\u003e\u003cspan citationid=\"CR48\" class=\"CitationRef\"\u003e48\u003c/span\u003e\u003c/sup\u003e The measured transfer characteristics of 200 randomly-selected HOMO-type molecular transistors (Fig.\u0026nbsp;5d, Fig.S24-25) showed the ideal switching behavior collected from four different patches. The log(ON/OFF) values exhibit a tight normal distribution, with mean of 4660 and standard deviation of 14 (Fig.\u0026nbsp;5e). To benchmark the integration and yield of the functional molecular transistor devices, we profiled functional molecular diodes, molecular memories and molecular transistors, with variable fabrication techniques (Fig.\u0026nbsp;5f, Table S2). Mass production has not been achieved to-date for functional molecular devices with complex fabrication flows. The most promising approach so far is using PEDOT: PSS, gold nanoparticle or deposited carbon as non-invasive top electrode, which enables high-yield (\u0026gt;\u0026thinsp;99%) and high integration (\u0026gt;\u0026thinsp;10,000) molecular junction fabrication, but fails to exhibit high functionality due to imperfect interfaces.\u003csup\u003e\u003cspan citationid=\"CR14\" class=\"CitationRef\"\u003e14\u003c/span\u003e,\u003cspan citationid=\"CR49\" class=\"CitationRef\"\u003e49\u003c/span\u003e,\u003cspan citationid=\"CR50\" class=\"CitationRef\"\u003e50\u003c/span\u003e\u003c/sup\u003e Due to their restricted utility in functional molecular devices, these molecular junctions are overlooked in the benchmark. In this work, we filled the gap in high-integration and high-yield of high-performance functional molecular transistors using industry-compatible microfabrication flows.\u003c/p\u003e\u003cp\u003e\u003c/p\u003e\u003c/div\u003e"},{"header":"Conclusion","content":"\u003cp\u003e\u003cdiv class=\"BlockQuote\"\u003e\u003cp\u003eThis study demonstrates high-performance molecular transistors with a vertical configuration, utilizing SAMs as the channel material. The drain current is effectively modulated through the energy level alignment of molecular orbitals, enabling the classification of HOMO- and LUMO-type molecular transistors based on the bias-mediated alignment between the frontier molecular orbitals and the Fermi level of single-layer graphene. Temperature-dependent measurements reveal that the charge transport mechanisms in the ON-state and OFF-state are dominated by hopping and tunneling, respectively. These devices exhibit unprecedented electrical performance, including ON/OFF ratios exceeding 10\u003csup\u003e4\u003c/sup\u003e at and above room temperature, stable operation over 100,000 cycles, and high fabrication yield exceeding 90%. Furthermore, they can be successfully combined to create high-fidelity logic gates, and assembled in dense, large-area arrays on 2-inch wafer, paving the way for their integration into next-generation integrated circuits. Beyond their practical applications, these novel molecular transistors serve as a versatile platform for investigating charge transport mechanisms and engineering novel electronic functionalities for next-generation nanotechnologies.\u003c/p\u003e\u003c/div\u003e\u003c/p\u003e"},{"header":"Methods","content":"\u003cdiv id=\"Sec11\" class=\"Section2\"\u003e\u003ch2\u003eChemical synthesis\u003c/h2\u003e\u003cp\u003e\u003cdiv class=\"BlockQuote\"\u003e\u003cp\u003eThe detailed synthetic procedures along with the corresponding NMR and MS data are provided in Section S1.\u003c/p\u003e\u003c/div\u003e\u003c/p\u003e\u003c/div\u003e\u003cdiv id=\"Sec12\" class=\"Section2\"\u003e\u003ch2\u003eDevice fabrication\u003c/h2\u003e\u003cp\u003eSilicon wafers (100, p-type) were from SiBranch, with a thickness of 525\u0026thinsp;\u0026plusmn;\u0026thinsp;25 \u0026micro;m with one side polished and thick oxide layer of 280 nm. The wafer was cut into proper size and further cleaned for use. After a photolithographic process (MA8, SUSS MicroTec; photoresist: AZ601-46cp; spin-coating: 700 rpm 9 s, 4000 rpm, 45 s; baking: 80 ℃, 90 s; exposure: 10 s; developing: MF-319 Developer, 60s), we deposited 10 nm Cr and 50 nm Au to form source electrodes through thermal evaporation (KYKY-400, KYKY TECHNOLOGY CO.). After that, the photoresist was lifted off using hot acetone and the substrates were washed with acetone, isopropanol and deionized water. The residue was removed using oxygen plasma (SAT-9D, Saiaote Technology Co.). The substrate was then treated with atomic layer deposition (ALD-P-100B, SVT Associates, Inc.) to deposit 30 nm Al\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e3\u003c/sub\u003e layer. After a second photolithographic process, the substrates were baked under 120 ℃ and cleaned using oxygen plasma. The 5.0 \u0026micro;m Al\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e3\u003c/sub\u003e micropores were etched in BOE (28 ml 49% HF was added into 170 ml 40% NH\u003csub\u003e4\u003c/sub\u003eF aqueous solution) for 30 seconds and washed thoroughly with deionized water. The photoresist was removed following the same procedure. After the formation of the SAMs on exposed Au surfaces, a high-quality single-layer graphene (SLG) sheet was transferred onto the substrates, according to following procedures: SLG (Purchased from Nanjing MKNANO Tech. Co.) grown on copper films using CVD method was coated with PMMA layer. The copper layer was etched using 2.0% ammonium persulphate aqueous solution and washed with deionized water several times. Then the PMMA//SLG film was transferred on SAMs and dried in vacuum desiccators for several hours. After the removal of PMMA in hot acetone (50 ℃) for 3 hours, a photolithographic process and oxygen plasma etching, were used to pattern graphene sheets to cover the hole with SAMs at the center. After another photolithographic process, Cr/Au (10/50 nm) was thermally evaporated to make drain electrodes with connection to graphene sheets and gate electrodes. We dropped the ionic liquid onto the patch and conduct electrical measurements. The study emphasizes that the photolithographic process on samples with prepared Au-SAMs//SLG junctions required the baking temperature below 60 ℃, to prevent the fast photoresist hardening, which could potentially compromise the integrity of the prepared junctions.\u003c/p\u003e\u003c/div\u003e\u003cdiv id=\"Sec13\" class=\"Section2\"\u003e\u003ch2\u003ePreparation of SAMs\u003c/h2\u003e\u003cp\u003eThe SAMs were prepared in a glove box to minimize the contaminations from air. As for HOMO-type SAMs, about 1.0 mg of pure compound was added into a vial, following the addition of 1.0 ml dry tetrahydrofuran. After the compound dissolved, 9.0 ml dry ethanol was then added to dilute the concentration. As for C\u003csub\u003e60\u003c/sub\u003e-SH, 0.2 mg compounds were dissolved in 5.0 ml toluene to produce slight pink solution. The solution was filtered and prepared substrate was immersed into it. The SAMs were formed for 24 hours under the atmosphere of N\u003csub\u003e2\u003c/sub\u003e. The substrate was rinsed thoroughly with corresponding solvent, and finally dried under a stream of nitrogen.\u003c/p\u003e\u003c/div\u003e\u003cdiv id=\"Sec14\" class=\"Section2\"\u003e\u003ch2\u003eFabrication of STEM sample\u003c/h2\u003e\u003cp\u003eTo determine the scale of Au-S-exTTF//SLG junction and characterize the structure of Al\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e3\u003c/sub\u003e micropores, we prepared the sample for scanning transmission electron microscope (STEM) imaging using a focused ion beam (FIB, Zeiss Auriga) apparatus. To avoid charging effect during FIB, we deposited 30 nm Au layer onto SLG in advance. The sample was cut by the FIB into slab with size of 8 \u0026micro;m in width, 5 \u0026micro;m in height, and 2 \u0026micro;m in thickness, followed by transferred onto a TEM sample holder by nanomanipulator (Oxford, Omniprobe 200). To make the sample thin enough (50\u0026ndash;70 nm) for effective electron beam penetration during STEM imaging, it was subsequently milled with nanomilling. After the milling process was complete, the sample was transferred for imaging to a high-resolution scanning TEM (HRTEM) instrument (JEM-F200, JEOL).\u003c/p\u003e\u003c/div\u003e\u003cdiv id=\"Sec15\" class=\"Section2\"\u003e\u003ch2\u003eElectrical measurements\u003c/h2\u003e\u003cp\u003eThe electrical measurements of molecular transistors are conducted with Agilent B2912. To make sure the stability of ionic liquid, nitrogen flows through the probe station. For logic gates measurements, Keithley 2182A NANOVOLTMETER was used to measure the output voltage.\u003c/p\u003e\u003c/div\u003e"},{"header":"Declarations","content":"\u003cdiv id=\"Sec16\" class=\"Section2\"\u003e\u003ch2\u003eData availability\u003c/h2\u003e\u003cp\u003e\u003cdiv class=\"BlockQuote\"\u003e\u003cp\u003eAll the data supporting the findings are available within the article, its supporting information or from the corresponding authors upon request.\u003c/p\u003e\u003c/div\u003e\u003c/p\u003e\u003c/div\u003e\u003cp\u003e\u003ch2\u003eConflict of interest\u003c/h2\u003e\u003cp\u003eAuthors declare no competing interests.\u003c/p\u003e\u003c/p\u003e\u003ch2\u003eAcknowledgements\u003c/h2\u003e\u003cp\u003eY.X., Z.C. and Z.Z. contributed equally. This work was supported by the National Natural Science Foundation of China (52488101, 22273045) and Tsinghua University \u0026ldquo;Dushi\u0026rdquo; program. P.-A.C. and D.T. thank Research Ireland for financial support under Grant Number 12/RC/2275_P2 (SSPC), and for provision of computing resources at the Irish Centre for High-End Computing (ICHEC).\u003c/p\u003e"},{"header":"References","content":"\u003col\u003e\u003cli\u003e\u003cspan\u003eMack CA (2011) Fifty years of Moore's law. IEEE Trans Semicond Manuf 24:202\u0026ndash;207. \u003cspan class=\"ExternalRef\"\u003e\u003cspan class=\"RefSource\"\u003ehttps://doi.org/10.1109/TSM.2010.2096437\u003c/span\u003e\u003cspan address=\"10.1109/TSM.2010.2096437\" targettype=\"DOI\" class=\"RefTarget\"\u003e\u003c/span\u003e\u003c/span\u003e\u003c/span\u003e\u003c/li\u003e\u003cli\u003e\u003cspan\u003eZhao Y, Gobbi M, Hueso LE, Samori P (2022) Molecular approach to engineer two-dimensional devices for CMOS and beyond-CMOS applications. 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Nature 445:414\u0026ndash;417. \u003cspan class=\"ExternalRef\"\u003e\u003cspan class=\"RefSource\"\u003ehttps://doi.org/10.1038/nature05462\u003c/span\u003e\u003cspan address=\"10.1038/nature05462\" targettype=\"DOI\" class=\"RefTarget\"\u003e\u003c/span\u003e\u003c/span\u003e\u003c/span\u003e\u003c/li\u003e\u003c/ol\u003e"}],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":true,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":true,"hideJournal":false,"highlight":"","institution":"","isAcceptedByJournal":true,"isAuthorSuppliedPdf":false,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":false,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"
[email protected]","identity":"nature-portfolio","isNatureJournal":true,"hasQc":false,"allowDirectSubmit":false,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"","title":"Nature Portfolio","twitterHandle":"","acdcEnabled":false,"dfaEnabled":false,"editorialSystem":"ejp","reportingPortfolio":"","inReviewEnabled":true,"inReviewRevisionsEnabled":false},"keywords":"","lastPublishedDoi":"10.21203/rs.3.rs-7595893/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-7595893/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"\u003cp\u003eThe poor performance of molecular transistors is a major bottleneck for developing ultra-miniaturized integrated circuits. To date, the absence of a design-led strategy to systematically enhance the performance of fundamental molecular circuit components, coupled with sub-optimal device fabrication yields, has posed significant barriers to the widespread adoption and practical implementation of nanoelectronics. In this study, we report high-performance molecular transistors with a vertical configuration that employs self-assembled monolayers as the channel material and a top graphene electrode that allows external electro-gating. Leveraging on distinct hopping and tunneling charge transport mechanisms to mediate the ON and OFF transistor states, we achieve robust device performance at working CPU temperatures up to 350 K, with ON/OFF ratios exceeding 10\u003csup\u003e4\u003c/sup\u003e. Produced in yields\u0026thinsp;\u0026gt;\u0026thinsp;90%, these novel molecular transistors perform logic operations, support wafer-scale integration and provide a versatile platform for advancing the understanding of the mechanisms governing molecular charge transport.\u003c/p\u003e","manuscriptTitle":"High-performance Microelectronic-integratable Molecular Transistor","msid":"","msnumber":"","nonDraftVersions":[{"code":1,"date":"2025-09-22 06:25:52","doi":"10.21203/rs.3.rs-7595893/v1","editorialEvents":[],"status":"published","journal":{"display":true,"email":"
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