The Role of Asymmetry in Elevating Nanosheet FET RF and Circuit Metrics

The Role of Asymmetry in Elevating Nanosheet FET RF and Circuit Metrics | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article The Role of Asymmetry in Elevating Nanosheet FET RF and Circuit Metrics Raj Saha, Anubhab Saha, Akash Mandal, Subir Kr. Maity, Udai P. Singh, and 1 more This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-9457686/v1 This work is licensed under a CC BY 4.0 License Status: Under Review Version 1 posted 7 You are reading this latest preprint version Abstract This study details the design of an asymmetric source-drain (S/D) nanosheet FET (NSFET) featuring a silicon-germanium (SiGe) source. Furthermore, it includes an analysis of its DC, AC, and RF characteristics, as well as the performance of a resistive-load inverter. The performance metrics has been comared with a bulk NSFET of the same effective width (W \((_{eff})\) ). The SiGe source lowers the source–channel barrier via conduction‑band offset and bandgap narrowing, enabling stronger electron injection. As a result, the asymmetric \((S/D)\) NSFET exhibits higher drain current in strong inversion and improved transconductance (g \((_m)\) ), ON current \((I_{ON})\) , cutoff frequency \((f_T)\) , and transconductance–frequency product (TFP), highlighting its suitability for high‑frequency RF/microwave and high‑speed digital/sensing applications. The performance gains come with a modest increase in off‑state leakage (I \((_{OFF})\) ) attributable to the lowered injection barrier, while gate leakage and GIDL remain comparable to the bulk NSFET and subthreshold swing/DIBL show minimal impact. Circuit‑level evaluation with a resistive‑load inverter shows a slightly steeper voltage‑transfer characteristic and higher small‑signal gain \((A_v = \partial V_{out}/\partial V_{in})\) than the bulk NSFET, underscoring its potential as an effective amplifier. Nanosheet FET transconductance cut-off frequency intrinsic gain Full Text Additional Declarations No competing interests reported. Cite Share Download PDF Status: Under Review Version 1 posted Reviews received at journal 13 May, 2026 Reviewers agreed at journal 26 Apr, 2026 Reviewers agreed at journal 22 Apr, 2026 Reviewers invited by journal 21 Apr, 2026 Editor assigned by journal 21 Apr, 2026 Submission checks completed at journal 21 Apr, 2026 First submitted to journal 18 Apr, 2026 You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-9457686","acceptedTermsAndConditions":true,"allowDirectSubmit":false,"archivedVersions":[],"articleType":"Research Article","associatedPublications":[],"authors":[{"id":629955257,"identity":"9268cc0d-37d1-4a1e-9b39-75d686c08896","order_by":0,"name":"Raj Saha","email":"","orcid":"","institution":"KIIT University","correspondingAuthor":false,"prefix":"","firstName":"Raj","middleName":"","lastName":"Saha","suffix":""},{"id":629955259,"identity":"114d3e35-2db5-4ec0-a218-896e2652254c","order_by":1,"name":"Anubhab Saha","email":"","orcid":"","institution":"KIIT University","correspondingAuthor":false,"prefix":"","firstName":"Anubhab","middleName":"","lastName":"Saha","suffix":""},{"id":629955260,"identity":"c9a23159-ffd2-4e8b-a8c2-552be604d07b","order_by":2,"name":"Akash Mandal","email":"","orcid":"","institution":"KIIT University","correspondingAuthor":false,"prefix":"","firstName":"Akash","middleName":"","lastName":"Mandal","suffix":""},{"id":629955261,"identity":"f5822896-8525-4227-8b28-cd2cf657c816","order_by":3,"name":"Subir Kr. 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Furthermore, it includes an analysis of its DC, AC, and RF characteristics, as well as the performance of a resistive-load inverter. The performance metrics has been comared with a bulk NSFET of the same effective width (W\u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\((_{eff})\\)\u003c/span\u003e\u003c/span\u003e). The SiGe source lowers the source\u0026ndash;channel barrier via conduction‑band offset and bandgap narrowing, enabling stronger electron injection. As a result, the asymmetric \u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\((S/D)\\)\u003c/span\u003e\u003c/span\u003e NSFET exhibits higher drain current in strong inversion and improved transconductance (g\u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\((_m)\\)\u003c/span\u003e\u003c/span\u003e), ON current \u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\((I_{ON})\\)\u003c/span\u003e\u003c/span\u003e, cutoff frequency \u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\((f_T)\\)\u003c/span\u003e\u003c/span\u003e, and transconductance\u0026ndash;frequency product (TFP), highlighting its suitability for high‑frequency RF/microwave and high‑speed digital/sensing applications. The performance gains come with a modest increase in off‑state leakage (I\u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\((_{OFF})\\)\u003c/span\u003e\u003c/span\u003e) attributable to the lowered injection barrier, while gate leakage and GIDL remain comparable to the bulk NSFET and subthreshold swing/DIBL show minimal impact. Circuit‑level evaluation with a resistive‑load inverter shows a slightly steeper voltage‑transfer characteristic and higher small‑signal gain \u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\((A_v = \\partial V_{out}/\\partial V_{in})\\)\u003c/span\u003e\u003c/span\u003e than the bulk NSFET, underscoring its potential as an effective amplifier.\u003c/p\u003e","manuscriptTitle":"The Role of Asymmetry in Elevating Nanosheet FET RF and Circuit Metrics","msid":"","msnumber":"","nonDraftVersions":[{"code":1,"date":"2026-04-30 14:02:37","doi":"10.21203/rs.3.rs-9457686/v1","editorialEvents":[{"type":"communityComments","content":0},{"type":"editorInvitedReview","content":"","date":"2026-05-13T12:00:42+00:00","index":"hide","fulltext":""},{"type":"reviewerAgreed","content":"313490369360150475460637794776822969189","date":"2026-04-27T03:14:37+00:00","index":"hide","fulltext":""},{"type":"reviewerAgreed","content":"85723344008914750775423084925902356313","date":"2026-04-22T08:21:40+00:00","index":"hide","fulltext":""},{"type":"reviewersInvited","content":"","date":"2026-04-21T20:21:10+00:00","index":"","fulltext":""},{"type":"editorAssigned","content":"","date":"2026-04-21T06:47:02+00:00","index":"","fulltext":""},{"type":"checksComplete","content":"","date":"2026-04-21T06:46:09+00:00","index":"","fulltext":""},{"type":"submitted","content":"Analog Integrated Circuits and Signal Processing","date":"2026-04-18T19:03:03+00:00","index":"","fulltext":""}],"status":"published","journal":{"display":true,"email":"[email protected]","identity":"analog-integrated-circuits-and-signal-processing","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":false,"externalIdentity":"alog","sideBox":"Learn more about [Analog Integrated Circuits and Signal Processing](http://link.springer.com/journal/10470)","snPcode":"10470","submissionUrl":"https://submission.nature.com/new-submission/10470/3","title":"Analog Integrated Circuits and Signal Processing","twitterHandle":"","acdcEnabled":true,"dfaEnabled":true,"editorialSystem":"em","reportingPortfolio":"Springer Hybrid","inReviewEnabled":true,"inReviewRevisionsEnabled":false}}],"origin":"","ownerIdentity":"89876a54-d43c-47dd-9da4-74dd375ec3e7","owner":[],"postedDate":"April 30th, 2026","published":true,"recentEditorialEvents":[{"type":"editorInvitedReview","content":"","date":"2026-05-13T12:00:42+00:00","index":11,"fulltext":""}],"rejectedJournal":[],"revision":"","amendment":"","status":"under-review","subjectAreas":[],"tags":[],"updatedAt":"2026-04-30T14:02:38+00:00","versionOfRecord":[],"versionCreatedAt":"2026-04-30 14:02:37","video":"","vorDoi":"","vorDoiUrl":"","workflowStages":[]},"version":"v1","identity":"rs-9457686","journalConfig":"researchsquare"},"__N_SSP":true},"page":"/article/[identity]/[[...version]]","query":{"redirect":"/article/rs-9457686","identity":"rs-9457686","version":["v1"]},"buildId":"XKTyCvWXoU3ODBz1xrDgd","isFallback":false,"isExperimentalCompile":false,"dynamicIds":[84888],"gssp":true,"scriptLoader":[]}