HAD:A Prototype Of Dataflow Compute Architecture

HAD:A Prototype Of Dataflow Compute Architecture | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Article HAD:A Prototype Of Dataflow Compute Architecture Qiuming Luo, Wenjie Zhao, Zhiwei Wen, Pengxiang Xu, Haixin Du, and 1 more This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-4254978/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract To investigate the features, implementation, and applications of data flow architecture, a novel dataflow computing system, HAD (Hardware Accelerated Dataflow), is proposed. This system enhances the traditional control flow processor by integrating a dataflow component.HAD introduces two specialized instructions to the RISC ISA and provides OS system calls for applications. Users can execute programs that adhere to the dataflow execution model on the system, enabling synchronization and mutual exclusion between processes through the inherent characteristics of dataflow computing.We further analyze how our dataflow computing can reduce the overhead of OS system calls for synchronization and mutual exclusion between processes.Lastly, we perform simulations using Verilator, implement the system on an FPGA device based on the RISC-V prototype architecture, and transplant a miniature operating system for it. We evaluate its performance using EPCC Microbenchmarks. The simulation and physical experiment results indicate that when the number of processes is substantial, the system exhibits a time reduction of up to 29% compared to the traditional approach. The simulation results closely correspond to the actual outcomes. Physical sciences/Mathematics and computing/Computational science Physical sciences/Mathematics and computing/Computer science Physical sciences/Mathematics and computing/Information technology Full Text Additional Declarations No competing interests reported. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-4254978","acceptedTermsAndConditions":true,"allowDirectSubmit":true,"archivedVersions":[],"articleType":"Article","associatedPublications":[],"authors":[{"id":293994531,"identity":"2b857852-0191-451a-82bc-882241a0bfaa","order_by":0,"name":"Qiuming Luo","email":"","orcid":"","institution":"Shenzhen University","correspondingAuthor":false,"prefix":"","firstName":"Qiuming","middleName":"","lastName":"Luo","suffix":""},{"id":293994532,"identity":"a43d1b19-2c92-4b64-86fc-4ee72a02af1f","order_by":1,"name":"Wenjie Zhao","email":"","orcid":"","institution":"Shenzhen University","correspondingAuthor":false,"prefix":"","firstName":"Wenjie","middleName":"","lastName":"Zhao","suffix":""},{"id":293994533,"identity":"1e1ee233-716d-4277-b93c-9ea00874bd5f","order_by":2,"name":"Zhiwei Wen","email":"","orcid":"","institution":"Shenzhen University","correspondingAuthor":false,"prefix":"","firstName":"Zhiwei","middleName":"","lastName":"Wen","suffix":""},{"id":293994534,"identity":"4399a435-c5c2-462b-8c91-9375ecf54e98","order_by":3,"name":"Pengxiang Xu","email":"","orcid":"","institution":"Peng Cheng Laboratory","correspondingAuthor":false,"prefix":"","firstName":"Pengxiang","middleName":"","lastName":"Xu","suffix":""},{"id":293994535,"identity":"b4c58fe8-b9c7-4058-82ac-8233d50a8028","order_by":4,"name":"Haixin Du","email":"","orcid":"","institution":"Tencent (China)","correspondingAuthor":false,"prefix":"","firstName":"Haixin","middleName":"","lastName":"Du","suffix":""},{"id":293994536,"identity":"90fed79f-9eaf-440f-97dd-857bd36238a7","order_by":5,"name":"Du Zheng","email":"data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAZAAAAAyAQMAAABI0h/eAAAABlBMVEX///8AAABVwtN+AAAACXBIWXMAAA7EAAAOxAGVKw4bAAABK0lEQVRIie2QMUvDQBTH7whkOpo1wfY7XAmkiKF+EJcXCpnM5JIpBAJxCc510U8gRPwCBwfNcpi10qUunUTilqGgd6UOQho7Ct6PuwcH/x/vvUNIo/mLMHkh9hEyjFS9ye5IcNqnrEUoFZWBIxX8mvN9BvaN+pRBVbgNiPrCusZZg9tkOLEeFnaL/FHJjM26Q3GEoBTiVTTnOLcRcHI6fw+dAoVuycwJ7VDo8pICiFWUSkUOxghdCs8miAclI6Z9QGFB/hzdczkYgmSnOFv02aeM0yBnUclxKgczCK0L74QgdlBxxOIKgZhFj2oXCLnsQtyzIZ25t9z0upRBlT19tPE0uqs5bxo/Oae1GL+8xdPRTZVtupSfgCq2quqrjF/z31js6KhGo9H8D74AFTVtFSnV0cAAAAAASUVORK5CYII=","orcid":"","institution":"Tsinghua University","correspondingAuthor":true,"prefix":"","firstName":"Du","middleName":"","lastName":"Zheng","suffix":""}],"badges":[],"createdAt":"2024-04-12 02:59:23","currentVersionCode":1,"declarations":"","doi":"10.21203/rs.3.rs-4254978/v1","doiUrl":"https://doi.org/10.21203/rs.3.rs-4254978/v1","draftVersion":[],"editorialEvents":[],"editorialNote":"","failedWorkflow":false,"files":[{"id":56758816,"identity":"b9c80845-a5e9-4614-80db-14d445d4e73d","added_by":"auto","created_at":"2024-05-20 06:22:53","extension":"pdf","order_by":1,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":790451,"visible":true,"origin":"","legend":"","description":"","filename":"TemplateforsubmissionstoScientificReports1.pdf","url":"https://assets-eu.researchsquare.com/files/rs-4254978/v1_covered_58235ee6-76d2-4239-87a9-9b44db937604.pdf"}],"financialInterests":"No competing interests reported.","formattedTitle":"HAD:A Prototype Of Dataflow Compute Architecture","fulltext":[],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":false,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":false,"hideJournal":true,"highlight":"","institution":"","isAcceptedByJournal":false,"isAuthorSuppliedPdf":true,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":true,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true},"keywords":"","lastPublishedDoi":"10.21203/rs.3.rs-4254978/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-4254978/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"To investigate the features, implementation, and applications of data flow architecture, a novel dataflow computing system, HAD (Hardware Accelerated Dataflow), is proposed. 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