A Capacitively Coupled Chopper Instrumentation Amplifier with Deadtime Offset Reduction Technique for Neural Signal Recording

This letter presents a deadtime offset reduction (DOR) technique to reduce the offset and ripple at the output of the capacitively coupled chopper instrumentation amplifier (CCIA) for neural signal recording. DOR employs switches to discharge the offsets at main amplifier and DC servo loop, during the deadtime of the chopping clocks. The circuits are targeted at IC realization and designed in 0.18-μm CMOS technology. The proposed CCIA with DOR achieves an output offset reduction ratio of 52 dB and a ripple reduction ratio of 47 dB without any significant increasement of power, area, or noise overhead.