A Multi-branch Digital Pre-distortion Scheme with Reduced Sampling Rate for DACs.

Digital pre-distortion (DPD) technology is an efficient method to linearize power amplifiers (PAs). Current DPD techniques usually demand a sampling rate 5-7 times the source signal bandwidth in order to produce an effective pre-distorted signal. Nevertheless, since the signal bandwidth in 5G systems typically exceeds 100MHz, the needed sampling rate will significantly raise the power consumption. Thus, a low sampling rate pre-distortion structure is proposed in this letter. The structure only conducts linear operations in the digital domain and then utilizes the nonlinearity of the compensatory PA to directly generate a pre-distorted signal in the analog domain. The simulation results show that the suggested technique can achieve a similar suppression performance as conventional schemes when the sampling rate reduced to the same as the bandwidth of the source signal.