An SRAM-based fully-integrated analog closed-loop in-memory computing accelerator

An SRAM-based fully-integrated analog closed-loop in-memory computing accelerator | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Article An SRAM-based fully-integrated analog closed-loop in-memory computing accelerator Piergiulio Mannocci, Carlo Zucchelli, Irene Andreoli, Andrea Pezzoli, and 7 more This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-5595805/v1 This work is licensed under a CC BY 4.0 License Status: Published Journal Publication published 14 Jan, 2026 Read the published version in Nature Electronics → Version 1 posted You are reading this latest preprint version Abstract Conventional processors are unsuited for the increasingly data-intensive workloads brought upon by the resurgence of artificial intelligence (AI) and machine learning (ML) in the latest years. The widespread diffusion of ML techniques in many different technological fields has prompted both academia and industry to rethink the processor structure, abandoning the outdated physical separation between memory and computing units of von Neumann's architecture. Novel computing paradigms have emerged, such as in-memory computing (IMC), in which memory and computing are blended together in a single processing unit. IMC allows the complete elimination of the energy and latency overheads associated with the back-and-forth data transfer between memory and computing units. When implemented using crossbar arrays (CBAs) of memory devices, IMC represents a competitive candidate for next-generation energy-efficient accelerators for ML and AI on the edge. IMC was shown to be particularly effective in accelerating low-level, data-intensive algebraic operations such as matrix-vector (MVM) and inverse-matrix-vector multiplication (IMVM). However, while several IMC-based MVM demonstrators have been reported in recent years, IMVM demonstrators have faced additional challenges owing to the increased complexity of the circuit implementation, entailing analog feedback operation and suffering from increased sensitivity. Nonetheless, closed-loop IMC (CL-IMC) IMVM may capitalize on the IMC advantage even more than MVM, owing to the higher O(N^3) computational complexity, where N is the matrix size, which is instead reduced to O(1) in IMC-based systems. Here, we present a fully integrated IMC chip for IMVM designed and fabricated in 90~nm complementary metal-oxide-semiconductor (CMOS) technology. The chip features two 64×64 memory arrays, enclosed in an analog feedback loop by on-chip operational amplifiers (OAs), digital/analog (DAC), and analog/digital converters (ADC), providing the first complete primitive for acceleration of inverse operations under the IMC framework. We validate the integrated circuit (IC) by performing experiments on three real-life toy problems, namely, inversion of large-scale linear systems up to 512$\times$512 by recursive block inversion (RBI), sensor fusion by Kalman filter for trajectory estimation in sounding rockets, and acceleration of inverse kinematics in robotic arms for industrial automation and autonomous robots. Experimental results closely match the accuracy of fully digital systems working at the equivalent IC precision while simultaneously providing consistent advantages in terms of latency, energy, and area consumption. The obtained results represent the first large-scale experimental demonstration of the CL-IMC concept and consolidate its position as a promising candidate for next-generation energy-efficient accelerators on-the-edge. Physical sciences/Engineering/Electrical and electronic engineering Physical sciences/Mathematics and computing/Information technology in-memory computing closed-loop computing block inversion Kalman filter inverse kinematics Full Text Additional Declarations There is NO Competing Interest. Cite Share Download PDF Status: Published Journal Publication published 14 Jan, 2026 Read the published version in Nature Electronics → Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. 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Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-5595805","acceptedTermsAndConditions":true,"allowDirectSubmit":false,"archivedVersions":[],"articleType":"Article","associatedPublications":[],"authors":[{"id":389984147,"identity":"1ee8bd3d-8ad4-4845-96ef-16f8ae833531","order_by":0,"name":"Piergiulio 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We validate the integrated circuit (IC) by performing experiments on three real-life toy problems, namely, inversion of large-scale linear systems up to 512$\\times$512 by recursive block inversion (RBI), sensor fusion by Kalman filter for trajectory estimation in sounding rockets, and acceleration of inverse kinematics in robotic arms for industrial automation and autonomous robots. Experimental results closely match the accuracy of fully digital systems working at the equivalent IC precision while simultaneously providing consistent advantages in terms of latency, energy, and area consumption. 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