Mixed high dielectric constant layers for MOS devices

Mixed high dielectric constant layers for MOS devices | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Short Report Mixed high dielectric constant layers for MOS devices S. V. Jagadeesh Chandra, Sai Jagadeesh M, Sai Kiran Ch, Eswara Rao B This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-3796030/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract Tantalum oxide-Ta 2 O 5 mixed zirconium oxide-ZrO 2 (TZO) films were deposited on p-silicon substrates using RF magnetron co-sputtering technique. The presence of tantalum, zirconium and oxygen atoms was confirmed by Rutherford Back Scattering analysis with NDF program. XRD spectra revealed that the as-deposited and annealed TZO films were amorphous in nature. It is observed that the accumulation region has become stable after annealing and also observed the reduction in the intensity of the kinks/bumps at depletion region of the C-V curves. The dielectric constant value is also reasonably in good agreement with the reported values at this annealing temperature. The J-V curves revealed that the annealing process effectively reduced the leakage current density upto nano scale range at this lower annealing temperature. The mixed TZO layer showed relatively better thermodynamic and electrical properties after annealing at even lower temperature. Tantalum oxide zirconium oxide RF sputtering Interface engineering di-electric constant leakage current Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Introduction There was a huge demand for the new high dielectric constant (high-k) materials, which have relatively stable thermal and electrical properties, such as improved crystallization effects with respect to temperature and reasonable band offset values with suitable interfacial properties as the semiconductor industry is looking for advanced computing by supporting more Moore and beyond Moore concept. [ 1 ]. Various high-k materials, like tantalum oxide (Ta 2 O 5 ), Titanium oxide (TiO 2 ), Hafnium oxide (HfO 2 ), Zirconium oxide (ZrO 2 ) and etc., have been investigated enormously for microelectronic devices during the last four to five decades. In particular, here the authors wish to study the effect of mixing two different high-k materials for microelectronic devices to diminish their individual detrimental factors. Tantalum oxide (Ta 2 O 5 ) has been studied extensively owing to its widespread scope of applications at various areas, such as dielectric layers for dynamic random access memory (DRAM), metal-oxide-semiconductor (MOS) devices, etc., [ 2 – 5 ]. Though Ta 2 O 5 has attractive nature of applications in various fields, recently, there were no significant research reports on mono Ta 2 O 5 particularly for the microelectronic devices due to the negligible conduction band offset (~ 0 eV) values [ 6 ]. On the other hand, ZrO 2 also may not preferable for device applications; since it has been suffering with low temperature crystallization effects [ 7 ] though it has acceptable band offset values. Nevertheless, there were individual drawbacks for the both of these two proposed oxide materials, with poor band offset values and low thermal stability, they were reasonably good with stable interface at oxide/Si stacks and showed relatively high speed oscillations in CMOS circuits [ 8 ], when compare with HfO 2 /Si stacks. The mixing of Ta 2 O 5 with ZrO 2 may be the possible gate way to improve the thermal stability and eventually the electrical properties of resulting Ta 2 O 5 mixed ZrO 2 (TZO) films. Hence, in this investigation we mixed the Ta 2 O 5 and ZrO 2 with co-sputtering technique and studied its crystallographic structure and associated electrical properties for MOS devices. Experimental Tantalum oxide (Ta 2 O 5 ) mixed zirconium oxide (ZrO 2 ) films were deposited on chemically cleaned p-type Si wafers, whose doping concentration is 5x10 15 cm − 3 using RF magnetron co-sputtering technique from 99% pure ZrO 2 Ta 2 O 5 ceramic targets after removing the native oxide. Pre-sputtering step was done for 10 minutes with pure Ar to clean the target surface. The deposition conditions maintained during deposition of Ta 2 O 5 mixed ZrO 2 films were given in below table. 1. Table 1 Deposition parameters of the Ta 2 O 5 mixed ZrO 2 films Sputter Target(s) Ta 2 O 5 and ZrO 2 (2ˈ dia) Deposition pressure 0.3 Pa Ar / O 2 ration 14 / 1 sccm Deposition temperature Room Temperature Sputter power Ta 2 O 5 (50 Watt) ZrO 2 (150 Watt) Annealing temperature 400 ℃ The Ta 2 O 5 mixed ZrO 2 dielectric films, here after represented as TZO films. The TZO/Si stacks were annealed at 400°C for 30 minutes in oxygen (O 2 ) enriched environment. The thickness of the annealed TZO layer was measured with an ellipsometer (Rudolph i1000) and it was recorded as 30 nm. After annealing, wafer’s backside was etched with buffered HF solution in order to remove the SiO 2 film prior to the deposition of Al film as the back contact using electron beam evaporation technique. Rutherford back scattering (RBS), technique was used for the chemical bonding and elemental composition analysis. The crystallographic structure of the annealed TZO layers was analyzed with X-ray diffractometer (XRD). For a gate electrode, 50 nm thick Al film with 0.9 mm diameter was deposited using shadow mask. The interface quality and dielectric constant of the mixed high-k layers were extracted by capacitance-voltage (C-V) curves obtained from Al/TZO/Si stacks. The C-V characteristics were measured at different frequencies, eg. 10 and 100 K Hz at room temperature using a multi frequency LCR meter (HP impedance analyzer (4284A). Current- voltage (I-V) characteristics were determined using a precision semiconductor analyzer (Agilent 4156C). Results and Discussion To confirm the presence tantalum (Ta), zirconium (Zr) and oxygen in our mixed high-k layer we performed RBS analysis. The energy barriers signposted by arrows in Fig. 1 are corresponding to the energy of the detected particles that have been backscattered by Ta, Zr and O surface atoms of the sputtered film. Here, the O contribution is superimposed on the Si/SiO 2 stacks. It is clear from the Fig. 1 that, the film composition is revealed by the different Ta and Zr barrier yield heights. Analysis with NDF program was made to extract the composition of TZO film. It is confirmed from the RBS spectra that the presence of Ta, Zr and oxygen including the substrate material (Si). It is well-known fact that the annealing process and itz environment has significant impact on the physical, optical and electrical properties of different high-k materials [ 2 , 9 – 10 ]. Hence, in this investigation, we perform the annealing at 400 ℃ as an initial study on TZO/Si stacks and extract the structural and electrical properties of TZO layers. The XRD spectra of as-deposited and annealed TZO/Si stacks were shown in Fig. 2 . It is clear from the figure that, the as-deposited and annealed TZO layers were amorphous in nature as no diffraction peak was observed in the XRD spectra. In general, the crystallographic structure of ZrO 2 used to transform from amorphous to crystalline even at lower temperatures [ 11 ]. Besides, it was reported by Mohsin et al., [ 12 ] and Mehner at al., [13] that the ZrO 2 films formed by sputtering and sol-gel methods, respectively were transformed to crystalline from amorphous nature at relatively smaller temperatures. Nonetheless, interestingly in this investigation we obtained amorphous TZO films even after annealing at 400 ℃. The possible reason for this observation could be the distortion in the physical structure of ZrO 2 layers and thus increased the entropy, which suppresses the crystallization process after addition of dopant atoms [14]. Hence, here we observed the amorphous nature in the TZO layers even after annealing process. Figure 3 shows the capacitance versus voltage characteristics of TZO dispersion and remarkable stretch in the entire depletion region with some kinks/bumps at starting and ending points of it. The acceptable reasons for these observations could be, large leakage currents, noticeable series resistance and higher order interface state density (D it ) level, respectively [15–18]. Besides, there was a remarkable negative shift in the flat band voltage from standard flat band voltage of MOS structure in as-deposited devices. The possible cause for this observation could be the massive fixed charge densities in the bulk oxide layer and also at the interface of oxide/semiconductor stacks [19]. In the case of annealed devices, first and foremost observation was a stable accumulation region and the gate capacitance has been recorded as 2.95 nF and 2.93 nF at an applied gate voltage of -2V measured at 10 KHz and 100 KHz, respectively. It is showing that there was an effective lessoning of frequency dispersion in annealed devices not only in the accumulation region but throughout the sweeping of gate voltage from negative to positive values. Though there was instability in the accumulation region of as-deposited devices, ultimately there was around 3.5 nF of gate oxide capacitance was recorded. But, the same was reduced to around 3 nF in the case of annealed devices. The plausible reason for this reduction in accumulation capacitance value would be strengthening of low-k silicon dioxide layer at TZO/Si stack [20] during annealing in oxygen enriched environment. From the extracted capacitance and the measured physical thickness value of the oxide layer, the dielectric constant of this mixed high-k layer by using the following expression: C = \(\frac{k {\epsilon }_{0 }A}{t}\) ---- (1) where C is the capacitance of oxide layer (nF), ‘k’ dielectric constant that is relative permittivity of the material, ‘ε o ’ permittivity of free space, ‘A’ area of the capacitor, and ‘t’ thickness of the dielectric film. The calculated dielectric constant of the as-deposited devices from the Eq. (1) at the frequency of 100 kHz was 18.1, whereas, the same was reduced to 16.2 after annealing. The reduction in the dielectric constant might be owing to strengthening of low-k native SiO2 layer in between TZO and Si. The similar behavior was observed by Zhang et al. [21] in the case TiO 2 -doped HfO 2 gate dielectrics. On the other hand, there was an interesting observation in the interface quality of the devices after annealing at 400 ℃. The extracted D it values of annealed devices using C-V plot measured at 100 KHz from and G-V plot (not shown here) at the same frequency by using the following expression [20] \({D}_{it}= \frac{2\omega {{C}^{2}}_{ox}{G}_{max}}{qA [{{G}^{2}}_{max}+ {\omega }^{2 }{\left({C}_{ox}-{C}_{M}{G}_{\text{m}\text{a}\text{x}}\right)}^{2}]}\) −−−−−−−−−−−−−−(2) where C M and G max are the maximum capacitance and conductance values, respectively, and ω is the frequency. The obtained D it values for the annealed devices are 4.27 × 10 11 cm − 2 eV − 1 . In particular, the stretch along the depletion region was noticeably reduced in the case of annealed devices. The believable reason for this observation could be the lessening of dangling bonds at semiconductor surface, resulting to reduction in the resultant D it level at TZO/Si stacks over annealing. In addition, the accumulation region is moderately stabilized upon annealing when compare with as-deposited devices; it might be due to the reduction in the leakage current density levels. In addition, the flat band voltage shifted to right-hand side from higher order of negative values to lower order. It might be owing to filling of higher order positive oxide fixed charges throughout the oxide layer and also at the interface [16–20]. It is well known fact that most of the high-k oxides severely struggling with oxide trap densities. On the other hand, it might be possible to minimize the oxide trap densities by mixing different high-k materials and performing the annealing at moderate temperatures around 400 ℃ in oxygen enriched environment. It was also proven in the case of TiO 2 doped HfO 2 gate dielectrics [21]. So, here we observed that the as-deposited TZO devices had high density of positive oxide charge, higher order of interface state densities and leakage current values, whereas these defects effectively reduced in annealed devices by showing positive shift in the flat band voltage, reduction in the intensity of kinks/bumps as well stretch in depletion region and relatively stable accumulation region, respectively [18]. In this context, here in Fig. 4 we are showing another evidential proof for the improvement of interface quality of annealed TZO devices. The C-V curve (blue color) extracted from TZO devices when gate bias has been swept from negative to positive, whereas, the C-V curve (red color) measured while sweeping gate bias voltage from positive to negative. The hysteresis behavior was observed predominantly in as-deposited devices (not shown here) relatively when compare with annealed devices. It means that the key resources for the hysteresis were defect centers in the oxide layer and also throughout the interface at oxide/semiconductor stacks. We discussed elaborately above about the poor interface quality of the as-deposited devices by describing the C-V curves due to large scale presence of D it and oxide fixed charges. Besides, there was almost absence of hysteresis (Fig. 4 ) in the annealed TZO devices. It might be due to reduction in the series resistance, fixed oxide trap densities and D it level in the TZO devices during annealing [22, 23]. Figure 5 shows the typical leakage current characteristics of the as-deposited and annealed TZO devices for negative and positive bias voltages. To measure these leakage current-voltage characteristics a step time of 1 ms and a step voltage of 0.1 V were used. The measured leakage current density value of the as-deposited device at 0.5 V was 0.3 µA/cm 2 . The possible explanation for this higher order of leakage current observed in as-deposited device would be the smooth native oxide at TZO/Si stack and also the significant oxygen fixed charge densities and interface state densities [24]. Besides, the leakage current density value has been reduced to 0.1 nA/cm 2 in the case of annealed device. The reduction in the leakage currents value greater than three orders might be due to the strengthening of native silicon oxide layer without formation of any silicates and also the minimization of fixed oxide traps and D it levels. The observed very low leakage current density value even at lower annealing temperature might be due to the mixing two different high-k materials. On the other hand, pure Ta 2 O 5 is not suitable for microelectronic application due to itz lower conduction band offset values, but it is highly appropriate materials for multiple applications [25,26]. In the similar line, pure ZrO 2 may has potential to use as dielectric material for microelectronic applications due to its acceptable conduction band offset values, but as it has been severely struggling with lower order thermo dynamic stability, it is also not suitable materials to use a gate oxide materials in mono form. Hence we select these two materials as a gate dielectric to present their individual strengths by combining both of them. Moreover, pure HfO 2 was also not at all showing the leakage current density values in the range of nA with various synthesis parameters, such as at different sputtering pressure, substrate temperature, rapid thermal annealing temperatures and substrate bias voltages, where as by mixing them with other dopants such as Ta, Ti, Gd and Zr with HfO 2 it was showing lower leakage currents and better dielectric properties [27]. Conclusion Tantalum oxide mixed zirconium oxide-TZO layers deposited on native oxide removed p-silicon substrate using RF magnetron co-sputtering technique. RBS spectra confirm the presence of all three atoms such as tantalum, zirconium and oxygen. Both as-deposited and annealed films were amorphous in nature. The dielectric properties strongly shown the evidence for the relative improvement in interface quality of this mixed TZO/Si stacks even at lower temperature, when compare with individual Ta 2 O 5 /Si or ZrO 2 /Si stacks. The reason for this improvement in the dielectric properties of mixed TZO/Si stacks would be the rectification in the disadvantages of mono high-k layer by strengthening the structural, thermal properties. The improvement in the interface engineering was also confirmed by the interface state density values, hysteresis loop of C-V curves. The lower leakage current density values in the order of nano ampere were recorded in the case of annealed TZO devices. Hence in this investigation we observed the strengthened thermodynamic and dielectric properties of TZO layer by mixing the Ta 2 O 5 with ZrO 2 , whereas they are showing the instability in both thermodynamic and dielectric behavior while using individually. Declarations Conflict of interest : No conflicts of interest. Data availability statement: The data obtained and discussed analyzed during the current study will be available from the corresponding author upon reasonable request. Authors Contributions: The First author is completely responsible for all the device development and analysis done in the work. Second and third authors contributed for this work while performing composition, structure and electrical measurements as well analysis. References The International Roadmap for Devices and Systems (IRDS) 2022 S.V. JagadeeshChandra, C.J. Choi, S. Uthanna and G. MohanRao, Structural and electrical properties of radio frequency magnetron sputtered tantalum oxide films: Influence of post-deposition annealing, Materials Science in Semiconductor Processing 13 (2010) 245. C. Chaneliere, J.L. Autran, R.A.B. Devine and B.Balland, Tantalum pentoxide (Ta 2 O 5 ) thin films for advanced dielectric applications, Mater. Sci. Engg. R: Rep., 22(6) (1998) 269. M. Belt, M.L. Davenport, J. E. Bowers, and D.J. Blumenthal, Ultra-low-loss Ta 2 O 5 -core/SiO 2 -clad planar waveguides on Si substrates, Optica, 4(5) (2017) 532. DOI: 10.1364/OPTICA.4.000532. S. Datta, '11 High-k gate dielectrics for advanced CMOS', in Evgeny Y. Tsymbal and others (eds), Multifunctional Oxide Heterostructures (Oxford, 2012; online edn, Oxford Academic, (2013) J. Robertson, New High-K Materials for CMOS Applications, Comprehensive semiconductor science and technology, 4 (2011) 132-176 A. Hojabri, Structural and optical characterization of ZrO2 thin films grown on silicon and quartz substrates, 10 (2016) 219, DOI: 10.1007/s40094-016-0218-8 Z. Xiao, K. Kisslinger, S. Chance and S. Banks, Comparison of hafnium dioxide and zirconium dioxide grown by plasma-enhanced atomic layer deposition for the application of electronic materials, Crystals 10 (2020) 136. P. Kondaiah, S.V. Jagadeesh Chandra, E. Fortunato, C.J. Choi, G. Mohan Rao, D.V.R.K. Reddy and S. Uthanna, Substrate temperature influenced ZrO 2 films for MOS devices, Surf. Interface. Anal., 52 (2020) 541. S. Venkataiah, S.V. Jagadeesh Chandra, M.V. Babu and S. Uthanna, Investigations on compositional, structural and optical properties of thermally oxidized HfO 2 films, Arabian J. Sci. Engg., 47 (2021), 7541. H. Nishizawa, N. Yamasaki, K. Matsuoka and H. Mitsushio, J Amer Cer Soc., 65(7) (1982) 343. M. Raza, P. Boulet, J.F. Pierson, R. Snyders, St. Konstantinidis, Thermal stability of oxygen vacancy stabilized zirconia (OVSZ) thin films, Surf. Coat. Tech., 409 (2021) 126880. A. Mehner, H.K. Westkamp, F. Hoffmann, P. Mayr, Crystallization and residual stress formation of sol-gel-derived zirconia films, Thin Solid Films, 308–309 (1997) 363–368 K. Kalam, et. al., Atomic layer deposition and properties of ZrO 2 /Fe 2 O 3 thin films, Beilstein J. Nanotechnol., 9 (2018) 119. S. V. Jagadeesh Chandra, J. Myung-Il, Y.C. Park, J.W. Yoon and C.J. Choi, Effect of Annealing Ambient on Structural and Electrical Properties of Ge Metal-Oxide-Semiconductor Capacitors with Pt Gate Electrode and HfO 2 Gate Dielectric, Mater. Trans. 52(1) (2011) 118. J. Liu , T. Teraji, B. Da, and Y. Koide, Boron-doped diamond MOSFETs with high output current and extrinsic transconductance, IEEE Trans. Electron. Dev., 68 (8) (2021) 3963 J.L. Lyons, A. Janotti, C.G. Van de Walle, The role of oxygen-related defects and hydrogen impurities in HfO 2 and ZrO 2 , Microelectron. Engg., 88 (2011) 1452. E. Atanassova, A. Paskaleva, and N. Novkovski, Effects of the metal gate on the stress-induced traps in Ta 2 O 5 /SiO 2 stacks, Microelectron. Rel., 48 (2008) 514 P. Mishra, S. Nozaki, R. Sakura, H. Morisaki, H. Ono and K. Uchida, Capacitance-Voltage (C-V) hysteresis in the Metal-Oxide-Semiconductor capacitor with Si-nanocrystals deposited by the gas evaporation technique, Mat. Res. Soc. Symp. Proc. 686 (2001) A.5.4.1 M. Kumar, S.V. Jagadeesh Chandra, M. Ju, et al., Effects of post deposition annealing atmosphere on interfacial and electrical properties of HfO 2 /Ge 3 N 4 gate stacks, Thin Solid Films, 675 (2019) 16. J.W. Zhang, G. He, H.S. Chen, J. Gao, X.F. Chen, P. Jin, D.Q. Xiao, R. Ma, M. Liu, Z.Q. Sun, Modulation of charge trapping and current-conduction mechanism of TiO 2 – doped HfO 2 gate dielectrics based MOS capacitors by annealing temperature, J Alloy and Comp., 647 (2015) 1054. A. Kahraman, E. Yilmaz, S. Kaya and A. Aktag, Effects of post deposition annealing, interface states and series resistance on electrical characteristics of HfO 2 MOS capacitors, J Mater. Sci. Mater. Electron., 26 (2015) 8277. B.G. Naik, S.V. Jagadeesh Chandra and S. Uthanna, Infuence of oxygen partial pressure on the structural, optical and electrical properties of magnetron sputtered Zr 0.7 Nb 0.3 O 2 films, Appl. Phys. A 127 (2021) 979. J. Kim, K. Haga, E. Tokumitsu, Investigation of Nb-Zr-O thin flm using sol-gel Coating. Semicond Sci Technol 17 (2017) 245. L. An, X. Han, Y. Li, H. Wang, C. Hou, and Q. Zhang, One step synthesis of self-doped F–Ta 2 O 5 nanoshuttles photocatalyst and enhanced photocatalytic hydrogen evolution, International Journal of Hydrogen Energy, 46(5) (2021) 3996. E. Koshevaya, M. Vasily, P. Sitnikov, E. Krivoshapkina, and P. Krivoshapkin, Electrosurface properties and acid-base equilibria of Ta 2 O 5 and Ta 2 O 5 :Eu nanoparticles in NaCl solutions, Surf. Inter., 29 (2022) 10171. Kailash Chandra Das, Sputter synthesis of multifunctional hafnium oxide based thin films for gate dielectric and memory applications, Ph.D Thesis, submitted in December, 2017 http://ethesis.nitrkl.ac.in/9384/1/2017_PhD_KCDas_512PH102.pdf Additional Declarations No competing interests reported. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-3796030","acceptedTermsAndConditions":true,"allowDirectSubmit":true,"archivedVersions":[],"articleType":"Short Report","associatedPublications":[],"authors":[{"id":264256252,"identity":"c968032d-7a8f-4e54-9866-62c9f0edc495","order_by":0,"name":"S. V. Jagadeesh Chandra","email":"data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAZAAAAAyAQMAAABI0h/eAAAABlBMVEX///8AAABVwtN+AAAACXBIWXMAAA7EAAAOxAGVKw4bAAAA9UlEQVRIiWNgGAWjYDCCAwhmAsMHIMnGTooWxhkgLcwkaGFg5gGTBHTw3T7A/OHnjlp58/YDz6Rtfm2T52NmYPzwMQe3FslzCWySvWeOG845k5Amndt327CNmYFZcuY23FoMzjCwMfC2HQN6A6Sl5zYjUAsbMy9+Lcwf/7Yds5/B/yBN2rLntj0xWhikedtqEmdIAG1h+HE7kaAWyTOMbdKybQeSZ0g8SLbsbbid3MbM2IzXL3xnmA9/fNtWZzuDPyfxxo8/t23ntzcf/PARjxYGBsYGIHEYiHkSGBjb4CIEQR0Qsx9gYPhDjOJRMApGwSgYaQAAG5BRHR92cJ0AAAAASUVORK5CYII=","orcid":"","institution":"GITAM (Deemed to be University","correspondingAuthor":true,"prefix":"","firstName":"S.","middleName":"V. Jagadeesh","lastName":"Chandra","suffix":""},{"id":264256253,"identity":"179f72e8-1708-4094-927d-b8499505edc7","order_by":1,"name":"Sai Jagadeesh M","email":"","orcid":"","institution":"GITAM (Deemed to be University","correspondingAuthor":false,"prefix":"","firstName":"Sai","middleName":"Jagadeesh","lastName":"M","suffix":""},{"id":264256254,"identity":"3dc561d5-12b3-4eaf-ad92-cf2447876f5e","order_by":2,"name":"Sai Kiran Ch","email":"","orcid":"","institution":"GITAM (Deemed to be University","correspondingAuthor":false,"prefix":"","firstName":"Sai","middleName":"Kiran","lastName":"Ch","suffix":""},{"id":264256255,"identity":"d4af1739-de0c-4836-bf63-0b75952c824a","order_by":3,"name":"Eswara Rao B","email":"","orcid":"","institution":"Virginia Tech","correspondingAuthor":false,"prefix":"","firstName":"Eswara","middleName":"Rao","lastName":"B","suffix":""}],"badges":[],"createdAt":"2023-12-23 10:59:21","currentVersionCode":1,"declarations":"","doi":"10.21203/rs.3.rs-3796030/v1","doiUrl":"https://doi.org/10.21203/rs.3.rs-3796030/v1","draftVersion":[],"editorialEvents":[],"editorialNote":"","failedWorkflow":false,"files":[{"id":49033526,"identity":"0442ea20-8bd6-40ba-a5f6-0d226d25a0f6","added_by":"auto","created_at":"2024-01-01 22:31:13","extension":"jpeg","order_by":1,"title":"Figure 1","display":"","copyAsset":false,"role":"figure","size":146304,"visible":true,"origin":"","legend":"\u003cp\u003e\u003cstrong\u003eRBS spectra of Ta:Zr:O film with fitted spectra\u003c/strong\u003e\u003c/p\u003e","description":"","filename":"floatimage1.jpeg","url":"https://assets-eu.researchsquare.com/files/rs-3796030/v1/16153bae9706ffe0ea57f8e4.jpeg"},{"id":49033565,"identity":"d17da97a-3736-4424-a1c5-d17ee49581c6","added_by":"auto","created_at":"2024-01-01 22:39:13","extension":"jpeg","order_by":2,"title":"Figure 2","display":"","copyAsset":false,"role":"figure","size":155905,"visible":true,"origin":"","legend":"\u003cp\u003e\u003cstrong\u003eXRD spectra of TZO films\u003c/strong\u003e\u003c/p\u003e","description":"","filename":"floatimage2.jpeg","url":"https://assets-eu.researchsquare.com/files/rs-3796030/v1/553cc5461018b3fbcec6d601.jpeg"},{"id":49033524,"identity":"637c9d38-24fb-4f8a-9f4c-0e80e7088435","added_by":"auto","created_at":"2024-01-01 22:31:13","extension":"jpeg","order_by":3,"title":"Figure 3","display":"","copyAsset":false,"role":"figure","size":31240,"visible":true,"origin":"","legend":"\u003cp\u003e\u003cstrong\u003eCapacitance – voltage curves of (a) as-deposited (b) annealed TZO devices\u003c/strong\u003e\u003c/p\u003e","description":"","filename":"groupimage1.jpeg","url":"https://assets-eu.researchsquare.com/files/rs-3796030/v1/7f851bcc26ea7a4fd1585277.jpeg"},{"id":49033525,"identity":"0d34f950-72c4-417a-aec3-4ff77a250991","added_by":"auto","created_at":"2024-01-01 22:31:13","extension":"jpeg","order_by":4,"title":"Figure 4","display":"","copyAsset":false,"role":"figure","size":92411,"visible":true,"origin":"","legend":"\u003cp\u003e\u003cstrong\u003eC-V curves (hysteresis) annealed TZO devices\u003c/strong\u003e\u003c/p\u003e","description":"","filename":"floatimage3.jpeg","url":"https://assets-eu.researchsquare.com/files/rs-3796030/v1/d9a0e9e5f5a0fbb9af4637ac.jpeg"},{"id":49033528,"identity":"df321239-abd7-4e16-a049-2ffeb825b11d","added_by":"auto","created_at":"2024-01-01 22:31:13","extension":"jpeg","order_by":5,"title":"Figure 5","display":"","copyAsset":false,"role":"figure","size":201469,"visible":true,"origin":"","legend":"\u003cp\u003e\u003cstrong\u003eCurrent-voltage characteristics of TZO devices\u003c/strong\u003e\u003c/p\u003e","description":"","filename":"floatimage4.jpeg","url":"https://assets-eu.researchsquare.com/files/rs-3796030/v1/726b1fe3e55e73f79e8cfec5.jpeg"},{"id":49033650,"identity":"9e406c80-50eb-408b-ae9c-842a6d4fd817","added_by":"auto","created_at":"2024-01-01 22:55:16","extension":"pdf","order_by":0,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":495856,"visible":true,"origin":"","legend":"","description":"","filename":"manuscript.pdf","url":"https://assets-eu.researchsquare.com/files/rs-3796030/v1/ba372522-562b-46ab-ac70-6b70cca031f9.pdf"}],"financialInterests":"No competing interests reported.","formattedTitle":"Mixed high dielectric constant layers for MOS devices","fulltext":[{"header":"Introduction","content":"\u003cp\u003eThere was a huge demand for the new high dielectric constant (high-k) materials, which have relatively stable thermal and electrical properties, such as improved crystallization effects with respect to temperature and reasonable band offset values with suitable interfacial properties as the semiconductor industry is looking for advanced computing by supporting more Moore and beyond Moore concept. [\u003cspan citationid=\"CR1\" class=\"CitationRef\"\u003e1\u003c/span\u003e]. Various high-k materials, like tantalum oxide (Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e), Titanium oxide (TiO\u003csub\u003e2\u003c/sub\u003e), Hafnium oxide (HfO\u003csub\u003e2\u003c/sub\u003e), Zirconium oxide (ZrO\u003csub\u003e2\u003c/sub\u003e) and etc., have been investigated enormously for microelectronic devices during the last four to five decades. In particular, here the authors wish to study the effect of mixing two different high-k materials for microelectronic devices to diminish their individual detrimental factors. Tantalum oxide (Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e) has been studied extensively owing to its widespread scope of applications at various areas, such as dielectric layers for dynamic random access memory (DRAM), metal-oxide-semiconductor (MOS) devices, etc., [\u003cspan additionalcitationids=\"CR3 CR4\" citationid=\"CR2\" class=\"CitationRef\"\u003e2\u003c/span\u003e\u0026ndash;\u003cspan citationid=\"CR7\" class=\"CitationRef\"\u003e5\u003c/span\u003e]. Though Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e has attractive nature of applications in various fields, recently, there were no significant research reports on mono Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e particularly for the microelectronic devices due to the negligible conduction band offset (~\u0026thinsp;0 eV) values [\u003cspan citationid=\"CR8\" class=\"CitationRef\"\u003e6\u003c/span\u003e]. On the other hand, ZrO\u003csub\u003e2\u003c/sub\u003e also may not preferable for device applications; since it has been suffering with low temperature crystallization effects [\u003cspan citationid=\"CR9\" class=\"CitationRef\"\u003e7\u003c/span\u003e] though it has acceptable band offset values. Nevertheless, there were individual drawbacks for the both of these two proposed oxide materials, with poor band offset values and low thermal stability, they were reasonably good with stable interface at oxide/Si stacks and showed relatively high speed oscillations in CMOS circuits [\u003cspan citationid=\"CR10\" class=\"CitationRef\"\u003e8\u003c/span\u003e], when compare with HfO\u003csub\u003e2\u003c/sub\u003e/Si stacks. The mixing of Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e with ZrO\u003csub\u003e2\u003c/sub\u003e may be the possible gate way to improve the thermal stability and eventually the electrical properties of resulting Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e mixed ZrO\u003csub\u003e2\u003c/sub\u003e (TZO) films. Hence, in this investigation we mixed the Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e and ZrO\u003csub\u003e2\u003c/sub\u003e with co-sputtering technique and studied its crystallographic structure and associated electrical properties for MOS devices.\u003c/p\u003e"},{"header":"Experimental","content":"\u003cp\u003eTantalum oxide (Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e) mixed zirconium oxide (ZrO\u003csub\u003e2\u003c/sub\u003e) films were deposited on chemically cleaned p-type Si\u0026thinsp;\u0026lt;\u0026thinsp;100\u0026thinsp;\u0026gt;\u0026thinsp;wafers, whose doping concentration is 5x10\u003csup\u003e15\u003c/sup\u003e cm\u003csup\u003e\u0026minus;\u0026thinsp;3\u003c/sup\u003e using RF magnetron co-sputtering technique from 99% pure ZrO\u003csub\u003e2\u003c/sub\u003e Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e ceramic targets after removing the native oxide. Pre-sputtering step was done for 10 minutes with pure Ar to clean the target surface. The deposition conditions maintained during deposition of Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e mixed ZrO\u003csub\u003e2\u003c/sub\u003e films were given in below table. 1.\u003c/p\u003e \u003cp\u003e \u003cdiv class=\"gridtable\"\u003e\u003ctable float=\"Yes\" id=\"Tab1\" border=\"1\"\u003e \u003ccaption language=\"En\"\u003e \u003cdiv class=\"CaptionNumber\"\u003eTable 1\u003c/div\u003e \u003cdiv class=\"CaptionContent\"\u003e \u003cp\u003eDeposition parameters of the Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e mixed ZrO\u003csub\u003e2\u003c/sub\u003e films\u003c/p\u003e \u003c/div\u003e \u003c/caption\u003e \u003ccolgroup cols=\"2\"\u003e \u003cdiv align=\"left\" class=\"colspec\" colname=\"c1\" colnum=\"1\"\u003e\u003c/div\u003e \u003cdiv align=\"left\" class=\"colspec\" colname=\"c2\" colnum=\"2\"\u003e\u003c/div\u003e \u003cthead\u003e \u003ctr\u003e \u003cth align=\"left\" colname=\"c1\"\u003e \u003cp\u003eSputter Target(s)\u003c/p\u003e \u003c/th\u003e \u003cth align=\"left\" colname=\"c2\"\u003e \u003cp\u003eTa\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e and ZrO\u003csub\u003e2\u003c/sub\u003e (2ˈ dia)\u003c/p\u003e \u003c/th\u003e \u003c/tr\u003e \u003c/thead\u003e \u003ctbody\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003eDeposition pressure\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e0.3 Pa\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003eAr / O\u003csub\u003e2\u003c/sub\u003e ration\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e14 / 1 sccm\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003eDeposition temperature\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003eRoom Temperature\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003eSputter power\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003eTa\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e (50 Watt)\u003c/p\u003e \u003cp\u003eZrO\u003csub\u003e2\u003c/sub\u003e (150 Watt)\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003ctr\u003e \u003ctd align=\"left\" colname=\"c1\"\u003e \u003cp\u003eAnnealing temperature\u003c/p\u003e \u003c/td\u003e \u003ctd align=\"left\" colname=\"c2\"\u003e \u003cp\u003e400 ℃\u003c/p\u003e \u003c/td\u003e \u003c/tr\u003e \u003c/tbody\u003e \u003c/colgroup\u003e \u003c/table\u003e\u003c/div\u003e \u003c/p\u003e \u003cp\u003eThe Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e mixed ZrO\u003csub\u003e2\u003c/sub\u003e dielectric films, here after represented as TZO films. The TZO/Si stacks were annealed at 400\u0026deg;C for 30 minutes in oxygen (O\u003csub\u003e2\u003c/sub\u003e) enriched environment. The thickness of the annealed TZO layer was measured with an ellipsometer (Rudolph i1000) and it was recorded as 30 nm. After annealing, wafer\u0026rsquo;s backside was etched with buffered HF solution in order to remove the SiO\u003csub\u003e2\u003c/sub\u003e film prior to the deposition of Al film as the back contact using electron beam evaporation technique. Rutherford back scattering (RBS), technique was used for the chemical bonding and elemental composition analysis. The crystallographic structure of the annealed TZO layers was analyzed with X-ray diffractometer (XRD). For a gate electrode, 50 nm thick Al film with 0.9 mm diameter was deposited using shadow mask. The interface quality and dielectric constant of the mixed high-k layers were extracted by capacitance-voltage (C-V) curves obtained from Al/TZO/Si stacks. The C-V characteristics were measured at different frequencies, eg. 10 and 100 K Hz at room temperature using a multi frequency LCR meter (HP impedance analyzer (4284A). Current- voltage (I-V) characteristics were determined using a precision semiconductor analyzer (Agilent 4156C).\u003c/p\u003e"},{"header":"Results and Discussion","content":"\u003cp\u003eTo confirm the presence tantalum (Ta), zirconium (Zr) and oxygen in our mixed high-k layer we performed RBS analysis. The energy barriers signposted by arrows in Fig.\u0026nbsp;\u003cspan refid=\"Fig1\" class=\"InternalRef\"\u003e1\u003c/span\u003e are corresponding to the energy of the detected particles that have been backscattered by Ta, Zr and O surface atoms of the sputtered film. Here, the O contribution is superimposed on the Si/SiO\u003csub\u003e2\u003c/sub\u003e stacks.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eIt is clear from the Fig.\u0026nbsp;\u003cspan refid=\"Fig1\" class=\"InternalRef\"\u003e1\u003c/span\u003e that, the film composition is revealed by the different Ta and Zr barrier yield heights. Analysis with NDF program was made to extract the composition of TZO film. It is confirmed from the RBS spectra that the presence of Ta, Zr and oxygen including the substrate material (Si).\u003c/p\u003e \u003cp\u003eIt is well-known fact that the annealing process and itz environment has significant impact on the physical, optical and electrical properties of different\u003c/p\u003e \u003cp\u003ehigh-k materials [\u003cspan citationid=\"CR2\" class=\"CitationRef\"\u003e2\u003c/span\u003e, \u003cspan citationid=\"CR11\" class=\"CitationRef\"\u003e9\u003c/span\u003e\u0026ndash;\u003cspan citationid=\"CR12\" class=\"CitationRef\"\u003e10\u003c/span\u003e]. Hence, in this investigation, we perform the annealing at 400 ℃ as an initial study on TZO/Si stacks and extract the structural and electrical properties of TZO layers. The XRD spectra of as-deposited and annealed TZO/Si stacks were shown in Fig.\u0026nbsp;\u003cspan refid=\"Fig2\" class=\"InternalRef\"\u003e2\u003c/span\u003e. It is clear from the figure that, the as-deposited and annealed TZO layers were amorphous in nature as no diffraction peak was observed in the XRD spectra. In general, the crystallographic structure of ZrO\u003csub\u003e2\u003c/sub\u003e used to transform from amorphous to crystalline even at lower temperatures [\u003cspan citationid=\"CR13\" class=\"CitationRef\"\u003e11\u003c/span\u003e].\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eBesides, it was reported by Mohsin et al., [\u003cspan citationid=\"CR14\" class=\"CitationRef\"\u003e12\u003c/span\u003e] and Mehner at al., [13] that the ZrO\u003csub\u003e2\u003c/sub\u003e films formed by sputtering and sol-gel methods, respectively were transformed to crystalline from amorphous nature at relatively smaller temperatures. Nonetheless, interestingly in this investigation we obtained amorphous TZO films even after annealing at 400 ℃. The possible reason for this observation could be the distortion in the physical structure of ZrO\u003csub\u003e2\u003c/sub\u003e layers and thus increased the entropy, which suppresses the crystallization process after addition of dopant atoms [14]. Hence, here we observed the amorphous nature in the TZO layers even after annealing process.\u003c/p\u003e \u003cp\u003eFigure \u003cspan refid=\"Fig3\" class=\"InternalRef\"\u003e3\u003c/span\u003e shows the capacitance versus voltage characteristics of TZO dispersion and remarkable stretch in the entire depletion region with some kinks/bumps at starting and ending points of it. The acceptable reasons for these observations could be, large leakage currents, noticeable series resistance and higher order interface state density (D\u003csub\u003eit\u003c/sub\u003e) level, respectively [15\u0026ndash;18]. Besides, there was a remarkable negative shift in the flat band voltage from standard flat band voltage of MOS structure in as-deposited devices. The possible cause for this observation could be the massive fixed charge densities in the bulk oxide layer and also at the interface of oxide/semiconductor stacks [19].\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eIn the case of annealed devices, first and foremost observation was a stable accumulation region and the gate capacitance has been recorded as 2.95 nF and 2.93 nF at an applied gate voltage of -2V measured at 10 KHz and 100 KHz, respectively. It is showing that there was an effective lessoning of frequency dispersion in annealed devices not only in the accumulation region but throughout the sweeping of gate voltage from negative to positive values. Though there was instability in the accumulation region of as-deposited devices, ultimately there was around 3.5 nF of gate oxide capacitance was recorded. But, the same was reduced to around 3 nF in the case of annealed devices. The plausible reason for this reduction in accumulation capacitance value would be strengthening of low-k silicon dioxide layer at TZO/Si stack [20] during annealing in oxygen enriched environment. From the extracted capacitance and the measured physical thickness value of the oxide layer, the dielectric constant of this mixed high-k layer by using the following expression:\u003c/p\u003e \u003cdiv id=\"Sec4\" class=\"Section2\"\u003e \u003ch2\u003eC = \u003cspan class=\"InlineEquation\"\u003e\u003cspan class=\"mathinline\"\u003e\\(\\frac{k {\\epsilon }_{0 }A}{t}\\)\u003c/span\u003e\u003c/span\u003e ---- (1)\u003c/h2\u003e \u003cp\u003ewhere C is the capacitance of oxide layer (nF), \u0026lsquo;k\u0026rsquo; dielectric constant that is relative permittivity of the material, \u0026lsquo;ε\u003csub\u003eo\u003c/sub\u003e\u0026rsquo; permittivity of free space, \u0026lsquo;A\u0026rsquo; area of the capacitor, and \u0026lsquo;t\u0026rsquo; thickness of the dielectric film. The calculated dielectric constant of the as-deposited devices from the Eq.\u0026nbsp;(1) at the frequency of 100 kHz was 18.1, whereas, the same was reduced to 16.2 after annealing. The reduction in the dielectric constant might be owing to strengthening of low-k native SiO2 layer in between TZO and Si. The similar behavior was observed by Zhang et al. [21] in the case TiO\u003csub\u003e2\u003c/sub\u003e -doped HfO\u003csub\u003e2\u003c/sub\u003e gate dielectrics. On the other hand, there was an interesting observation in the interface quality of the devices after annealing at 400 ℃. The extracted D\u003csub\u003eit\u003c/sub\u003e values of annealed devices using C-V plot measured at 100 KHz from and G-V plot (not shown here) at the same frequency by using the following expression [20]\u003c/p\u003e \u003cp\u003e \u003cspan class=\"InlineEquation\"\u003e \u003cspan class=\"mathinline\"\u003e\\({D}_{it}= \\frac{2\\omega {{C}^{2}}_{ox}{G}_{max}}{qA [{{G}^{2}}_{max}+ {\\omega }^{2 }{\\left({C}_{ox}-{C}_{M}{G}_{\\text{m}\\text{a}\\text{x}}\\right)}^{2}]}\\)\u003c/span\u003e \u003c/span\u003e \u003csub\u003e\u0026minus;\u0026minus;\u0026minus;\u0026minus;\u0026minus;\u0026minus;\u0026minus;\u0026minus;\u0026minus;\u0026minus;\u0026minus;\u0026minus;\u0026minus;\u0026minus;(2)\u003c/sub\u003e \u003c/p\u003e \u003cp\u003ewhere C\u003csub\u003eM\u003c/sub\u003e and G\u003csub\u003emax\u003c/sub\u003e are the maximum capacitance and conductance values, respectively, and ω is the frequency. The obtained D\u003csub\u003eit\u003c/sub\u003e values for the annealed devices are 4.27 \u0026times; 10\u003csup\u003e11\u003c/sup\u003e cm\u003csup\u003e\u0026minus;\u0026thinsp;2\u003c/sup\u003e eV\u003csup\u003e\u0026minus;\u0026thinsp;1\u003c/sup\u003e. In particular, the stretch along the depletion region was noticeably reduced in the case of annealed devices. The believable reason for this observation could be the lessening of dangling bonds at semiconductor surface, resulting to reduction in the resultant D\u003csub\u003eit\u003c/sub\u003e level at TZO/Si stacks over annealing. In addition, the accumulation region is moderately stabilized upon annealing when compare with as-deposited devices; it might be due to the reduction in the leakage current density levels. In addition, the flat band voltage shifted to right-hand side from higher order of negative values to lower order. It might be owing to filling of higher order positive oxide fixed charges throughout the oxide layer and also at the interface [16\u0026ndash;20]. It is well known fact that most of the high-k oxides severely struggling with oxide trap densities. On the other hand, it might be possible to minimize the oxide trap densities by mixing different high-k materials and performing the annealing at moderate temperatures around 400 ℃ in oxygen enriched environment. It was also proven in the case of TiO\u003csub\u003e2\u003c/sub\u003e doped HfO\u003csub\u003e2\u003c/sub\u003e gate dielectrics [21]. So, here we observed that the as-deposited TZO devices had high density of positive oxide charge, higher order of interface state densities and leakage current values, whereas these defects effectively reduced in annealed devices by showing positive shift in the flat band voltage, reduction in the intensity of kinks/bumps as well stretch in depletion region and relatively stable accumulation region, respectively [18]. In this context, here in Fig.\u0026nbsp;\u003cspan refid=\"Fig4\" class=\"InternalRef\"\u003e4\u003c/span\u003e we are showing another evidential proof for the improvement of interface quality of annealed TZO devices. The C-V curve (blue color) extracted from TZO devices when gate bias has been swept from negative to positive, whereas, the C-V curve (red color) measured while sweeping gate bias voltage from positive to negative. The hysteresis behavior was observed predominantly in as-deposited devices (not shown here) relatively when compare with annealed devices. It means that the key resources for the hysteresis were defect centers in the oxide layer and also throughout the interface at oxide/semiconductor stacks.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eWe discussed elaborately above about the poor interface quality of the as-deposited devices by describing the C-V curves due to large scale presence of D\u003csub\u003eit\u003c/sub\u003e and oxide fixed charges. Besides, there was almost absence of hysteresis (Fig.\u0026nbsp;\u003cspan refid=\"Fig4\" class=\"InternalRef\"\u003e4\u003c/span\u003e) in the annealed TZO devices. It might be due to reduction in the series resistance, fixed oxide trap densities and D\u003csub\u003eit\u003c/sub\u003e level in the TZO devices during annealing [22, 23].\u003c/p\u003e \u003cp\u003eFigure\u0026nbsp;\u003cspan refid=\"Fig5\" class=\"InternalRef\"\u003e5\u003c/span\u003e shows the typical leakage current characteristics of the as-deposited and annealed TZO devices for negative and positive bias voltages. To measure these leakage current-voltage characteristics a step time of 1 ms and a step voltage of 0.1 V were used. The measured leakage current density value of the as-deposited device at 0.5 V was 0.3 \u0026micro;A/cm\u003csup\u003e2\u003c/sup\u003e. The possible explanation for this higher order of leakage current observed in as-deposited device would be the smooth native oxide at TZO/Si stack and also the significant oxygen fixed charge densities and interface state densities [24]. Besides, the leakage current density value has been reduced to 0.1 nA/cm\u003csup\u003e2\u003c/sup\u003e in the case of annealed device.\u003c/p\u003e \u003cp\u003e \u003c/p\u003e \u003cp\u003eThe reduction in the leakage currents value greater than three orders might be due to the strengthening of native silicon oxide layer without formation of any silicates and also the minimization of fixed oxide traps and D\u003csub\u003eit\u003c/sub\u003e levels. The observed very low leakage current density value even at lower annealing temperature might be due to the mixing two different high-k materials. On the other hand, pure Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e is not suitable for microelectronic application due to itz lower conduction band offset values, but it is highly appropriate materials for multiple applications [25,26]. In the similar line, pure ZrO\u003csub\u003e2\u003c/sub\u003e may has potential to use as dielectric material for microelectronic applications due to its acceptable conduction band offset values, but as it has been severely struggling with lower order thermo dynamic stability, it is also not suitable materials to use a gate oxide materials in mono form. Hence we select these two materials as a gate dielectric to present their individual strengths by combining both of them. Moreover, pure HfO\u003csub\u003e2\u003c/sub\u003e was also not at all showing the leakage current density values in the range of nA with various synthesis parameters, such as at different sputtering pressure, substrate temperature, rapid thermal annealing temperatures and substrate bias voltages, where as by mixing them with other dopants such as Ta, Ti, Gd and Zr with HfO\u003csub\u003e2\u003c/sub\u003e it was showing lower leakage currents and better dielectric properties [27].\u003c/p\u003e \u003c/div\u003e"},{"header":"Conclusion","content":"\u003cp\u003eTantalum oxide mixed zirconium oxide-TZO layers deposited on native oxide removed p-silicon substrate using RF magnetron co-sputtering technique. RBS spectra confirm the presence of all three atoms such as tantalum, zirconium and oxygen. Both as-deposited and annealed films were amorphous in nature. The dielectric properties strongly shown the evidence for the relative improvement in interface quality of this mixed TZO/Si stacks even at lower temperature, when compare with individual Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e/Si or ZrO\u003csub\u003e2\u003c/sub\u003e/Si stacks. The reason for this improvement in the dielectric properties of mixed TZO/Si stacks would be the rectification in the disadvantages of mono high-k layer by strengthening the structural, thermal properties. The improvement in the interface engineering was also confirmed by the interface state density values, hysteresis loop of C-V curves. The lower leakage current density values in the order of nano ampere were recorded in the case of annealed TZO devices. Hence in this investigation we observed the strengthened thermodynamic and dielectric properties of TZO layer by mixing the Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e with ZrO\u003csub\u003e2\u003c/sub\u003e, whereas they are showing the instability in both thermodynamic and dielectric behavior while using individually.\u003c/p\u003e"},{"header":"Declarations","content":"\u003cp\u003e\u003cstrong\u003eConflict of interest\u003c/strong\u003e : No conflicts of interest.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eData availability statement:\u003c/strong\u003e The data obtained and discussed analyzed during the current study will be available from the corresponding author upon reasonable request.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eAuthors Contributions:\u0026nbsp;\u003c/strong\u003e\u003c/p\u003e\n\u003cp\u003eThe First author is completely responsible for all the device development and analysis done in the work. Second and third authors contributed for this work while performing composition, structure and electrical measurements as well analysis.\u003c/p\u003e"},{"header":"References","content":"\u003col\u003e\n \u003cli\u003eThe International Roadmap for Devices and Systems (IRDS) 2022\u003c/li\u003e\n \u003cli\u003eS.V. JagadeeshChandra, C.J. Choi, S. Uthanna and G. MohanRao, Structural and electrical properties of radio frequency magnetron sputtered tantalum oxide films: Influence of post-deposition annealing, Materials Science in Semiconductor Processing 13 (2010) 245.\u003c/li\u003e\n \u003cli\u003eC. Chaneliere, J.L. Autran, R.A.B. Devine and B.Balland, Tantalum pentoxide (Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e) thin films for advanced dielectric applications, Mater. Sci. Engg. R: Rep., 22(6) (1998) 269.\u003c/li\u003e\n \u003cli\u003eM. Belt, M.L. Davenport, J. E. Bowers, and D.J. Blumenthal, Ultra-low-loss Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e-core/SiO\u003csub\u003e2\u003c/sub\u003e-clad planar waveguides on Si substrates, Optica, 4(5) (2017) 532. DOI: 10.1364/OPTICA.4.000532.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eS. Datta, \u0026apos;11 High-k gate dielectrics for advanced CMOS\u0026apos;, in Evgeny Y. Tsymbal and others (eds), Multifunctional Oxide Heterostructures (Oxford, 2012; online edn, Oxford Academic, (2013)\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eJ. Robertson, New High-K Materials for CMOS Applications, Comprehensive semiconductor science and technology, 4 (2011) 132-176\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eA. Hojabri, Structural and optical characterization of ZrO2 thin films grown on silicon and quartz substrates, 10 (2016) 219, DOI: 10.1007/s40094-016-0218-8\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eZ. Xiao, K. Kisslinger, S. Chance and S. Banks, Comparison of hafnium dioxide and zirconium dioxide grown by plasma-enhanced atomic layer deposition for the application of electronic materials, Crystals 10 (2020) 136.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eP. Kondaiah, S.V. Jagadeesh Chandra, E. Fortunato, C.J. Choi, G. Mohan Rao, D.V.R.K. Reddy and S. Uthanna, Substrate temperature influenced ZrO\u003csub\u003e2\u003c/sub\u003e films for MOS devices, Surf. Interface. Anal., 52 (2020) 541.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eS. Venkataiah, S.V. Jagadeesh Chandra, M.V. Babu and S. Uthanna, Investigations on compositional, structural and optical properties of thermally oxidized HfO\u003csub\u003e2\u003c/sub\u003e films, Arabian J. Sci. Engg., 47 (2021), 7541.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eH. Nishizawa, N. Yamasaki, K. Matsuoka and H. Mitsushio, J Amer Cer Soc., 65(7) (1982) 343.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eM. Raza, P. Boulet, J.F. Pierson, R. Snyders, St. Konstantinidis, Thermal stability of oxygen vacancy stabilized zirconia (OVSZ) thin films, Surf. Coat. Tech., 409 (2021) 126880.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eA. Mehner, H.K. Westkamp, F. Hoffmann, P. Mayr, Crystallization and residual stress formation of sol-gel-derived zirconia films, Thin Solid Films, 308\u0026ndash;309 (1997) 363\u0026ndash;368\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eK. Kalam, et. al., Atomic layer deposition and properties of ZrO\u003csub\u003e2\u003c/sub\u003e/Fe\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e3\u003c/sub\u003e thin films, Beilstein J. Nanotechnol., 9 (2018) 119.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eS. V. Jagadeesh Chandra, J. Myung-Il, Y.C. Park, J.W. Yoon and C.J. Choi, Effect of Annealing Ambient on Structural and Electrical Properties of Ge Metal-Oxide-Semiconductor Capacitors with Pt Gate Electrode and HfO\u003csub\u003e2\u003c/sub\u003e Gate Dielectric, Mater. Trans. 52(1) (2011) 118.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eJ. Liu , T. Teraji, B. Da, and Y. Koide, Boron-doped diamond MOSFETs with high output current and extrinsic transconductance, IEEE Trans. Electron. Dev., 68 (8) (2021) 3963\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eJ.L. Lyons, A. Janotti, C.G. Van de Walle, The role of oxygen-related defects and hydrogen impurities in HfO\u003csub\u003e2\u003c/sub\u003e and ZrO\u003csub\u003e2\u003c/sub\u003e, Microelectron. Engg., 88 (2011) 1452.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eE. Atanassova, A. Paskaleva, and N. Novkovski, Effects of the metal gate on the stress-induced traps in Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e/SiO\u003csub\u003e2\u003c/sub\u003e stacks, Microelectron. Rel., 48 (2008) 514\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eP. Mishra, S. Nozaki, R. Sakura, H. Morisaki, H. Ono and K. Uchida, Capacitance-Voltage (C-V) hysteresis in the Metal-Oxide-Semiconductor capacitor with Si-nanocrystals deposited by the gas evaporation technique, Mat. Res. Soc. Symp. Proc. 686 (2001) A.5.4.1\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eM. Kumar, S.V. Jagadeesh Chandra, M. Ju, et al., Effects of post deposition annealing atmosphere on interfacial and electrical properties of HfO\u003csub\u003e2\u003c/sub\u003e/Ge\u003csub\u003e3\u003c/sub\u003eN\u003csub\u003e4\u003c/sub\u003e gate stacks, Thin Solid Films, 675 (2019) 16.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eJ.W. Zhang, G. He, H.S. Chen, J. Gao, X.F. Chen, P. Jin, D.Q. Xiao, R. Ma, M. Liu, Z.Q. Sun, Modulation of charge trapping and current-conduction mechanism of TiO\u003csub\u003e2\u003c/sub\u003e \u0026ndash; doped HfO\u003csub\u003e2\u003c/sub\u003e gate dielectrics based MOS capacitors by annealing temperature, J Alloy and Comp., 647 (2015) 1054.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eA. Kahraman, E. Yilmaz, S. Kaya and A. Aktag, Effects of post deposition annealing, interface states and series resistance on electrical characteristics of HfO\u003csub\u003e2\u003c/sub\u003e MOS capacitors, J Mater. Sci. Mater. Electron., 26 (2015) 8277.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eB.G. Naik, S.V. Jagadeesh Chandra and S. Uthanna, Infuence of oxygen partial pressure on the structural, optical and electrical properties of magnetron sputtered Zr\u003csub\u003e0.7\u003c/sub\u003eNb\u003csub\u003e0.3\u003c/sub\u003eO\u003csub\u003e2\u003c/sub\u003e films, Appl. Phys. A 127 (2021) 979.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eJ. Kim, K. Haga, E. Tokumitsu, Investigation of Nb-Zr-O thin flm using sol-gel Coating. Semicond Sci Technol 17 (2017) 245.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eL. An, X. Han, Y. Li, H. Wang, C. Hou, and Q. Zhang, One step synthesis of self-doped F\u0026ndash;Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e nanoshuttles photocatalyst and enhanced photocatalytic hydrogen evolution, International Journal of Hydrogen Energy, 46(5) (2021) 3996.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eE. Koshevaya, M. Vasily, P. Sitnikov, E. Krivoshapkina, and P. Krivoshapkin, Electrosurface properties and acid-base equilibria of Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e and Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e:Eu nanoparticles in NaCl solutions, Surf. Inter., 29 (2022) 10171.\u0026nbsp;\u003c/li\u003e\n \u003cli\u003eKailash Chandra Das, Sputter synthesis of multifunctional hafnium oxide based thin films for gate dielectric and memory applications, Ph.D Thesis, submitted in December, 2017 http://ethesis.nitrkl.ac.in/9384/1/2017_PhD_KCDas_512PH102.pdf\u003c/li\u003e\n\u003c/ol\u003e"}],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":true,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":false,"hideJournal":true,"highlight":"","institution":"","isAcceptedByJournal":false,"isAuthorSuppliedPdf":false,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":false,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true},"keywords":"Tantalum oxide, zirconium oxide, RF sputtering, Interface engineering, di-electric constant, leakage current","lastPublishedDoi":"10.21203/rs.3.rs-3796030/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-3796030/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"\u003cp\u003eTantalum oxide-Ta\u003csub\u003e2\u003c/sub\u003eO\u003csub\u003e5\u003c/sub\u003e mixed zirconium oxide-ZrO\u003csub\u003e2\u003c/sub\u003e (TZO) films were deposited on p-silicon substrates using RF magnetron co-sputtering technique. The presence of tantalum, zirconium and oxygen atoms was confirmed by Rutherford Back Scattering analysis with NDF program. XRD spectra revealed that the as-deposited and annealed TZO films were amorphous in nature. It is observed that the accumulation region has become stable after annealing and also observed the reduction in the intensity of the kinks/bumps at depletion region of the C-V curves. The dielectric constant value is also reasonably in good agreement with the reported values at this annealing temperature. The J-V curves revealed that the annealing process effectively reduced the leakage current density upto nano scale range at this lower annealing temperature. The mixed TZO layer showed relatively better thermodynamic and electrical properties after annealing at even lower temperature.\u003c/p\u003e","manuscriptTitle":"Mixed high dielectric constant layers for MOS devices","msid":"","msnumber":"","nonDraftVersions":[{"code":1,"date":"2024-01-01 22:31:08","doi":"10.21203/rs.3.rs-3796030/v1","editorialEvents":[{"type":"communityComments","content":0}],"status":"published","journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true}}],"origin":"","ownerIdentity":"d02e7840-0ac5-469b-88fe-5ef35c15b238","owner":[],"postedDate":"January 1st, 2024","published":true,"recentEditorialEvents":[],"rejectedJournal":[],"revision":"","amendment":"","status":"posted","subjectAreas":[],"tags":[],"updatedAt":"2024-01-01T22:31:10+00:00","versionOfRecord":[],"versionCreatedAt":"2024-01-01 22:31:08","video":"","vorDoi":"","vorDoiUrl":"","workflowStages":[]},"version":"v1","identity":"rs-3796030","journalConfig":"researchsquare"},"__N_SSP":true},"page":"/article/[identity]/[[...version]]","query":{"redirect":"/article/rs-3796030","identity":"rs-3796030","version":["v1"]},"buildId":"qtupq5eGEP_6zYnWcrvyt","isFallback":false,"isExperimentalCompile":false,"dynamicIds":[84888],"gssp":true,"scriptLoader":[]}