Reconfigurable optical arithmetic logic unit and its applications

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Abstract The growing constraints of Moore’s Law have fundamentally impeded further advancement in the energy efficiency of conventional electronic integrated circuits. In response, integrated photonics has emerged as a promising solution due to its exceptional bandwidth and ultralow latency. Optical digital computing based on integrated photonics offers inherent advantages in operation speed and energy efficiency compared to electronic digital schemes. However, implementing multi-functional arithmetic logic primitives on photonic chips still face a considerable challenge, and the reported works are mainly limited to basic logic gates or isolated computing modules rather than reconfigurable computational systems. Here, we report a reconfigurable optical computing architecture utilizing silicon-based microring modulators, which can implement reconfigurable basic logic operations and various arithmetic logic units, including 2-bit adder, subtractor and digital comparator. The experimental results demonstrate high computational density of 528 Gb/s/mm 2 and energy efficiency of 12.36 fJ/bit at the operation speed of 20 Gb/s. The proposed device’s practical viability is further demonstrated through multiple application scenarios including data encryption and image processing. This work establishes a versatile scheme for photonic computing that addresses critical requirements in operational speed, power efficiency, and functional flexibility simultaneously, thereby paving the way for next-generation high-performance computing systems.
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Reconfigurable optical arithmetic logic unit and its applications | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Article Reconfigurable optical arithmetic logic unit and its applications Yonghui Tian, Xudong Zhou, Mingrui Yuan, Huifu Xiao, Yongheng Jiang, and 1 more This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-8738973/v1 This work is licensed under a CC BY 4.0 License Status: Under Review Version 1 posted You are reading this latest preprint version Abstract The growing constraints of Moore’s Law have fundamentally impeded further advancement in the energy efficiency of conventional electronic integrated circuits. In response, integrated photonics has emerged as a promising solution due to its exceptional bandwidth and ultralow latency. Optical digital computing based on integrated photonics offers inherent advantages in operation speed and energy efficiency compared to electronic digital schemes. However, implementing multi-functional arithmetic logic primitives on photonic chips still face a considerable challenge, and the reported works are mainly limited to basic logic gates or isolated computing modules rather than reconfigurable computational systems. Here, we report a reconfigurable optical computing architecture utilizing silicon-based microring modulators, which can implement reconfigurable basic logic operations and various arithmetic logic units, including 2-bit adder, subtractor and digital comparator. The experimental results demonstrate high computational density of 528 Gb/s/mm 2 and energy efficiency of 12.36 fJ/bit at the operation speed of 20 Gb/s. The proposed device’s practical viability is further demonstrated through multiple application scenarios including data encryption and image processing. This work establishes a versatile scheme for photonic computing that addresses critical requirements in operational speed, power efficiency, and functional flexibility simultaneously, thereby paving the way for next-generation high-performance computing systems. Physical sciences/Optics and photonics/Applied optics/Integrated optics Physical sciences/Optics and photonics/Optical materials and structures/Silicon photonics optical digital computing optical arithmetic logic unit electro-optical logic operation Full Text Additional Declarations There is NO Competing Interest. Supplementary Files Supplementaryinformation.pdf Supplementary information of the manuscript Cite Share Download PDF Status: Under Review Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. 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