Research SubRTL: A Modular Subgraph Technique for RTL Hardware Trojan Detection Based on Graph Neural Network Approach

Research SubRTL: A Modular Subgraph Technique for RTL Hardware Trojan Detection Based on Graph Neural Network Approach | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article Research SubRTL: A Modular Subgraph Technique for RTL Hardware Trojan Detection Based on Graph Neural Network Approach Anindita Chattopadhyay, Siddharth Bisariya, Vijay Kumar Sutrakar This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-9457464/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract The growing complexity of modern system-on-chip (SoC) architectures has intensified the threat of Hardware Trojans (HTs), which can maliciously alter functionality, leak sensitive data, or enable remote activation post-fabrication. Traditional rule-based and simulation-guided detection techniques struggle to scale with million-gate designs and often require golden reference models, limiting their practicality in real-world supply chains. In the present work a modular Hardware Trojan localization framework based on Graph Neural Networks (GNNs) is proposed that directly operates on large-scale Register transfer language (RTL) designs without relying on golden chips or side-channel signatures. Unlike existing graph-based approaches that treat the netlist as a monolithic structure, SubRTL performs hierarchical graph partitioning and modular learning, enabling scalability to industrial-grade designs exceeding millions of gates while preserving graph topology and functional context. The proposed approach integrates structural, functional, and graph based node embeddings, learning Trojan-aware representations through supervised and self-supervised joint training. Extensive experiments on Trust-Hub, benchmarks demonstrate up to 5× reduction in memory footprint compared to state-of-the-art GNN-based detectors. Furthermore, the model generalizes to unseen Trojan families with minimal re-training, indicating resilience against adversarial insertion strategies. The results highlight the viability of modular GNN-based analysis as a scalable and automation-friendly solution for hardware security assurance in pre-silicon verification flows. Hardware Trojans Graph Neural Networks (GNNs) Modular Hardware Trojan Localization RTL Analysis Full Text Additional Declarations No competing interests reported. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. 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Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-9457464","acceptedTermsAndConditions":true,"allowDirectSubmit":false,"archivedVersions":[],"articleType":"Research Article","associatedPublications":[],"authors":[{"id":626558353,"identity":"53301daf-84cf-48fd-bce3-c3ff4f71e024","order_by":0,"name":"Anindita Chattopadhyay","email":"","orcid":"","institution":"BMS College of Engineering","correspondingAuthor":false,"prefix":"","firstName":"Anindita","middleName":"","lastName":"Chattopadhyay","suffix":""},{"id":626558354,"identity":"8ba4aa6b-bec9-4b6c-b4e6-51d561e713bf","order_by":1,"name":"Siddharth Bisariya","email":"","orcid":"","institution":"Aeronautical Development Establishment","correspondingAuthor":false,"prefix":"","firstName":"Siddharth","middleName":"","lastName":"Bisariya","suffix":""},{"id":626558355,"identity":"3eca971e-1951-4c27-86c4-2ef3b5fa9f95","order_by":2,"name":"Vijay Kumar Sutrakar","email":"data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAZAAAAAyAQMAAABI0h/eAAAABlBMVEX///8AAABVwtN+AAAACXBIWXMAAA7EAAAOxAGVKw4bAAAArUlEQVRIiWNgGAWjYDACHhDBxiAH5iSQosWYdC2JDUS7y+DM8QcMP8ps0ue79xgwPNxBjJazPQaMPefScjeeOWPAkHiGCC2S/UCX8bYdzt04Iy2BIbGNKC3sDxj/tv1PNyRaCz9vgwEzb9uBBHmJ5ANEauE5Y3BY5lyy4QaewwcOEKWFjSf94cM3ZXby8u2NjQ9/EqMFBA6ACIMDUAbxQL6BNPWjYBSMglEwggAAeNo1EwEyAd8AAAAASUVORK5CYII=","orcid":"","institution":"Aeronautical Development Establishment","correspondingAuthor":true,"prefix":"","firstName":"Vijay","middleName":"Kumar","lastName":"Sutrakar","suffix":""}],"badges":[],"createdAt":"2026-04-18 18:23:27","currentVersionCode":1,"declarations":"","doi":"10.21203/rs.3.rs-9457464/v1","doiUrl":"https://doi.org/10.21203/rs.3.rs-9457464/v1","draftVersion":[],"editorialEvents":[],"editorialNote":"","failedWorkflow":false,"files":[{"id":108494185,"identity":"6f1c8dd4-778b-4cfa-9363-7c4ef4af4681","added_by":"auto","created_at":"2026-05-05 10:02:50","extension":"pdf","order_by":1,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":706231,"visible":true,"origin":"","legend":"","description":"","filename":"SubGraphHTDetection180426v1.pdf","url":"https://assets-eu.researchsquare.com/files/rs-9457464/v1_covered_ca4bb05f-9464-4f33-bf8a-3a640d77a241.pdf"}],"financialInterests":"No competing interests reported.","formattedTitle":"Research SubRTL: A Modular Subgraph Technique for RTL Hardware Trojan Detection Based on Graph Neural Network Approach","fulltext":[],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":false,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":true,"hideJournal":true,"highlight":"","institution":"","isAcceptedByJournal":false,"isAuthorSuppliedPdf":true,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":true,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true},"keywords":"Hardware Trojans, Graph Neural Networks (GNNs), Modular, Hardware Trojan Localization, RTL Analysis","lastPublishedDoi":"10.21203/rs.3.rs-9457464/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-9457464/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"\u003cp\u003eThe growing complexity of modern system-on-chip (SoC) architectures has intensified the threat of Hardware Trojans (HTs), which can maliciously alter functionality, leak sensitive data, or enable remote activation post-fabrication. Traditional rule-based and simulation-guided detection techniques struggle to scale with million-gate designs and often require golden reference models, limiting their practicality in real-world supply chains. In the present work a modular Hardware Trojan localization framework based on Graph Neural Networks (GNNs) is proposed that directly operates on large-scale Register transfer language (RTL) designs without relying on golden chips or side-channel signatures. Unlike existing graph-based approaches that treat the netlist as a monolithic structure, SubRTL performs hierarchical graph partitioning and modular learning, enabling scalability to industrial-grade designs exceeding millions of gates while preserving graph topology and functional context. The proposed approach integrates structural, functional, and graph based node embeddings, learning Trojan-aware representations through supervised and self-supervised joint training. Extensive experiments on Trust-Hub, benchmarks demonstrate up to 5\u0026times; reduction in memory footprint compared to state-of-the-art GNN-based detectors. Furthermore, the model generalizes to unseen Trojan families with minimal re-training, indicating resilience against adversarial insertion strategies. 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