Wafer-scale Fabrication of CMOS-compatible Trapping-mode Infrared Imagers with Colloidal Quantum Dots

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Abstract

Abstract Silicon-based complementary metal-oxide-semiconductors (CMOS) devices have dominated the technological revolution in the past decades. With increasing demands in machine vision, autonomous driving, and artificial intelligence, Si-CMOS imagers, as the major optical information input devices, face great challenges in spectral sensing ranges. In this paper, we demonstrate the development of CMOS-compatible infrared colloidal quantum dots (CQDs) imagers in the broadband short-wave and mid-wave infrared ranges (SWIR and MWIR, 1.5-5µm). A new device architecture of trapping-mode detector is proposed, fabricated, and demonstrated with lowered dark currents and improved responsivity. The CMOS-compatible fabrication process is completed with two-step sequential spin-coating processes of intrinsic and doped HgTe CQDs on an 8-inch CMOS readout wafer with photoresponse non-uniformity (PRNU) down to 4%, dead pixel rate of 0%, external quantum efficiency up to 175%, and detectivity as high as 2×1011Jones for extended SWIR (cut-off wavelength=2.5µm) @ 300K and 8×1010Jones for MWIR (cut-off wavelength=5.5µm) @ 80K. Both SWIR images and MWIR thermal images are demonstrated with great potential for semiconductor inspection, chemical identification, and temperature monitoring.

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last seen: 2026-05-19T01:45:01.086888+00:00