Locality Sensitive Hardware Signature Variants for Hardware Transactional Memory

Abstract Lock based techniques have its own limitations like priority inversion, convoying, and deadlock. Lock free techniques overcome those mentioned limitations. Transactional memory (TM) is one leading lock free technique used in recent multi core processors like Intel Haswell and IBM BlueGene/Q. TM has to do data versioning and conflict detection. For conflict detection probabilistic data structure called Bloom Filters are used. Bloom filter based hardware signatures are used in TM. In TM shared memory conflicts like RAW, WAR, and WAW hazards are handled by Bloom Filter (BF). Hardware signatures store memory addresses in hashed form on Bloom filters. Bloom filters are easy to use, performance efficient data structures lead to false positive but never support false negative. Locality sensitive hardware signatures reduce filter occupancy by sharing bits for the contiguous memory addresses, in turn reduces the false positive rate. This paper implements existing H3 – HS and LS – HS proposed by Ricardo Quislant et al. [13]. Also this paper proposes RS – HS, CS – HS, and RO – HS. RO – HS equally spreads addresses among bloom filters thereby reduces filter occupancy. In turn reduced filter occupancy leads to better False Positive Rate.