A Generalized SMCF-Driven Adaptive Test Framework for Pre-Silicon Verification of On-Chip Sensors with Formal and Stochastic Modeling

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Abstract Emerging sub-7 nm systems-on-chip (SoCs) dissipate power densities exceeding 1 W mm⁻², leaving only a narrow thermal guard-band before devices cross their safe-operating limits. ARM’s System Monitoring and Control Framework (SMCF) unifies access to on-chip monitors through a single register map, yet production-grade verification of the sensors themselves remains largely manual and occurs late in the development life-cycle. This paper presents a self-checking, SMCF-driven automated test engine that validates a ring-oscillator temperature sensor entirely within an ARM Fast Models virtual platform prior to first silicon. To enhance analytical rigor, we incorporate formal modeling of thermal noise and sensor drift using a stochastic simulation framework, providing insight into system stability under statistical variance. The architecture further generalizes to support other sensor types—such as voltage droop or current monitors—through a sensor-agnostic LISA+ specification and test engine interface. A novel adaptive test pattern generation strategy is introduced, using functional coverage metrics and statistical predictions to dynamically prioritize stimulus and maximize validation efficiency. Additionally, an AI-guided coverage estimator is embedded for predictive validation feedback. The C + + testbench consumes LISA-generated register definitions, drives enable and reset clocks over PV Bus, and exhaustively sweeps the frequency-to-temperature (F↔T) golden table with ± 1% accuracy. A Robot Framework layer publishes every check as a keyword, enabling readable scripts, interactive HTML dashboards, and seamless Jenkins continuous-integration hooks. Initial experiments achieve 100% functional coverage in less than 90 s of wall-clock run-time, while capturing edge-case thermal violations and maximizing pre-silicon validation throughput.
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A Generalized SMCF-Driven Adaptive Test Framework for Pre-Silicon Verification of On-Chip Sensors with Formal and Stochastic Modeling | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Article A Generalized SMCF-Driven Adaptive Test Framework for Pre-Silicon Verification of On-Chip Sensors with Formal and Stochastic Modeling Sowmya K B, Lalith K This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-9145040/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract Emerging sub-7 nm systems-on-chip (SoCs) dissipate power densities exceeding 1 W mm⁻², leaving only a narrow thermal guard-band before devices cross their safe-operating limits. ARM’s System Monitoring and Control Framework (SMCF) unifies access to on-chip monitors through a single register map, yet production-grade verification of the sensors themselves remains largely manual and occurs late in the development life-cycle. This paper presents a self-checking, SMCF-driven automated test engine that validates a ring-oscillator temperature sensor entirely within an ARM Fast Models virtual platform prior to first silicon. To enhance analytical rigor, we incorporate formal modeling of thermal noise and sensor drift using a stochastic simulation framework, providing insight into system stability under statistical variance. The architecture further generalizes to support other sensor types—such as voltage droop or current monitors—through a sensor-agnostic LISA+ specification and test engine interface. A novel adaptive test pattern generation strategy is introduced, using functional coverage metrics and statistical predictions to dynamically prioritize stimulus and maximize validation efficiency. Additionally, an AI-guided coverage estimator is embedded for predictive validation feedback. The C + + testbench consumes LISA-generated register definitions, drives enable and reset clocks over PV Bus, and exhaustively sweeps the frequency-to-temperature (F↔T) golden table with ± 1% accuracy. A Robot Framework layer publishes every check as a keyword, enabling readable scripts, interactive HTML dashboards, and seamless Jenkins continuous-integration hooks. Initial experiments achieve 100% functional coverage in less than 90 s of wall-clock run-time, while capturing edge-case thermal violations and maximizing pre-silicon validation throughput. Physical sciences/Engineering Physical sciences/Mathematics and computing On-Chip Sensor Verification Temperature Sensor Robot Framework Automation Thermal Noise Simulation Formal Modelling Full Text Additional Declarations No competing interests reported. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. 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