Using DC transistor characterization measurements for LNA design at cryogenic temperatures

Using DC transistor characterization measurements for LNA design at cryogenic temperatures | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article Using DC transistor characterization measurements for LNA design at cryogenic temperatures Giovani BRITTON, Salvador MIR, Estelle LAUGA-LARROZE, Benjamin DORMIEU, and 6 more This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-7754596/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract The design of RadioFrequency (RF) cryogenic circuits has attracted much interest in recent years due to applications such as quantum computers. Interface electronics with ultra-low levels of power consumption at temperatures as low as 4 K are required. Silicon technologies are being considered for implementation because of the possibility of large-scale qubit integration with energy-efficient readout and control interfaces. However, the design of RF cryogenic circuits is complicated because of the lack of standard design kits with the corresponding component models for their simulation at these temperatures. Alternative approaches to avoid costly design and fabrication cycles are possible, in particular the use of Look-Up-Table (LUT)-based techniques that exploit characterization data of circuit components at cryogenic temperature. In this paper, we make use of this approach for the design of a RF Low Noise Amplifier (LNA) using a 28 nm FD-SOI technology that has been characterized at cryogenic temperatures 1 using DC measurements. Furthermore, we also experimentally demonstrate that the DC measurements used are valid to extract the transistor noise parameters used in the LUT-based analysis. Cryo-CMOS LNA Qubit Look-Up Table Fano factor Full Text Additional Declarations No competing interests reported. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-7754596","acceptedTermsAndConditions":true,"allowDirectSubmit":true,"archivedVersions":[],"articleType":"Research Article","associatedPublications":[],"authors":[{"id":589886856,"identity":"3dba7ca7-85ec-493c-b9ce-c89215f95b2f","order_by":0,"name":"Giovani BRITTON","email":"data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAZAAAAAyAQMAAABI0h/eAAAABlBMVEX///8AAABVwtN+AAAACXBIWXMAAA7EAAAOxAGVKw4bAAAA5klEQVRIiWNgGAWjYFACHgaGBDCD+QCQsGCAcQloSTAAMthASiWI1MIA1sJjQJwWefezxz48/PFHzpy955t0QY0EAz97jgHDjwrcWgzP5CXPADrM2LLn7DbpGcckGCR73hgw9pzBo2UGjzHIL4kbbuRuk+Zhk2AwuJFjwMzYRpSWnGfSPP8kGOwJaZGXQGhhk+ZtA9oiQUCLAU9eMkNCmrGxwZljxta8fRI8EmeeFRzE5xf59rOHGX/YyMkZHG9+eJvnm40cf3vyxgf4QszgAJoAKJoY0AVRbWnAJzsKRsEoGAWjAAQAYFpIbR9ikwQAAAAASUVORK5CYII=","orcid":"","institution":"STMicroelectronics","correspondingAuthor":true,"prefix":"","firstName":"Giovani","middleName":"","lastName":"BRITTON","suffix":""},{"id":589886859,"identity":"aa5ed3e2-1975-43b2-ac9d-d9a9b7629f71","order_by":1,"name":"Salvador MIR","email":"","orcid":"","institution":"Univ. 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