A Theoretical Modeling Analysis of Adapted Composite CNT Bundle for High-Speed VLSI Interconnect

The aroused quest to reduce the delay at interconnect level is the main urge of this paper to come across a configuration of Carbon Nanotube (CNT) bundle namely squarely packed bundle of composite CNTs. The approach, demonstrated in this paper, adapts the composite bundle to adopt for high speed Very Large Scale Integration (VLSI) interconnect with technology sizing down. To reduce the delay of the proposed configuration of composite CNT bundle, the behavioral change of Resistance (R), Inductance (L) and Capacitance (C) has been observed with respect to both width of the bundle and diameter of the CNTs in the bundle. Consequently, the performance of the modified bundle configuration is compared with previously developed configuration namely squarely packed bundle of dimorphic MWCNTs in terms of propagation delay and crosstalk delay at local, semiglobal and global level interconnect. The proposed bundle configuration is ultimately enacted as better one for 32nmand 16nmtechnology node and suitable for 7nmas well.