AI-Optimized VLSI Architecture for Energy-Efficient and Sustainable IoT Systems | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article AI-Optimized VLSI Architecture for Energy-Efficient and Sustainable IoT Systems Shujaatali Badami, Anshul Sharma, Bhaskar Reddy, Shailesh Kadam, and 2 more This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-8564604/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract The artificial intelligence (AI) and Internet of things (IoT) boom have caused the necessity to implement energy-efficient hardware platforms capable of delivering smart computations in real-time at the network border. Traditional VLSI design tooling can generally not be used to implement sustainable IoT designs, as they cannot realize high performance and low power consumption at the same time. It proposes an AI-Optimized VLSI Architecture, a design approach that uses machine learning-based design-space exploration and provides machine learning-based adaptive power management and energy harvesting schemes to achieve significant performance-per-watt advantages. The framework presented applies reinforcement learning, genetic algorithms and Bayesian optimization to optimize the parameters of synthesis and layout intelligently, maximizing power delay trade-offs. According to the simulations of Cadence and Synopsys design tools, the company has saved power by 43.3 percent, delay by 29.7 percent and energy by 52 percent compared to conventional VLSI systems. Further, the architecture incorporates dynamic voltage and frequency scaling (DVFS), clock gating, and AI-based power gating to achieve leakage and computation energy minimization that prolong device life in energy-constrained internet of things. This paper empirically demonstrates that allowing AI-directed optimization, the sustainability, scalability, and flexibility of next-generation clean-energy-based electronic systems can dramatically increase their viability. Electrical Engineering Computer Architecture and Engineering Artificial Intelligence and Machine Learning AI-optimized VLSI low-power design energy-efficient hardware IoT systems clean energy electronics reinforcement learning design-space exploration dynamic power management edge computing sustainable semiconductor design Full Text Additional Declarations The authors declare no competing interests. Associated Publications Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. 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