Study and Optimization of Field Limiting Rings for 10kV SiC Insulated Gate Bipolar Transistor

Abstract A 10kV-level silicon carbide (SiC) insulated gate bipolar transistor (IGBT) with field limiting rings (FLRs) is designed and simulated with Sentaurus TCAD, the detailed optimization method and comparisons are presented in this paper. Linearly varying spacing between rings is introduced to SiC IGBT and adjustment is performed on width of rings, the final structure achieves a breakdown voltage over 12kV with a termination length of 164.5 µm , which is 69.93% lower than that of conventional structure with a fixed ring spacing. Moreover, the final design can decrease the sensitivity to the interface charges, the tolerance to positive surface charges exceeds 8 × 10 11 cm − 2 , which is 3.5 times that of the conventional structure. Besides, double pulse measurements prove no degradation of conduction and switching characteristics.