Electrostatic Characteristics of High-k Stacked Gate-All-Around Heterojunction Tunnel Field Effect Transistor using Superposition Principle

Abstract We use superposition method to model the electrostatic characteristics of high-k stacked Gate-All-Around Hetero Junction TFETs (GAA-HJTFETs). The hetero junction is set up by using Ge/Si material in the source/channel respectively. The modeling is accomplished by considering the space charge regions at the source-channel/drainchannel junctions and the channel region. The surface potential in the channel region is obtained by applying superposition principle, where as in source/drain it is derived by solving 2-D/1-D Poisson's equation respectively. Furthermore, the electric field and drain current are modeled from the surface potential and Kane model respectively. The results are confirmed using ATLAS TCAD simulation.