Design,Simulation And Analysis of Junction Version Multi-Fin FINFET

This paper presents a 3-D statistical simulation study of Multi-fin junction FinFET for different technology nodes 32nm, 24 nm & 10 nm. For each and every technology node their corresponding Electrical parameters like on current (Ion), off current (Ioff), threshold voltage ( V th ) are reported in the paper and also RF/Analog parameters like transconductance (gm), output conductance (gd), intrinsic gain (gm/gd) are reported. And also parameters like Electric field (E), Electron density ( ne ), Electron mobility (µ) which are measured across the device length are simulated. The proposed structure showed performance improvement in all the parameters when the technology node is decreased.