A 128 Gbps PAM-4 feed forward equalizer with optimized 1UI pulse generator in 65nm CMOS

This letter presents a 4-level Pulse Amplitude Modulation (PAM-4) Feed Forward Equalizer (FFE) with a novel Internal-Node-Charge-Controlled 1-Unit Interval Pulse Generator (INCC 1UIPG). Partially segmented architecture and tailless 1-stage front-end are chose to reduce the overall load capacitance for better bandwidth and power performance. The proposed INCC 1UIPG adopts a 2-stage structure and precisely controls the internal nodes, reducing average transition time by ~30% compared with the prior works. The wider bandwidth and the faster transition edge allow the implementation of the equalizer working at 128Gbps with a 0.39pJ/bit power efficiency and an area of 0.014mm2 in 65nm CMOS, which advance the state-of-the-art with a mature technology.