24-Bit Audio Delta Sigma ADC Based on a Switched Capacitor Preamplifier

This study proposes a novel 24-bit delta sigma analogue-to-digital converter (ADC) for an audio system-on-chip (SOC) with a fully differential switched-capacitor preamplifier and a capacitor-array DAC feedback structure. This system reduces the equivalent input noise and overcomes the nonlinearity and circuit complexity caused by the multi-bit quantiser, This structure also improves the accuracy of the quantiser and achieves zero static-power consumption. Combined with the capacitor array DAC feedback structure, the entire system does not require additional reference voltage, which reduces power consumption and is more conducive to system integration on the chip simultaneously. Finally, the design achieves a maximum signal-to-noise ratio (SNR) of 120 dB and a low static power consumption of 5 mW at a sampling rate of 24.576 MHz.