Adaptive Fault-Tolerant PID Control Synthesis for Buck Converters via Multi-Objective Genetic Algorithm Optimization | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Research Article Adaptive Fault-Tolerant PID Control Synthesis for Buck Converters via Multi-Objective Genetic Algorithm Optimization Muzammil Ahmed, Shyamantak Raj Barman This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-7939089/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract This paper presents a Genetic Algorithm (GA)-optimized PID control strat egy for DC–DC buck converters, developed to ensure robust voltage regulation under multiple fault and degradation conditions. Conventional PID controllers, typically tuned using heuristic methods, suffer from poor adaptability when passive components such as inductors and capacitors undergo aging or ther mal stress. The proposed GA-based tuning framework overcomes this limitation by optimizing the proportional (K p ), integral (K i ), and derivative (K d ) gains using a multi-scenario fitness formulation that minimizes the Integral Absolute Error (IAE) and overshoot across diverse operating conditions. The methodol ogy explicitly accounts for simultaneous degradation of both the inductor and capacitor—a dual-fault scenario often neglected in literature—which significantly alters converter dynamics and stability margins. High-fidelity PLECS simula tions are carried out considering practical non-idealities including equivalent series resistance (ESR), diode voltage drops, switching dead-time, and measure ment noise. Stability is verified through eigenvalue and Lyapunov analyses of the closed-loop system. Simulation results confirm that the GA-optimized PID controller provides superior performance with minimal overshoot (< 5%), rapid settling time (< 0.6 ms), and effective rejection of load, input, and compo nent disturbances. The proposed approach offers a computationally efficient and hardware-compatible framework for robust converter control in safety-critical applications such as renewable energy systems and electric vehicles. Electrical Engineering Buck converter Genetic Algorithm (GA) Fault-tolerant control PID optimization Passive component degradation Stability analysis Full Text Additional Declarations The authors declare no competing interests. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. 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