Study on Strengthening Structure of Single Event Effect

Study on Strengthening Structure of Single Event Effect | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Article Study on Strengthening Structure of Single Event Effect Minru Hao, Yuchen Wang, Danting Chen, Jiajun Li This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-5001077/v1 This work is licensed under a CC BY 4.0 License Status: Posted Version 1 posted You are reading this latest preprint version Abstract Based on the structure of inverter chain, the charge collection mechanism of bipolar amplification effect of NMOS device is studied. With the reduction of device size, bipolar amplification leads to the failure of the original charge collection model due to funnel and diffusion mechanism. Based on the damage mechanism of single event transient (SET) of MOS device, two classical reinforcement structures of source extended and drain extended are proposed, and effectively reduces the transient current of drain electrode. The reinforcement characteristics of the two structures are simulated, and they are compared and discussed. It is found that the reinforcement effect of the extended drain structure is more obvious. Therefore, the simulation results of new reinforcement structure provide valuable reference for research on irradiation reliability and application of strained MOS integrated circuit. Physical sciences/Engineering/Electrical and electronic engineering Physical sciences/Nanoscience and technology Physical sciences/Physics Single event transient (SET) Bipolar amplification effect Source extended structure Drain extended structure Figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16 Figure 17 Figure 18 Figure 19 1. Introduction The most elementary steps associated with the interaction of ionizing radiation with semiconductor devices are the generation and collection of charge at the transistor level. These represent the primary events from which all other single-event effects follow (single-event upset, single-event transient generation/propagation, single-event latch up, single-event gate rupture, to name a few). Strained technology has been widely used to improve the performance of Si CMOS devices, and strained-Si technologies have caught much attention as device size is scaling down [1-4], especially in the application of strained IC under single event effect (SEE) [5-6]. Single-event transient (SET) is the main radiation-induced noise and source of the soft error in advanced CMOS integrated circuits (ICs) [7−8]. At present, the development of anti-radiation devices is usually a repeated process of "designing, manufacturing, and testing", which is very expensive, and the cycle of repeated design is very long [9-10]. Therefore, the Sentaurus TCAD simulation has an advantage in anti-radiation research. With the reduction of device size, the effect of bipolar amplification leads to the failure of the original charge collection model based on funnel and diffusion mechanism. Therefore, the influence of bipolar amplification components on charge collection cannot be ignored. What is more, the reliability of microelectronic devices and integrated circuits with MOS as the core of the satellite and spacecraft is becoming more and more serious after the bombardment of the high energy single particles in outer space [11-14], which the microelectronic devices and integrated circuits can’t run normally, so that the reliability of the electronic system is reduced. Therefore, it is very meaningful and imperative to design new reinforced structure to resist the single event effect [15-16]. Narasimham et al [17-18] proposed protection ring and leakage reinforcement structure, protection belt and well contact reinforcement structure, and Chen et al [19-20] proposed virtual transistor reinforcement structure, source expansion structure, etc. They just reinforced the individual device. In this paper, it is used in the inverter chain, and two classical structures are compared. Based on above analysis, two classical reinforcement structures of NMOS devices are proposed, source and drain extended structure, and effectively reduces the transient current of drain electrode. The simulation results of new reinforcement structure provide valuable reference for research on irradiation reliability and application of strained integrated circuit of MOS. 2. Bipolar effect of inverter chain The hybrid simulation of the inverter chain has been proved to be an effective way to study the single event transient. The structure of 7-Stage inverter chain is adopted for research, which is shown in Fig.1. N1 transistor uses device simulation, and the rest transistor uses bsim-4 model of Berkeley University to simulate SPICE circuit. The gate length W/L of N and P tube are 300nm/50nm and 600nm/50nm, respectively. The parameters of the heavy ion model are shown in Table 1. LET is set to 20MeV·cm 2 /mg. SET is generated at the N1 tube, and then propagated in the 7 stage inverter chain. The voltage pulse is observed at the output end of the inverter chain. Table I. Partial model parameters of heavy ion. Parameter Let_f/pc.um -1 Wt_hi/um Time/s Direction Location Value 0.02 0.015 1.0e-11 (0,1) (0,0) When the input terminal of inverter chain and the drain of N1 tube are at high level, the drain of N1 tube is bombarded by heavy ions. The source and drain current curve of N1 and the voltage change of N1are obtained by mixed simulation, as shown in Fig.2. The SET current of inverter link N1 is much smaller, and its peak current is only 2.5mA. The output voltage pulse is as shown in Fig.3. It can be seen that the voltage at the out terminal increases from 0 to 0.94V due to the diffuse of N1 tube transient pulse and the propagation of 5-stage inverter chain. 3. Source expansion reinforcement structure In the inverter chain, the drain of NMOS is connected to the power supply through the pull-up PMOS. When the incident particles bombard the NMOS in the inverter chain, there is a voltage pulse at the drain of the NMOS. Due to the decrease in drain potential, the body potential will decrease, so the source body junction maintains reverse bias, at which point the source potential>drain potential>body potential. The source plays a role in helping the drain share the charge in charge collection. Based on the positive current action of the source in the inverter, the source expansion structure can be introduced, as shown in Fig.4. The left side of the device is the normal NMOS area, which is the device to be reinforced and has the same function as the normal NMOS. On the right side is the extended source region, which is the same as the source doping of NMOS transistor and connected to V ss as the source electrode. NMOS transistor and PMOS consist of an inverter. After high-energy particles are incident and bombard the drain region, a large number of electron hole pairs are generated along the incident track. The drain collects electrons through funnel assisted drift, on the one hand, the expansion of the funnel field will cause disturbance to the substrate potential; On the other hand, the accumulation of escape recombination holes in the body raises the potential of the body region, which reduces the potential barrier of the source body junction, and leads to forward bias of the source body junction, thereby triggering the injection of electrons from the source region into the channel region and the substrate. The effect of the increased source extension electrode is consistent with that of the source electrode, absorbing some of the substrate's hot electrons, so the amount of charge absorbed by the drain electrode will be reduced. There are two source poles in the expanded layout, which is equivalent to two NMOS devices in parallel. In order to maintain the original current size, the width of NMOS devices is reduced by half. The layout is shown in Fig.5 compared with the traditional layout, and the improved parallel NMOS device has two advantages: first, the drain area is reduced by half, so the SET sensitive area is reduced accordingly; second, the source splitting is located on both sides of the drain, and its effect is that the source can collect ionized electrons from both sides after the particles impact the drain of the device, the source is in the same position as the traditional structure more efficient in collecting ionized electrons. Therefore, the charge collected at the drain will be reduced to achieve the purpose of reinforcement. The source expansion and reinforcement structure model of the 50nm NMOS device is as follows: the 50 nm NMOS device is built on the p-Si substrate of 4μm × 4μm × 4μm × 10μm, and adopts the double well CMOS technology. The structure includes the well region and the NMOS tube active region. The distance between source and channel is 50nm, and the distance between well contact and NMOS is 0.4μm, which structure is shown in Fig.6. The source expansion structure is that the drain is not directly connected to the power supply, but connected to the power supply through the pull-up PMOS tube, which is mostly the case in CMOS circuits. Therefore, the source expansion structure is simulated and used in the simplest CMOS circuit inverter. The two gates are connected, and the source and the additional source are connected to the V ss . The connection diagram is shown in Fig.7. Using TCAD for numerical simulation, the physical model is the same as the previous one. LET is set to 5MeV·cm 2 /Mg, 10MeV·cm 2 /Mg, 20MeV·cm 2 /Mg, 40Mev·cm 2 /Mg, respectively. SET pulse is observed and compared it with traditional CMOS results. As shown in Fig.8, after the incident particles bombard the NMOS device, SET pulses are generated at the drain electrode. After the reinforcement of the source expansion structure, the drain electrode area is reduced by half. Because the drain electrode potential is reduced, the two source electrodes help the drain electrode share the electrons generated by ionization in the charge collection process. Therefore, for incident particles with different LET values, compared with traditional NMOS, the SET voltage pulse width generated by source electrode expansion and enhancement is significantly reduced. This shows that the source extended structure can alleviate SET. When LET is 20MeV•cm 2 /Mg, SET pulse width of traditional NMOS is 62.4ps, and SET pulse width of drain extension is 46.86ps; When LET= 40MeV•cm 2 /Mg, SET pulse width of traditional NMOS is 117.21ps, and SET pulse width of drain extension is 89.38ps. In order to analyze the reinforcement effect of the source, the actual reduction of the pulse width of the output in the source extended NMOS is obtained through simulation, as shown in Fig.9. For the traditional NMOS devices with the width of 150nm and 300nm, the width of the two devices is half different, and the sensitive area is also half different, but the SET pulse width of the two devices is almost no big difference, which also shows that only reducing the drain area can hardly reduce the set pulse width. Thus, the source is the key factor to reduce the pulse width in the source extended NMOS. 4. Reinforced structure with expanded drain The purpose of drain expansion is to use auxiliary electrodes to help the drain region absorb the generated electron hole pairs, which reduce the collection of drain charges, and thus reduce the impact of single particle transient effects. The schematic diagram of the drain expansion and reinforcement structure is shown in Fig.10. On the left side is the NMOS device area, and NMOS tube is the device to be strengthened, which has the same function as conventional NMOS tube. The area on the right of NMOS is the additional electrode area. The drain area is extended as the additional electrode and connected to V ds . The doping type of drain extension is the same as that of drain, and the doping between drain extension and drain is the same as that of channel doping. Therefore, the process of the extended region is the same as that of NMOS devices. After the impact of the incident particle, the ionization along the particle trajectory generates charges, and some electrons will drift and diffuse through the funnel to be collected by the drain electrode, resulting in single event transient generating large current; the other part, the drain electrode expands to N + doping, and the electrode is connected to V ds , so that the drain electrode expansion will also absorb the electrons generated by the ionization. Thus, the single event charge collection of drain electrode is weakened. The drain extension reinforcement structure of 50nm NMOS device is constructed as shown in Fig.11. Firstly, the single event numerical simulation of drain extended device model using TCAD is carried out, and the charge collection of drain is studied. The simulation LET is set to 5MeV • cm 2 /Mg, 10MeV• cm 2 /Mg, 20MeV•cm 2 /Mg, 40Mev • cm 2 /Mg, respectively, and drain current is shown in Fig.12. Regardless of the LET value, the drain current of the drain extension structure is smaller than that of the conventional NMOS transistor. The Fig.12 shows that the current of LET=40Mev·cm 2 /Mg is taken out. It can be seen that the current of the additional drain after the incident particle bombards the device is positive, which results in the current of the drain collection being reduced, and shows that the additional drain plays a role in alleviating the charge collection of the drain. With the increase of LET, the gap of drain current between the drain extended structure and the conventional NMOS device increases gradually, so the drain extended structure has weakening effect on SET current. The SET current in Fig.12 is integrated separately to obtain the collection charge corresponding to different LET values of conventional NMOS and drain extension structure, as shown in Fig.13. It can be seen from the Fig.13 that for different LET values, the collection charge of drain extended structure is smaller than that of conventional NMOS devices. When LET is 40Mev·cm 2 /Mg, the difference between the collection charges of the two devices is 14.95%, which shows that the reinforcement effect of drain extended structure for single event transient is very obvious. The drain extension structure is used in the inverter chain. NMOS devices are connected to the power supply V dd through the pull-up PMOS tube, and the additional drain is directly connected to the power supply V dd , as shown in Fig.14. The simulation results show that the SET voltage pulse width comparison is shown in Fig.15. By integrating the SET currents in Fig.15, we obtained the collected charges corresponding to different LET values for conventional NMOS and drain extended structures, as shown in Fig.15. From the graph, it can be seen that for different LET values, the collected charges of the drain extended structure are smaller than those of conventional NMOS devices. When the LET is 40 MeV · cm 2 /mg, the difference in collected charges between the two is 14.95%, indicating that the drain extended structure has a significant reinforcement effect on single particle transients. When LET is 20 MeV·cm 2 /Mg, SET pulse width of traditional NMOS is 62.41ps, and SET pulse width of drain extension is 40.56ps; when LET is 40 MeV·cm 2 /Mg, SET pulse width of traditional NMOS is 117.21ps, and SET pulse width of drain extension is 76.35ps. 5. Comparison and discussion of two reinforcement structures Both the source expansion and drain expansion reinforcement structures help the drain absorbing the charge generated by ionization through an additional electrode area, and compared with the reinforcement effects of the two structures, as shown in Fig.16. It can be seen from Fig. 16, both the drain extension structure and the source extension structure compared with the traditional NMOS can effectively reduce the SET pulse width of NMOS. When the LET is 40 MeV·cm 2 /Mg, the pulse width of the traditional NMOS is 117.21ps, while the pulse width of the source extended structure and drain extended structure is only 89.38ps and 76.35ps, which are reduced by 23.73% and 34.85%, respectively. According to the above results, it can be seen that the SET pulse can be effectively reduced by the two kinds of reinforced structures. In the previous results, only one additional electrode is introduced for both drain expansion and source expansion structures. If the area is not taken into account, the two reinforced structures can be further improved. As shown in Fig.17 and Fig.18, the drain and source electrode expansion are extended into ring structure. The area of additional electrodes in the ring structure is larger and the whole NMOS device is surrounded. Therefore, it can help the drain electrode generating more electrons and the reinforcement effect is better, which is simulated in the 7-level inverter chain, and the simulation conditions are consistent with the above. The results are shown in Fig.19. As can be seen from the Fig.19, the annular structure has a significant inhibitory effect on the pulse width of SET, that the enhancement effect of the annular drain and gate structures is stronger than that of single electrode expansion. When the LET is 40 MeV·cm 2 /Mg, the pulse width of NMOS with traditional layout is 117.21ps; while in the ring drain structure and ring gate structure, the pulse width is 72.63ps and 56.56ps, reducing 38.03% and 51.74%, respectively. 6. Conclusion This paper mainly studies and analyzes two kinds of strengthening structures for NMOS devices, that is, drain and source extended strengthening structure. The mechanism of two kinds of strengthening structures is simulated, and results show that the two structures are strengthened by introducing additional electrodes to share the charge generated by ionization. Compared with conventional NMOS devices, the drain and the source extended structure play an effective role in strengthening SET. In the inverter chain, the strengthening effect of the drain extended structure is more obvious. After the heavy ion with LET of 40 MeV·cm 2 /Mg is incident, the source and drain extended structure reduce the SET pulse width by 23.73% and 34.85%, respectively, and the ring gate and drain structure reduce the SET pulse width by 51.74% and 38.03%, respectively. Declarations Declarations ( Data Availability S tatement) All data generated during this study are included in this published article. Acknowledgements This work was supported by the National Natural Science Foundation of China (No.12105220, No.62004163), Scientific Research Program Funded by Shaanxi Provincial Education Department (Program No. 21JK0849, No.20JK0941) and the Postgraduate Innovation and Practical Ability Training Program of Xi’an Shiyou University (Grant No. YCS23113090). References Gupta N, Kumar A, Jain A. Hot carrier reliability assessment of vacuum gate dielectric trench MOSFET (TG-VacuFET) [J]. The European Physical Journal Plus, 2022, 137(4): 1-11. Hao M R, Zhang Y, Shao M, et al. Effects of total dose radiation on single event effect of the uniaxial strained si nano NMOSFET [J]. IETE Journal of Research, 2023, 69(3): 1522-1528. Li K, Luo X Y, Rony M W, et al. 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Novel Layout Technique for Single-Event Transient Mitigation Using Dummy Transistor [J]. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2013, 13(1): 177-184. Additional Declarations No competing interests reported. Cite Share Download PDF Status: Posted Version 1 posted You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. As a division of Research Square Company, we’re committed to making research communication faster, fairer, and more useful. We do this by developing innovative software and high quality services for the global research community. Our growing team is made up of researchers and industry professionals working together to solve the most critical problems facing scientific publishing. Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-5001077","acceptedTermsAndConditions":true,"allowDirectSubmit":true,"archivedVersions":[],"articleType":"Article","associatedPublications":[],"authors":[{"id":356706562,"identity":"476316e5-75e8-42cd-9789-98ec56a2054e","order_by":0,"name":"Minru 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parallel.\u003c/p\u003e","description":"","filename":"5.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/52342b05b5fc587157151ee5.png"},{"id":66301310,"identity":"23324ac7-2542-43e9-8f91-0ad1488136f3","added_by":"auto","created_at":"2024-10-10 06:00:49","extension":"png","order_by":6,"title":"Figure 6","display":"","copyAsset":false,"role":"figure","size":82506,"visible":true,"origin":"","legend":"\u003cp\u003eDevice model of source expansion.\u003c/p\u003e","description":"","filename":"6.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/b735942da5657a04ed00f679.png"},{"id":66301308,"identity":"cccbb04c-fe72-4da6-a9a7-90245acee63b","added_by":"auto","created_at":"2024-10-10 06:00:49","extension":"png","order_by":7,"title":"Figure 7","display":"","copyAsset":false,"role":"figure","size":17298,"visible":true,"origin":"","legend":"\u003cp\u003eSource extended structure acts on inverter chain.\u003c/p\u003e","description":"","filename":"7.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/cd7e34ee04b398edc4c69282.png"},{"id":66302039,"identity":"98d42c81-f447-4ae6-a5fe-077b3b6f72f2","added_by":"auto","created_at":"2024-10-10 06:16:49","extension":"png","order_by":8,"title":"Figure 8","display":"","copyAsset":false,"role":"figure","size":56524,"visible":true,"origin":"","legend":"\u003cp\u003eDrain voltage pulse of source extension and traditional NMOS in inverter.\u003c/p\u003e","description":"","filename":"8.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/e93858eb26c6d4f4dfd79125.png"},{"id":66301313,"identity":"53121afe-0fb6-4657-8d5c-0bc5804b6f0d","added_by":"auto","created_at":"2024-10-10 06:00:49","extension":"png","order_by":9,"title":"Figure 9","display":"","copyAsset":false,"role":"figure","size":71794,"visible":true,"origin":"","legend":"\u003cp\u003ePulse width of traditional NMOS and source extended NMOS.\u003c/p\u003e","description":"","filename":"9.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/40e9d0a65d6c08bcbeb40097.png"},{"id":66301808,"identity":"e6c925dd-25a0-4642-8a55-083969a7ee4e","added_by":"auto","created_at":"2024-10-10 06:08:49","extension":"png","order_by":10,"title":"Figure 10","display":"","copyAsset":false,"role":"figure","size":42315,"visible":true,"origin":"","legend":"\u003cp\u003eSchematic diagram of drain expansion structure.\u003c/p\u003e","description":"","filename":"10.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/47e4fe70c2dadffe6cfb5079.png"},{"id":66301812,"identity":"ccd23119-996f-4330-8b47-f1d748b29a79","added_by":"auto","created_at":"2024-10-10 06:08:50","extension":"png","order_by":11,"title":"Figure 11","display":"","copyAsset":false,"role":"figure","size":69351,"visible":true,"origin":"","legend":"\u003cp\u003eThe model of drain extended device.\u003c/p\u003e","description":"","filename":"11.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/435d097185a438c5502b19ce.png"},{"id":66301806,"identity":"e85a8742-54ef-4221-a605-998effd69c3b","added_by":"auto","created_at":"2024-10-10 06:08:49","extension":"png","order_by":12,"title":"Figure 12","display":"","copyAsset":false,"role":"figure","size":112972,"visible":true,"origin":"","legend":"\u003cp\u003eSET current of conventional NMOS and drain extended structure.\u003c/p\u003e","description":"","filename":"12.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/595633fee6c1c1e8783c1f09.png"},{"id":66301803,"identity":"57d1a508-f206-4f1d-a1d3-07eafdfc5d5f","added_by":"auto","created_at":"2024-10-10 06:08:49","extension":"png","order_by":13,"title":"Figure 13","display":"","copyAsset":false,"role":"figure","size":80202,"visible":true,"origin":"","legend":"\u003cp\u003eCollecting charge of conventional NMOS and drain extended structure.\u003c/p\u003e","description":"","filename":"13.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/7c4a8e793864a71ed6d9ef9e.png"},{"id":66301807,"identity":"c58f6f87-892f-40f5-8baa-69cb2f0ddd39","added_by":"auto","created_at":"2024-10-10 06:08:49","extension":"png","order_by":14,"title":"Figure 14","display":"","copyAsset":false,"role":"figure","size":19287,"visible":true,"origin":"","legend":"\u003cp\u003eDrain extended structure for inverter chain.\u003c/p\u003e","description":"","filename":"14.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/49da006037426cda267865eb.png"},{"id":66301320,"identity":"685b1948-8295-4b93-ace3-74eb952ef712","added_by":"auto","created_at":"2024-10-10 06:00:49","extension":"png","order_by":15,"title":"Figure 15","display":"","copyAsset":false,"role":"figure","size":56121,"visible":true,"origin":"","legend":"\u003cp\u003eComparison of SET voltage pulse width between drain expansion and traditional NMOS in inverter chain.\u003c/p\u003e","description":"","filename":"15.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/8c4e211636658e414b39a79f.png"},{"id":66302040,"identity":"b982563f-3ac5-4446-a98a-c4288f539857","added_by":"auto","created_at":"2024-10-10 06:16:49","extension":"png","order_by":16,"title":"Figure 16","display":"","copyAsset":false,"role":"figure","size":64116,"visible":true,"origin":"","legend":"\u003cp\u003eComparison of SET pulse width of two reinforced structure.\u003c/p\u003e","description":"","filename":"16.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/8bf2a93f0a994c500fb13599.png"},{"id":66301810,"identity":"343cb1c2-03e2-40ac-b4a8-37a53e0a6fed","added_by":"auto","created_at":"2024-10-10 06:08:49","extension":"png","order_by":17,"title":"Figure 17","display":"","copyAsset":false,"role":"figure","size":8232,"visible":true,"origin":"","legend":"\u003cp\u003eRing structure of drain expansion (ring drain structure).\u003c/p\u003e","description":"","filename":"17.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/dd111bd67caaa78705aedc03.png"},{"id":66301318,"identity":"9d84e9e0-818e-47fe-aa62-cca2941c871a","added_by":"auto","created_at":"2024-10-10 06:00:49","extension":"png","order_by":18,"title":"Figure 18","display":"","copyAsset":false,"role":"figure","size":6257,"visible":true,"origin":"","legend":"\u003cp\u003eRing structure of source expansion (ring gate structure).\u003c/p\u003e","description":"","filename":"18.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/c1591da6e71f93390f3c3cbd.png"},{"id":66301321,"identity":"35ddfd23-7393-4b8a-9b9c-2d820ce1145b","added_by":"auto","created_at":"2024-10-10 06:00:49","extension":"png","order_by":19,"title":"Figure 19","display":"","copyAsset":false,"role":"figure","size":66249,"visible":true,"origin":"","legend":"\u003cp\u003eSET pulse width comparison of ring structure.\u003c/p\u003e","description":"","filename":"19.png","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/23c3004a5051b95decaca8a9.png"},{"id":81686990,"identity":"e2c89f83-dab0-4351-91d4-930b73c7edfb","added_by":"auto","created_at":"2025-04-30 10:46:38","extension":"pdf","order_by":0,"title":"","display":"","copyAsset":false,"role":"manuscript-pdf","size":1145198,"visible":true,"origin":"","legend":"","description":"","filename":"manuscript.pdf","url":"https://assets-eu.researchsquare.com/files/rs-5001077/v1/3a51f1ce-aec4-4463-90e2-980e020a77ff.pdf"}],"financialInterests":"No competing interests reported.","formattedTitle":"Study on Strengthening Structure of Single Event Effect","fulltext":[{"header":"1.\tIntroduction","content":"\u003cp\u003eThe most elementary steps associated with the interaction of ionizing radiation with semiconductor devices are the generation and collection of charge at the transistor level. These represent the primary events from which all other single-event effects follow (single-event upset, single-event transient generation/propagation, single-event latch up, single-event gate rupture, to name a few). Strained\u0026nbsp;technology has been widely used to improve the performance of Si CMOS devices,\u0026nbsp;and\u0026nbsp;strained-Si technologies\u0026nbsp;have caught much attention as\u0026nbsp;device size is scaling down [1-4], especially in the application of strained IC under single event effect (SEE) [5-6]. Single-event transient (SET) is the main radiation-induced noise and source of the soft error in advanced CMOS integrated circuits (ICs) [7\u0026minus;8].\u0026nbsp;\u003c/p\u003e\n\u003cp\u003eAt present, the development of anti-radiation devices is usually a repeated process of \u0026quot;designing, manufacturing, and testing\u0026quot;, which is very expensive, and the cycle of repeated design is very long [9-10]. Therefore, the Sentaurus TCAD simulation has an advantage in anti-radiation research. With the reduction of device size, the effect of bipolar amplification leads to the failure of the original charge collection model based on funnel and diffusion mechanism. Therefore, the influence of bipolar amplification components on charge collection cannot be ignored. What is more, the reliability of microelectronic devices and integrated circuits with MOS as the core of the satellite and spacecraft is becoming more and more serious after the bombardment of the high energy single particles in outer space [11-14], which the microelectronic devices and integrated circuits can\u0026rsquo;t run normally, so that the reliability of the electronic system is reduced. Therefore, it is very meaningful and imperative to design new reinforced structure to resist the single event effect [15-16]. Narasimham et al [17-18] proposed protection ring and leakage reinforcement structure, protection belt and well contact reinforcement structure, and Chen et al [19-20] proposed virtual transistor reinforcement structure, source expansion structure, etc. They just reinforced the individual device. In this paper, it is used in the inverter chain, and two classical structures are compared.\u003c/p\u003e\n\u003cp\u003eBased on above analysis, two classical reinforcement structures of NMOS devices are proposed, source and drain extended structure, and effectively reduces the transient current of drain electrode. The simulation results of new reinforcement structure provide valuable reference for research on irradiation reliability and application of strained integrated circuit of MOS.\u003cstrong\u003e\u0026nbsp;\u003c/strong\u003e\u003c/p\u003e"},{"header":"2. Bipolar effect of inverter chain","content":"\u003cp\u003eThe hybrid simulation of the inverter chain has been proved to be an effective way to study the single event transient. The structure of 7-Stage inverter chain is adopted for research, which is shown in Fig.1. N1 transistor uses device simulation, and the rest transistor uses bsim-4 model of Berkeley University to simulate SPICE circuit. The gate length W/L of N and P tube are 300nm/50nm and 600nm/50nm, respectively. The parameters of the heavy ion model are shown in Table 1. LET is set to 20MeV\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e/mg. SET is generated at the N1 tube, and then propagated in the 7 stage inverter chain. The voltage pulse is observed at the output end of the inverter chain.\u0026nbsp;\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eTable I. \u0026nbsp;\u003c/strong\u003ePartial model parameters of heavy ion.\u003c/p\u003e\n \u003ctable border=\"1\" cellspacing=\"0\" cellpadding=\"0\" width=\"100%\"\u003e\n \u003ctbody\u003e\n \u003ctr\u003e\n \u003ctd valign=\"top\" style=\"width: 16.3265%;\"\u003e\n \u003cp\u003eParameter\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd valign=\"top\" style=\"width: 18.3673%;\"\u003e\n \u003cp\u003eLet_f/pc.um\u003csup\u003e-1\u003c/sup\u003e\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd valign=\"top\" style=\"width: 16.3265%;\"\u003e\n \u003cp\u003eWt_hi/um\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd valign=\"top\" style=\"width: 16.3265%;\"\u003e\n \u003cp\u003e\u0026nbsp;Time/s\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd valign=\"top\" style=\"width: 16.3265%;\"\u003e\n \u003cp\u003eDirection\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd valign=\"top\" style=\"width: 16.3265%;\"\u003e\n \u003cp\u003eLocation\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003ctr\u003e\n \u003ctd valign=\"top\" style=\"width: 16.3265%;\"\u003e\n \u003cp\u003eValue\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd valign=\"top\" style=\"width: 18.3673%;\"\u003e\n \u003cp\u003e0.02\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd valign=\"top\" style=\"width: 16.3265%;\"\u003e\n \u003cp\u003e\u0026nbsp;0.015\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd valign=\"top\" style=\"width: 16.3265%;\"\u003e\n \u003cp\u003e1.0e-11\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd valign=\"top\" style=\"width: 16.3265%;\"\u003e\n \u003cp\u003e(0,1)\u003c/p\u003e\n \u003c/td\u003e\n \u003ctd valign=\"top\" style=\"width: 16.3265%;\"\u003e\n \u003cp\u003e(0,0)\u003c/p\u003e\n \u003c/td\u003e\n \u003c/tr\u003e\n \u003c/tbody\u003e\n \u003c/table\u003e\n\u003c/div\u003e\n\u003cp\u003e\u0026nbsp;\u003c/p\u003e\n\u003cp\u003eWhen the input terminal of inverter chain and the drain of N1 tube are at high level, the drain of N1 tube is bombarded by heavy ions. The source and drain current curve of N1 and the voltage change of N1are obtained by mixed simulation, as shown in Fig.2. The SET current of inverter link N1 is much smaller, and its peak current is only 2.5mA. The output voltage pulse is as shown in Fig.3. It can be seen that the voltage at the out terminal increases from 0 to 0.94V due to the diffuse of N1 tube transient pulse and the propagation of 5-stage inverter chain.\u0026nbsp;\u003c/p\u003e"},{"header":"3. Source expansion reinforcement structure","content":"\u003cp\u003eIn the inverter chain, the drain of NMOS is connected to the power supply through the pull-up PMOS. When the incident particles bombard the NMOS in the inverter chain, there is a voltage pulse at the drain of the NMOS. Due to the decrease in drain potential, the body potential will decrease, so the source body junction maintains reverse bias, at which point the source potential\u0026gt;drain potential\u0026gt;body potential. The source plays a role in helping the drain share the charge in charge collection.\u0026nbsp;\u003c/p\u003e\n\u003cp\u003eBased on the positive current action of the source in the inverter, the source expansion structure can be introduced, as shown in Fig.4. The left side of the device is the normal NMOS area, which is the device to be reinforced and has the same function as the normal NMOS. On the right side is the extended source region, which is the same as the source doping of NMOS transistor and connected to V\u003csub\u003ess\u003c/sub\u003e as the source electrode. NMOS transistor and PMOS consist of an inverter. After high-energy particles are incident and bombard the drain region, a large number of electron hole pairs are generated along the incident track. The drain collects electrons through funnel assisted drift, on the one hand, the expansion of the funnel field will cause disturbance to the substrate potential; On the other hand, the accumulation of escape recombination holes in the body raises the potential of the body region, which reduces the potential barrier of the source body junction, and leads to forward bias of the source body junction, thereby triggering the injection of electrons from the source region into the channel region and the substrate. The effect of the increased source extension electrode is consistent with that of the source electrode, absorbing some of the substrate\u0026apos;s hot electrons, so the amount of charge absorbed by the drain electrode will be reduced.\u003c/p\u003e\n\u003cp\u003eThere are two source poles in the expanded layout, which is equivalent to two NMOS devices in parallel. In order to maintain the original current size, the width of NMOS devices is reduced by half. The layout is shown in Fig.5 compared with the traditional layout, and the improved parallel NMOS device has two advantages: first, the drain area is reduced by half, so the SET sensitive area is reduced accordingly; second, the source splitting is located on both sides of the drain, and its effect is that the source can collect ionized electrons from both sides after the particles impact the drain of the device, the source is in the same position as the traditional structure more efficient in collecting ionized electrons. Therefore, the charge collected at the drain will be reduced to achieve the purpose of reinforcement.\u0026nbsp;\u003c/p\u003e\n\u003cp\u003eThe source expansion and reinforcement structure model of the 50nm NMOS device is as follows: the 50 nm NMOS device is built on the p-Si substrate of 4\u0026mu;m \u0026times; 4\u0026mu;m \u0026times; 4\u0026mu;m \u0026times; 10\u0026mu;m, and adopts the double well CMOS technology. The structure includes the well region and the NMOS tube active region. The distance between source and channel is 50nm, and the distance between well contact and NMOS is 0.4\u0026mu;m, which structure is shown in Fig.6.\u0026nbsp;\u003c/p\u003e\n\u003cp\u003eThe source expansion structure is that the drain is not directly connected to the power supply, but connected to the power supply through the pull-up PMOS tube, which is mostly the case in CMOS circuits. Therefore, the source expansion structure is simulated and used in the simplest CMOS circuit inverter. The two gates are connected, and the source and the additional source are connected to the V\u003csub\u003ess\u003c/sub\u003e. The connection diagram is shown in Fig.7. Using TCAD for numerical simulation, the physical model is the same as the previous one. LET is set to 5MeV\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e/Mg, 10MeV\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e/Mg, 20MeV\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e/Mg, 40Mev\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e/Mg, respectively. SET pulse is observed and compared it with traditional CMOS results. As shown in Fig.8, after the incident particles bombard the NMOS device, SET pulses are generated at the drain electrode. After the reinforcement of the source expansion structure, the drain electrode area is reduced by half. Because the drain electrode potential is reduced, the two source electrodes help the drain electrode share the electrons generated by ionization in the charge collection process. Therefore, for incident particles with different LET values, compared with traditional NMOS, the SET voltage pulse width generated by source electrode expansion and enhancement is significantly reduced. This shows that the source extended structure can alleviate SET. When LET is 20MeV\u0026bull;cm\u003csup\u003e2\u003c/sup\u003e/Mg, SET pulse width of traditional NMOS is 62.4ps, and SET pulse width of drain extension is 46.86ps; When LET= 40MeV\u0026bull;cm\u003csup\u003e2\u003c/sup\u003e/Mg, SET pulse width of traditional NMOS is 117.21ps, and SET pulse width of drain extension is 89.38ps.\u003c/p\u003e\n\u003cp\u003eIn order to analyze the reinforcement effect of the source, the actual reduction of the pulse width of the output in the source extended NMOS is obtained through simulation, as shown in Fig.9. For the traditional NMOS devices with the width of 150nm and 300nm, the width of the two devices is half different, and the sensitive area is also half different, but the SET pulse width of the two devices is almost no big difference, which also shows that only reducing the drain area can hardly reduce the set pulse width. Thus, the source is the key factor to reduce the pulse width in the source extended NMOS.\u0026nbsp;\u003c/p\u003e"},{"header":"4. Reinforced structure with expanded drain","content":"\u003cp\u003eThe purpose of drain expansion is to use auxiliary electrodes to help the drain region absorb the generated electron hole pairs, which reduce the collection of drain charges, and thus reduce the impact of single particle transient effects. The schematic diagram of the drain expansion and reinforcement structure is shown in Fig.10. On the left side is the NMOS device area, and NMOS tube is the device to be strengthened, which has the same function as conventional NMOS tube. The area on the right of NMOS is the additional electrode area. The drain area is extended as the additional electrode and connected to V\u003csub\u003eds\u003c/sub\u003e. The doping type of drain extension is the same as that of drain, and the doping between drain extension and drain is the same as that of channel doping. Therefore, the process of the extended region is the same as that of NMOS devices.\u003c/p\u003e\n\u003cp\u003eAfter the impact of the incident particle, the ionization along the particle trajectory generates charges, and some electrons will drift and diffuse through the funnel to be collected by the drain electrode, resulting in single event transient generating large current; the other part, the drain electrode expands to N\u003csup\u003e+\u0026nbsp;\u003c/sup\u003edoping, and the electrode is connected to V\u003csub\u003eds\u003c/sub\u003e, so that the drain electrode expansion will also absorb the electrons generated by the ionization. Thus, the single event charge collection of drain electrode is weakened.\u0026nbsp;\u003c/p\u003e\n\u003cp\u003eThe drain extension reinforcement structure of 50nm NMOS device is constructed as shown in Fig.11. Firstly, the single event numerical simulation of drain extended device model using TCAD is carried out, and the charge collection of drain is studied. The simulation LET is set to 5MeV \u0026bull; cm\u003csup\u003e2\u003c/sup\u003e/Mg, 10MeV\u0026bull; cm\u003csup\u003e2\u003c/sup\u003e/Mg, 20MeV\u0026bull;cm\u003csup\u003e2\u003c/sup\u003e/Mg, 40Mev \u0026bull; cm\u003csup\u003e2\u003c/sup\u003e/Mg, respectively, and drain current is shown in Fig.12. Regardless of the LET value, the drain current of the drain extension structure is smaller than that of the conventional NMOS transistor. The Fig.12 shows that the current of LET=40Mev\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e/Mg is taken out. It can be seen that the current of the additional drain after the incident particle bombards the device is positive, which results in the current of the drain collection being reduced, and shows that the additional drain plays a role in alleviating the charge collection of the drain. With the increase of LET, the gap of drain current between the drain extended structure and the conventional NMOS device increases gradually, so the drain extended structure has weakening effect on SET current.\u003c/p\u003e\n\u003cp\u003eThe SET current in Fig.12 is integrated separately to obtain the collection charge corresponding to different LET values of conventional NMOS and drain extension structure, as shown in Fig.13. It can be seen from the Fig.13 that for different LET values, the collection charge of drain extended structure is smaller than that of conventional NMOS devices. When LET is 40Mev\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e/Mg, the difference between the collection charges of the two devices is 14.95%, which shows that the reinforcement effect of drain extended structure for single event transient is very obvious.\u003c/p\u003e\n\u003cp\u003eThe drain extension structure is used in the inverter chain. NMOS devices are connected to the power supply V\u003csub\u003edd\u003c/sub\u003e through the pull-up PMOS tube, and the additional drain is directly connected to the power supply V\u003csub\u003edd\u003c/sub\u003e, as shown in Fig.14. The simulation results show that the SET voltage pulse width comparison is shown in Fig.15. By integrating the SET currents in Fig.15, we obtained the collected charges corresponding to different LET values for conventional NMOS and drain extended structures, as shown in Fig.15. From the graph, it can be seen that for different LET values, the collected charges of the drain extended structure are smaller than those of conventional NMOS devices. When the LET is 40 MeV \u0026middot; cm\u003csup\u003e2\u003c/sup\u003e/mg, the difference in collected charges between the two is 14.95%, indicating that the drain extended structure has a significant reinforcement effect on single particle transients. When LET is 20 MeV\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e/Mg, SET pulse width of traditional NMOS is 62.41ps, and SET pulse width of drain extension is 40.56ps; when LET is 40 MeV\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e/Mg, SET pulse width of traditional NMOS is 117.21ps, and SET pulse width of drain extension is 76.35ps.\u003c/p\u003e"},{"header":"5. Comparison and discussion of two reinforcement structures","content":"\u003cp\u003eBoth the source expansion and drain expansion reinforcement structures help the drain absorbing the charge generated by ionization through an additional electrode area, and compared with the reinforcement effects of the two structures, as shown in Fig.16. It can be seen from Fig. 16, both the drain extension structure and the source extension structure compared with the traditional NMOS can effectively reduce the SET pulse width of NMOS. When the LET is 40 MeV\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e /Mg, the pulse width of the traditional NMOS is 117.21ps, while the pulse width of the source extended structure and drain extended structure is only 89.38ps and 76.35ps, which are reduced by 23.73% and 34.85%, respectively.\u003c/p\u003e\n\u003cp\u003eAccording to the above results, it can be seen that the SET pulse can be effectively reduced by the two kinds of reinforced structures. In the previous results, only one additional electrode is introduced for both drain expansion and source expansion structures. If the area is not taken into account, the two reinforced structures can be further improved. As shown in Fig.17 and Fig.18, the drain and source electrode expansion are extended into ring structure. The area of additional electrodes in the ring structure is larger and the whole NMOS device is surrounded. Therefore, it can help the drain electrode generating more electrons and the reinforcement effect is better, which is simulated in the 7-level inverter chain, and the simulation conditions are consistent with the above. The results are shown in Fig.19.\u003c/p\u003e\n\u003cp\u003eAs can be seen from the Fig.19, the annular structure has a significant inhibitory effect on the pulse width of SET, that the enhancement effect of the annular drain and gate structures is stronger than that of single electrode expansion. When the LET is 40 MeV\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e/Mg, the pulse width of NMOS with traditional layout is 117.21ps; while in the ring drain structure and ring gate structure, the pulse width is 72.63ps and 56.56ps, reducing 38.03% and 51.74%, respectively. \u0026nbsp;\u003c/p\u003e"},{"header":"6.\tConclusion","content":"\u003cp\u003eThis paper mainly studies and analyzes two kinds of strengthening structures for NMOS devices, that is, drain and source extended strengthening structure. The mechanism of two kinds of strengthening structures is simulated, and results show that the two structures are strengthened by introducing additional electrodes to share the charge generated by ionization. Compared with conventional NMOS devices, the drain and the source extended structure play an effective role in strengthening SET. In the inverter chain, the strengthening effect of the drain extended structure is more obvious. After the heavy ion with LET of 40 MeV\u0026middot;cm\u003csup\u003e2\u003c/sup\u003e/Mg is incident, the source and drain extended structure reduce the SET pulse width by 23.73% and 34.85%, respectively, and the ring gate and drain structure reduce the SET pulse width by 51.74% and 38.03%, respectively.\u003c/p\u003e"},{"header":"Declarations","content":"\u003cp\u003e\u003cstrong\u003eDeclarations (\u003c/strong\u003e\u003cstrong\u003eData Availability\u003c/strong\u003e\u003cstrong\u003eS\u003c/strong\u003e\u003cstrong\u003etatement)\u003c/strong\u003e\u003c/p\u003e\n\u003cp\u003eAll data generated during this study are included in this published article.\u003c/p\u003e\n\u003cp\u003e\u003cstrong\u003eAcknowledgements\u003c/strong\u003e\u003c/p\u003e\n\u003cp\u003eThis work was supported by the National Natural Science Foundation of China (No.12105220, No.62004163), Scientific Research Program Funded by Shaanxi Provincial Education Department (Program No. 21JK0849, No.20JK0941) and the Postgraduate Innovation and Practical Ability Training Program of Xi\u0026rsquo;an Shiyou University (Grant No. YCS23113090).\u003c/p\u003e"},{"header":"References","content":"\u003col\u003e\n\u003cli\u003eGupta N, Kumar A, Jain A. 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IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2013, 13(1): 177-184. \u003c/li\u003e\n\u003c/ol\u003e"}],"fulltextSource":"","fullText":"","funders":[],"hasAdminPriorityOnWorkflow":false,"hasManuscriptDocX":true,"hasOptedInToPreprint":true,"hasPassedJournalQc":"","hasAnyPriority":false,"hideJournal":true,"highlight":"","institution":"","isAcceptedByJournal":false,"isAuthorSuppliedPdf":false,"isDeskRejected":"","isHiddenFromSearch":false,"isInQc":false,"isInWorkflow":false,"isPdf":false,"isPdfUpToDate":true,"isWithdrawnOrRetracted":false,"journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true},"keywords":"Single event transient (SET), Bipolar amplification effect, Source extended structure, Drain extended structure","lastPublishedDoi":"10.21203/rs.3.rs-5001077/v1","lastPublishedDoiUrl":"https://doi.org/10.21203/rs.3.rs-5001077/v1","license":{"name":"CC BY 4.0","url":"https://creativecommons.org/licenses/by/4.0/"},"manuscriptAbstract":"\u003cp\u003eBased on the structure of inverter chain, the charge collection mechanism of bipolar amplification effect of NMOS device is studied. With the reduction of device size, bipolar amplification leads to the failure of the original charge collection model due to funnel and diffusion mechanism. Based on the damage mechanism of single event transient (SET) of MOS device, two classical reinforcement structures of source extended and drain extended are proposed, and effectively reduces the transient current of drain electrode. The reinforcement characteristics of the two structures are simulated, and they are compared and discussed. It is found that the reinforcement effect of the extended drain structure is more obvious. Therefore, the simulation results of new reinforcement structure provide valuable reference for research on irradiation reliability and application of strained MOS integrated circuit.\u0026nbsp;\u003c/p\u003e","manuscriptTitle":"Study on Strengthening Structure of Single Event Effect","msid":"","msnumber":"","nonDraftVersions":[{"code":1,"date":"2024-10-10 06:00:44","doi":"10.21203/rs.3.rs-5001077/v1","editorialEvents":[{"type":"communityComments","content":0}],"status":"published","journal":{"display":true,"email":"[email protected]","identity":"researchsquare","isNatureJournal":false,"hasQc":true,"allowDirectSubmit":true,"externalIdentity":"","sideBox":"","snPcode":"","submissionUrl":"/submission","title":"Research Square","twitterHandle":"researchsquare","acdcEnabled":true,"dfaEnabled":false,"editorialSystem":"","reportingPortfolio":"","inReviewEnabled":false,"inReviewRevisionsEnabled":true}}],"origin":"","ownerIdentity":"e1193362-948e-4d78-8a3d-9576a96e1a34","owner":[],"postedDate":"October 10th, 2024","published":true,"recentEditorialEvents":[],"rejectedJournal":[],"revision":"","amendment":"","status":"posted","subjectAreas":[{"id":37938558,"name":"Physical sciences/Engineering/Electrical and electronic engineering"},{"id":37938559,"name":"Physical sciences/Nanoscience and technology"},{"id":37938560,"name":"Physical sciences/Physics"}],"tags":[],"updatedAt":"2025-04-30T10:38:28+00:00","versionOfRecord":[],"versionCreatedAt":"2024-10-10 06:00:44","video":"","vorDoi":"","vorDoiUrl":"","workflowStages":[]},"version":"v1","identity":"rs-5001077","journalConfig":"researchsquare"},"__N_SSP":true},"page":"/article/[identity]/[[...version]]","query":{"redirect":"/article/rs-5001077","identity":"rs-5001077","version":["v1"]},"buildId":"qtupq5eGEP_6zYnWcrvyt","isFallback":false,"isExperimentalCompile":false,"dynamicIds":[84888],"gssp":true,"scriptLoader":[]}