Analysis and Implementation of a Frequency Synthesis Based on Dual Phase-Locked Loops in Cs Beam Clock

The frequency synthesizer is a critical component in Cs beam clock technology. In this paper, we present a demonstration of a direct microwave frequency-synthesis chain for a cesium-beam atomic clock, which utilizes frequency multiplication and a dual-phase-locked loop mode. A detailed analysis of the frequency-synthesis chain is conducted, and a mathematical model is established. The phase settling time and system stability are simulated, measured, and verified. The experimental results for the phase settling time align with the simulation outcomes. The phase settling time can be adjusted within the range of 644.5 µs to 1.5 ms, and the absolute phase noise values are -63.7 dBc/Hz, -75.7 dBc/Hz, -107.1 dBc/Hz, and -122.5 dBc/Hz at 1 Hz, 10 Hz, 1 kHz, and 10 kHz offset frequencies, respectively. Additionally, the Ramsey fringes are detected, and the Allan deviations of the 10 MHz output from the cesium-beam atomic clock are measured to be 2.99×10−12 at 1s and 8.02×10−14 at 10,000 s.