Reliability of High-Performance Monolayer MoS2 Transistors on Scaled High-κ HfO2

Reliability of High-Performance Monolayer MoS2 Transistors on Scaled High-κ HfO2 | Research Square window.SnipcartSettings = { analytics: { enabled: false } }; (function() { var accessVector = localStorage.getItem('access_vector') || ''; window.dataLayer = window.dataLayer || []; if (accessVector) { window.dataLayer.push({ user: { profile: { profileInfo: { snid: accessVector } } } }); } })(); (function(w,d,s,l,i){w[l]=w[l]||[];w[l].push({'gtm.start':new Date().getTime(),event:'gtm.js'});var f=d.getElementsByTagName(s)[0],j=d.createElement(s),dl=l!='dataLayer'?'&l='+l:'';j.async=true;j.src='https://www.googletagmanager.com/gtm.js?id='+i+dl;f.parentNode.insertBefore(j,f);})(window,document,'script','dataLayer','GTM-K279D39R'); Browse Preprints In Review Journals COVID-19 Preprints AJE Video Bytes Research Tools Research Promotion AJE Professional Editing AJE Rubriq About Preprint Platform In Review Editorial Policies Our Team Advisory Board Help Center Sign In Submit a Preprint Cite Share Download PDF Article Reliability of High-Performance Monolayer MoS 2 Transistors on Scaled High-κ HfO 2 Zhihong Chen, Hao-Yu Lan, Shao-Heng Yang, Rahul Tripathi, Joerg Appenzeller This is a preprint; it has not been peer reviewed by a journal. https://doi.org/ 10.21203/rs.3.rs-4080946/v1 This work is licensed under a CC BY 4.0 License Status: Published Journal Publication published 24 Jan, 2025 Read the published version in npj 2D Materials and Applications → Version 1 posted 11 You are reading this latest preprint version Abstract The successful integration of ultrathin high-κ insulators is essential for the advancement of ultra-scaled field-effect transistors (FETs) based on two-dimensional (2D) semiconductors in future technology nodes. However, defects within the high-κ stack or at the interfaces can significantly degrade the performance of these “interface-only” devices, raising questions regarding their long-term reliability. Here, we study the reliability of monolayer MoS 2 FETs on ultra-thin high-κ HfO 2 . Interestingly, we observe a two-stage threshold voltage shift (Δ V TH ) under positive bias temperature stress (PBTS) and hot carrier degradation (HCD), attributed to electron trapping in preexisting traps and the generation of hydrogen-assisted donor traps within the gate oxide. In contrast, devices fabricated on exfoliated hBN lack this two-stage Δ V TH , implying such donor trap generation is induced by atomic-layer-deposition (ALD) processes used in HfO 2 -based devices. Refining the ALD process emerges as a key strategy for enhancing the stability of 2D FETs to meet silicon CMOS standards. 2D semiconductors Monolayer transition metal dichalcogenides (1L-TMDs) Transistors Dielectric interface Doping Charge trapping Reliability Stability Full Text Additional Declarations (Not answered) Supplementary Files Supplementaryinformation240311.pdf Cite Share Download PDF Status: Published Journal Publication published 24 Jan, 2025 Read the published version in npj 2D Materials and Applications → Version 1 posted Editorial decision: revise 08 May, 2024 Review # 3 received at journal 06 May, 2024 Review # 2 received at journal 01 May, 2024 Reviewer # 3 agreed at journal 22 Apr, 2024 Review # 1 received at journal 10 Apr, 2024 Reviewer # 2 agreed at journal 02 Apr, 2024 Reviewer # 1 agreed at journal 27 Mar, 2024 Reviewers invited by journal 27 Mar, 2024 Submission checks completed at journal 13 Mar, 2024 Editor assigned by journal 12 Mar, 2024 First submitted to journal 12 Mar, 2024 You are reading this latest preprint version Research Square lets you share your work early, gain feedback from the community, and start making changes to your manuscript prior to peer review in a journal. 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Also discoverable on Platform About Our Team In Review Editorial Policies Advisory Board Help Center Resources Author Services Accessibility API Access RSS feed Manage Cookie Preferences © Research Square 2026 | ISSN 2693-5015 (online) Privacy Policy Terms of Service Do Not Sell My Personal Information {"props":{"pageProps":{"initialData":{"identity":"rs-4080946","acceptedTermsAndConditions":true,"allowDirectSubmit":false,"archivedVersions":[],"articleType":"Article","associatedPublications":[],"authors":[{"id":284708932,"identity":"f60f3939-6322-44fb-8450-09d055254545","order_by":0,"name":"Zhihong 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However, defects within the high-κ stack or at the interfaces can significantly degrade the performance of these “interface-only” devices, raising questions regarding their long-term reliability. Here, we study the reliability of monolayer MoS\u003csub\u003e2\u003c/sub\u003e FETs on ultra-thin high-κ HfO\u003csub\u003e2\u003c/sub\u003e. Interestingly, we observe a two-stage threshold voltage shift (Δ\u003ci\u003eV\u003c/i\u003e\u003csub\u003eTH\u003c/sub\u003e) under positive bias temperature stress (PBTS) and hot carrier degradation (HCD), attributed to electron trapping in preexisting traps and the generation of hydrogen-assisted donor traps within the gate oxide. In contrast, devices fabricated on exfoliated hBN lack this two-stage Δ\u003ci\u003eV\u003c/i\u003e\u003csub\u003eTH\u003c/sub\u003e, implying such donor trap generation is induced by atomic-layer-deposition (ALD) processes used in HfO\u003csub\u003e2\u003c/sub\u003e-based devices. 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