A New Multilevel Inverter Topology for Symmetrical and Asymmetrical Configuration

preprint OA: closed
📄 Open PDF View at publisher

Abstract

This paper presented a new modular symmetrical and asymmetrical multilevel inverter topology. The multilevel output is obtained either with independent DC source or additive or subtractive combination with other DC sources. This paper presents a new algorithm ( an alternative quinary sequence) for choosing input dc voltage sources magnitude. Switching pulses to the proposed topology is created using Phase Opposition Disposition (POD) pulse width modulation technique. The proposed topology shows better performance compared to a few recent topologies in terms of the switches count, DC sources count and the cost function. Switching states were derived for the proposed topology to create 5-Level, 9-Level and 49-Level. Simulation and experimental results verify the validity of the proposed topology. Prototype was developed to generate 9-Levels in the output voltage.

My notes (saved in your browser only)

Citation neighborhood (no data yet)

We don't have any in-corpus citations linked to this paper yet. The paper's references may be in our DB but unresolved to ``paper_id`` (resolution happens at ingest when the cited DOI matches a row we already have). Run the cross-source citation reconcile pass to retry.

Source provenance

europepmc
last seen: 2026-05-19T01:45:01.086888+00:00
unpaywall
last seen: 2026-07-15T06:44:59.916582+00:00