Design And Simulation of An Electro-Optic Even Parity Bit Error Detection System

Abstract In the present day, optical communication technology is proving to be one of the potential replacements to the current electronic-based systems due to its much higher data transmission rate with low loss and electromagnetic interference. This paper designed and simulated our proposed circuit of a digital photonic even parity bit error detection system that is widely employed for the long-range digital signal transmission. Silicon photonic micro-ring resonators are used as their core component. Each of the rings is configured to operate as a digital logic XOR mode by taking advantage of the silicon waveguide's resonance shifting properties. Dynamic response characterization was carried out by simulating the proposed circuits at the data rate of 1-Gbps, with the data sampling rate of 1.6-THz. A clear timing waveform was generated to confirm that the proposed circuit operates as the parity bit error detection system.